1 /*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #include <drm/drm_file.h>
27 #include <drm/drm_fourcc.h>
28 #include <linux/page_size_compat.h>
29
30 #include "virtgpu_drv.h"
31
virtio_gpu_gem_create(struct drm_file * file,struct drm_device * dev,struct virtio_gpu_object_params * params,struct drm_gem_object ** obj_p,uint32_t * handle_p)32 static int virtio_gpu_gem_create(struct drm_file *file,
33 struct drm_device *dev,
34 struct virtio_gpu_object_params *params,
35 struct drm_gem_object **obj_p,
36 uint32_t *handle_p)
37 {
38 struct virtio_gpu_device *vgdev = dev->dev_private;
39 struct virtio_gpu_object *obj;
40 int ret;
41 u32 handle;
42
43 ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
44 if (ret < 0)
45 return ret;
46
47 ret = drm_gem_handle_create(file, &obj->base.base, &handle);
48 if (ret) {
49 drm_gem_object_release(&obj->base.base);
50 return ret;
51 }
52
53 *obj_p = &obj->base.base;
54
55 /* drop reference from allocate - handle holds it now */
56 drm_gem_object_put(&obj->base.base);
57
58 *handle_p = handle;
59 return 0;
60 }
61
virtio_gpu_mode_dumb_create(struct drm_file * file_priv,struct drm_device * dev,struct drm_mode_create_dumb * args)62 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
63 struct drm_device *dev,
64 struct drm_mode_create_dumb *args)
65 {
66 struct drm_gem_object *gobj;
67 struct virtio_gpu_object_params params = { 0 };
68 struct virtio_gpu_device *vgdev = dev->dev_private;
69 int ret;
70 uint32_t pitch;
71
72 if (args->bpp != 32)
73 return -EINVAL;
74
75 pitch = args->width * 4;
76 args->size = pitch * args->height;
77 args->size = ALIGN(args->size, __PAGE_SIZE);
78
79 params.format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888);
80 params.width = args->width;
81 params.height = args->height;
82 params.size = args->size;
83 params.dumb = true;
84
85 if (vgdev->has_resource_blob && !vgdev->has_virgl_3d) {
86 params.blob_mem = VIRTGPU_BLOB_MEM_GUEST;
87 params.blob_flags = VIRTGPU_BLOB_FLAG_USE_SHAREABLE;
88 params.blob = true;
89 }
90
91 ret = virtio_gpu_gem_create(file_priv, dev, ¶ms, &gobj,
92 &args->handle);
93 if (ret)
94 goto fail;
95
96 args->pitch = pitch;
97 return ret;
98
99 fail:
100 return ret;
101 }
102
virtio_gpu_mode_dumb_mmap(struct drm_file * file_priv,struct drm_device * dev,uint32_t handle,uint64_t * offset_p)103 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
104 struct drm_device *dev,
105 uint32_t handle, uint64_t *offset_p)
106 {
107 struct drm_gem_object *gobj;
108
109 BUG_ON(!offset_p);
110 gobj = drm_gem_object_lookup(file_priv, handle);
111 if (gobj == NULL)
112 return -ENOENT;
113 *offset_p = drm_vma_node_offset_addr(&gobj->vma_node);
114 drm_gem_object_put(gobj);
115 return 0;
116 }
117
virtio_gpu_gem_object_open(struct drm_gem_object * obj,struct drm_file * file)118 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
119 struct drm_file *file)
120 {
121 struct virtio_gpu_device *vgdev = obj->dev->dev_private;
122 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
123 struct virtio_gpu_object_array *objs;
124
125 if (!vgdev->has_virgl_3d)
126 goto out_notify;
127
128 /* the context might still be missing when the first ioctl is
129 * DRM_IOCTL_MODE_CREATE_DUMB or DRM_IOCTL_PRIME_FD_TO_HANDLE
130 */
131 virtio_gpu_create_context(obj->dev, file);
132
133 objs = virtio_gpu_array_alloc(1);
134 if (!objs)
135 return -ENOMEM;
136 virtio_gpu_array_add_obj(objs, obj);
137
138 virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id,
139 objs);
140 out_notify:
141 virtio_gpu_notify(vgdev);
142 return 0;
143 }
144
virtio_gpu_gem_object_close(struct drm_gem_object * obj,struct drm_file * file)145 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
146 struct drm_file *file)
147 {
148 struct virtio_gpu_device *vgdev = obj->dev->dev_private;
149 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
150 struct virtio_gpu_object_array *objs;
151
152 if (!vgdev->has_virgl_3d)
153 return;
154
155 objs = virtio_gpu_array_alloc(1);
156 if (!objs)
157 return;
158 virtio_gpu_array_add_obj(objs, obj);
159
160 virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id,
161 objs);
162 virtio_gpu_notify(vgdev);
163 }
164
virtio_gpu_array_alloc(u32 nents)165 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)
166 {
167 struct virtio_gpu_object_array *objs;
168
169 objs = kmalloc(struct_size(objs, objs, nents), GFP_KERNEL);
170 if (!objs)
171 return NULL;
172
173 objs->nents = 0;
174 objs->total = nents;
175 return objs;
176 }
177
virtio_gpu_array_free(struct virtio_gpu_object_array * objs)178 static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs)
179 {
180 kfree(objs);
181 }
182
183 struct virtio_gpu_object_array*
virtio_gpu_array_from_handles(struct drm_file * drm_file,u32 * handles,u32 nents)184 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents)
185 {
186 struct virtio_gpu_object_array *objs;
187 u32 i;
188
189 objs = virtio_gpu_array_alloc(nents);
190 if (!objs)
191 return NULL;
192
193 for (i = 0; i < nents; i++) {
194 objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]);
195 if (!objs->objs[i]) {
196 objs->nents = i;
197 virtio_gpu_array_put_free(objs);
198 return NULL;
199 }
200 }
201 objs->nents = i;
202 return objs;
203 }
204
virtio_gpu_array_add_obj(struct virtio_gpu_object_array * objs,struct drm_gem_object * obj)205 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
206 struct drm_gem_object *obj)
207 {
208 if (WARN_ON_ONCE(objs->nents == objs->total))
209 return;
210
211 drm_gem_object_get(obj);
212 objs->objs[objs->nents] = obj;
213 objs->nents++;
214 }
215
virtio_gpu_array_lock_resv(struct virtio_gpu_object_array * objs)216 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs)
217 {
218 unsigned int i;
219 int ret;
220
221 if (objs->nents == 1) {
222 ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL);
223 } else {
224 ret = drm_gem_lock_reservations(objs->objs, objs->nents,
225 &objs->ticket);
226 }
227 if (ret)
228 return ret;
229
230 for (i = 0; i < objs->nents; ++i) {
231 ret = dma_resv_reserve_fences(objs->objs[i]->resv, 1);
232 if (ret) {
233 virtio_gpu_array_unlock_resv(objs);
234 return ret;
235 }
236 }
237 return ret;
238 }
239
virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array * objs)240 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs)
241 {
242 if (objs->nents == 1) {
243 dma_resv_unlock(objs->objs[0]->resv);
244 } else {
245 drm_gem_unlock_reservations(objs->objs, objs->nents,
246 &objs->ticket);
247 }
248 }
249
virtio_gpu_array_add_fence(struct virtio_gpu_object_array * objs,struct dma_fence * fence)250 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
251 struct dma_fence *fence)
252 {
253 int i;
254
255 for (i = 0; i < objs->nents; i++)
256 dma_resv_add_fence(objs->objs[i]->resv, fence,
257 DMA_RESV_USAGE_WRITE);
258 }
259
virtio_gpu_array_put_free(struct virtio_gpu_object_array * objs)260 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs)
261 {
262 u32 i;
263
264 if (!objs)
265 return;
266
267 for (i = 0; i < objs->nents; i++)
268 drm_gem_object_put(objs->objs[i]);
269 virtio_gpu_array_free(objs);
270 }
271
virtio_gpu_array_put_free_delayed(struct virtio_gpu_device * vgdev,struct virtio_gpu_object_array * objs)272 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
273 struct virtio_gpu_object_array *objs)
274 {
275 spin_lock(&vgdev->obj_free_lock);
276 list_add_tail(&objs->next, &vgdev->obj_free_list);
277 spin_unlock(&vgdev->obj_free_lock);
278 schedule_work(&vgdev->obj_free_work);
279 }
280
virtio_gpu_array_put_free_work(struct work_struct * work)281 void virtio_gpu_array_put_free_work(struct work_struct *work)
282 {
283 struct virtio_gpu_device *vgdev =
284 container_of(work, struct virtio_gpu_device, obj_free_work);
285 struct virtio_gpu_object_array *objs;
286
287 spin_lock(&vgdev->obj_free_lock);
288 while (!list_empty(&vgdev->obj_free_list)) {
289 objs = list_first_entry(&vgdev->obj_free_list,
290 struct virtio_gpu_object_array, next);
291 list_del(&objs->next);
292 spin_unlock(&vgdev->obj_free_lock);
293 virtio_gpu_array_put_free(objs);
294 spin_lock(&vgdev->obj_free_lock);
295 }
296 spin_unlock(&vgdev->obj_free_lock);
297 }
298