1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched/clock.h>
34 #include <linux/ctype.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/irq.h>
40 #include <linux/bitops.h>
41 #include <linux/crash_dump.h>
42 #include <linux/cpu.h>
43 #include <linux/cpuhotplug.h>
44
45 #include <scsi/scsi.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_transport_fc.h>
49 #include <scsi/scsi_tcq.h>
50 #include <scsi/fc/fc_fs.h>
51
52 #include "lpfc_hw4.h"
53 #include "lpfc_hw.h"
54 #include "lpfc_sli.h"
55 #include "lpfc_sli4.h"
56 #include "lpfc_nl.h"
57 #include "lpfc_disc.h"
58 #include "lpfc.h"
59 #include "lpfc_scsi.h"
60 #include "lpfc_nvme.h"
61 #include "lpfc_logmsg.h"
62 #include "lpfc_crtn.h"
63 #include "lpfc_vport.h"
64 #include "lpfc_version.h"
65 #include "lpfc_ids.h"
66
67 static enum cpuhp_state lpfc_cpuhp_state;
68 /* Used when mapping IRQ vectors in a driver centric manner */
69 static uint32_t lpfc_present_cpu;
70 static bool lpfc_pldv_detect;
71
72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
76 static int lpfc_post_rcv_buf(struct lpfc_hba *);
77 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
79 static int lpfc_setup_endian_order(struct lpfc_hba *);
80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
81 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
83 static void lpfc_init_sgl_list(struct lpfc_hba *);
84 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
85 static void lpfc_free_active_sgl(struct lpfc_hba *);
86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
91 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts);
106
107 /**
108 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
109 * @phba: pointer to lpfc hba data structure.
110 *
111 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
112 * mailbox command. It retrieves the revision information from the HBA and
113 * collects the Vital Product Data (VPD) about the HBA for preparing the
114 * configuration of the HBA.
115 *
116 * Return codes:
117 * 0 - success.
118 * -ERESTART - requests the SLI layer to reset the HBA and try again.
119 * Any other value - indicates an error.
120 **/
121 int
lpfc_config_port_prep(struct lpfc_hba * phba)122 lpfc_config_port_prep(struct lpfc_hba *phba)
123 {
124 lpfc_vpd_t *vp = &phba->vpd;
125 int i = 0, rc;
126 LPFC_MBOXQ_t *pmb;
127 MAILBOX_t *mb;
128 char *lpfc_vpd_data = NULL;
129 uint16_t offset = 0;
130 static char licensed[56] =
131 "key unlock for use with gnu public licensed code only\0";
132 static int init_key = 1;
133
134 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
135 if (!pmb) {
136 phba->link_state = LPFC_HBA_ERROR;
137 return -ENOMEM;
138 }
139
140 mb = &pmb->u.mb;
141 phba->link_state = LPFC_INIT_MBX_CMDS;
142
143 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
144 if (init_key) {
145 uint32_t *ptext = (uint32_t *) licensed;
146
147 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
148 *ptext = cpu_to_be32(*ptext);
149 init_key = 0;
150 }
151
152 lpfc_read_nv(phba, pmb);
153 memset((char*)mb->un.varRDnvp.rsvd3, 0,
154 sizeof (mb->un.varRDnvp.rsvd3));
155 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
156 sizeof (licensed));
157
158 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
159
160 if (rc != MBX_SUCCESS) {
161 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
162 "0324 Config Port initialization "
163 "error, mbxCmd x%x READ_NVPARM, "
164 "mbxStatus x%x\n",
165 mb->mbxCommand, mb->mbxStatus);
166 mempool_free(pmb, phba->mbox_mem_pool);
167 return -ERESTART;
168 }
169 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
170 sizeof(phba->wwnn));
171 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
172 sizeof(phba->wwpn));
173 }
174
175 /*
176 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
177 * which was already set in lpfc_get_cfgparam()
178 */
179 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
180
181 /* Setup and issue mailbox READ REV command */
182 lpfc_read_rev(phba, pmb);
183 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
184 if (rc != MBX_SUCCESS) {
185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
186 "0439 Adapter failed to init, mbxCmd x%x "
187 "READ_REV, mbxStatus x%x\n",
188 mb->mbxCommand, mb->mbxStatus);
189 mempool_free( pmb, phba->mbox_mem_pool);
190 return -ERESTART;
191 }
192
193
194 /*
195 * The value of rr must be 1 since the driver set the cv field to 1.
196 * This setting requires the FW to set all revision fields.
197 */
198 if (mb->un.varRdRev.rr == 0) {
199 vp->rev.rBit = 0;
200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
201 "0440 Adapter failed to init, READ_REV has "
202 "missing revision information.\n");
203 mempool_free(pmb, phba->mbox_mem_pool);
204 return -ERESTART;
205 }
206
207 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
208 mempool_free(pmb, phba->mbox_mem_pool);
209 return -EINVAL;
210 }
211
212 /* Save information as VPD data */
213 vp->rev.rBit = 1;
214 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
215 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
216 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
217 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
218 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
219 vp->rev.biuRev = mb->un.varRdRev.biuRev;
220 vp->rev.smRev = mb->un.varRdRev.smRev;
221 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
222 vp->rev.endecRev = mb->un.varRdRev.endecRev;
223 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
224 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
225 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
226 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
227 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
228 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
229
230 /* If the sli feature level is less then 9, we must
231 * tear down all RPIs and VPIs on link down if NPIV
232 * is enabled.
233 */
234 if (vp->rev.feaLevelHigh < 9)
235 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
236
237 if (lpfc_is_LC_HBA(phba->pcidev->device))
238 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
239 sizeof (phba->RandomData));
240
241 /* Get adapter VPD information */
242 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
243 if (!lpfc_vpd_data)
244 goto out_free_mbox;
245 do {
246 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
247 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
248
249 if (rc != MBX_SUCCESS) {
250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
251 "0441 VPD not present on adapter, "
252 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
253 mb->mbxCommand, mb->mbxStatus);
254 mb->un.varDmp.word_cnt = 0;
255 }
256 /* dump mem may return a zero when finished or we got a
257 * mailbox error, either way we are done.
258 */
259 if (mb->un.varDmp.word_cnt == 0)
260 break;
261
262 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
263 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
264 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
265 lpfc_vpd_data + offset,
266 mb->un.varDmp.word_cnt);
267 offset += mb->un.varDmp.word_cnt;
268 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
269
270 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
271
272 kfree(lpfc_vpd_data);
273 out_free_mbox:
274 mempool_free(pmb, phba->mbox_mem_pool);
275 return 0;
276 }
277
278 /**
279 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
280 * @phba: pointer to lpfc hba data structure.
281 * @pmboxq: pointer to the driver internal queue element for mailbox command.
282 *
283 * This is the completion handler for driver's configuring asynchronous event
284 * mailbox command to the device. If the mailbox command returns successfully,
285 * it will set internal async event support flag to 1; otherwise, it will
286 * set internal async event support flag to 0.
287 **/
288 static void
lpfc_config_async_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
290 {
291 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
292 phba->temp_sensor_support = 1;
293 else
294 phba->temp_sensor_support = 0;
295 mempool_free(pmboxq, phba->mbox_mem_pool);
296 return;
297 }
298
299 /**
300 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
301 * @phba: pointer to lpfc hba data structure.
302 * @pmboxq: pointer to the driver internal queue element for mailbox command.
303 *
304 * This is the completion handler for dump mailbox command for getting
305 * wake up parameters. When this command complete, the response contain
306 * Option rom version of the HBA. This function translate the version number
307 * into a human readable string and store it in OptionROMVersion.
308 **/
309 static void
lpfc_dump_wakeup_param_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
311 {
312 struct prog_id *prg;
313 uint32_t prog_id_word;
314 char dist = ' ';
315 /* character array used for decoding dist type. */
316 char dist_char[] = "nabx";
317
318 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
319 mempool_free(pmboxq, phba->mbox_mem_pool);
320 return;
321 }
322
323 prg = (struct prog_id *) &prog_id_word;
324
325 /* word 7 contain option rom version */
326 prog_id_word = pmboxq->u.mb.un.varWords[7];
327
328 /* Decode the Option rom version word to a readable string */
329 dist = dist_char[prg->dist];
330
331 if ((prg->dist == 3) && (prg->num == 0))
332 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
333 prg->ver, prg->rev, prg->lev);
334 else
335 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
336 prg->ver, prg->rev, prg->lev,
337 dist, prg->num);
338 mempool_free(pmboxq, phba->mbox_mem_pool);
339 return;
340 }
341
342 /**
343 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
344 * @vport: pointer to lpfc vport data structure.
345 *
346 *
347 * Return codes
348 * None.
349 **/
350 void
lpfc_update_vport_wwn(struct lpfc_vport * vport)351 lpfc_update_vport_wwn(struct lpfc_vport *vport)
352 {
353 struct lpfc_hba *phba = vport->phba;
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name))) {
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (phba->sli_rev == LPFC_SLI_REV4 &&
376 vport->port_type == LPFC_PHYSICAL_PORT &&
377 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
378 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
379 phba->sli4_hba.fawwpn_flag &=
380 ~LPFC_FAWWPN_FABRIC;
381 lpfc_printf_log(phba, KERN_INFO,
382 LOG_SLI | LOG_DISCOVERY | LOG_ELS,
383 "2701 FA-PWWN change WWPN from %llx to "
384 "%llx: vflag x%x fawwpn_flag x%x\n",
385 wwn_to_u64(vport->fc_portname.u.wwn),
386 wwn_to_u64
387 (vport->fc_sparam.portName.u.wwn),
388 vport->vport_flag,
389 phba->sli4_hba.fawwpn_flag);
390 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
391 sizeof(struct lpfc_name));
392 }
393 }
394
395 if (vport->fc_portname.u.wwn[0] == 0)
396 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
397 sizeof(struct lpfc_name));
398 else
399 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
400 sizeof(struct lpfc_name));
401 }
402
403 /**
404 * lpfc_config_port_post - Perform lpfc initialization after config port
405 * @phba: pointer to lpfc hba data structure.
406 *
407 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
408 * command call. It performs all internal resource and state setups on the
409 * port: post IOCB buffers, enable appropriate host interrupt attentions,
410 * ELS ring timers, etc.
411 *
412 * Return codes
413 * 0 - success.
414 * Any other value - error.
415 **/
416 int
lpfc_config_port_post(struct lpfc_hba * phba)417 lpfc_config_port_post(struct lpfc_hba *phba)
418 {
419 struct lpfc_vport *vport = phba->pport;
420 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
421 LPFC_MBOXQ_t *pmb;
422 MAILBOX_t *mb;
423 struct lpfc_dmabuf *mp;
424 struct lpfc_sli *psli = &phba->sli;
425 uint32_t status, timeout;
426 int i, j;
427 int rc;
428
429 spin_lock_irq(&phba->hbalock);
430 /*
431 * If the Config port completed correctly the HBA is not
432 * over heated any more.
433 */
434 if (phba->over_temp_state == HBA_OVER_TEMP)
435 phba->over_temp_state = HBA_NORMAL_TEMP;
436 spin_unlock_irq(&phba->hbalock);
437
438 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
439 if (!pmb) {
440 phba->link_state = LPFC_HBA_ERROR;
441 return -ENOMEM;
442 }
443 mb = &pmb->u.mb;
444
445 /* Get login parameters for NID. */
446 rc = lpfc_read_sparam(phba, pmb, 0);
447 if (rc) {
448 mempool_free(pmb, phba->mbox_mem_pool);
449 return -ENOMEM;
450 }
451
452 pmb->vport = vport;
453 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
455 "0448 Adapter failed init, mbxCmd x%x "
456 "READ_SPARM mbxStatus x%x\n",
457 mb->mbxCommand, mb->mbxStatus);
458 phba->link_state = LPFC_HBA_ERROR;
459 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
460 return -EIO;
461 }
462
463 mp = pmb->ctx_buf;
464
465 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
466 * longer needed. Prevent unintended ctx_buf access as the mbox is
467 * reused.
468 */
469 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
470 lpfc_mbuf_free(phba, mp->virt, mp->phys);
471 kfree(mp);
472 pmb->ctx_buf = NULL;
473 lpfc_update_vport_wwn(vport);
474
475 /* Update the fc_host data structures with new wwn. */
476 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
477 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
478 fc_host_max_npiv_vports(shost) = phba->max_vpi;
479
480 /* If no serial number in VPD data, use low 6 bytes of WWNN */
481 /* This should be consolidated into parse_vpd ? - mr */
482 if (phba->SerialNumber[0] == 0) {
483 uint8_t *outptr;
484
485 outptr = &vport->fc_nodename.u.s.IEEE[0];
486 for (i = 0; i < 12; i++) {
487 status = *outptr++;
488 j = ((status & 0xf0) >> 4);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 i++;
496 j = (status & 0xf);
497 if (j <= 9)
498 phba->SerialNumber[i] =
499 (char)((uint8_t) 0x30 + (uint8_t) j);
500 else
501 phba->SerialNumber[i] =
502 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
503 }
504 }
505
506 lpfc_read_config(phba, pmb);
507 pmb->vport = vport;
508 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
510 "0453 Adapter failed to init, mbxCmd x%x "
511 "READ_CONFIG, mbxStatus x%x\n",
512 mb->mbxCommand, mb->mbxStatus);
513 phba->link_state = LPFC_HBA_ERROR;
514 mempool_free( pmb, phba->mbox_mem_pool);
515 return -EIO;
516 }
517
518 /* Check if the port is disabled */
519 lpfc_sli_read_link_ste(phba);
520
521 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
522 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
523 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
524 "3359 HBA queue depth changed from %d to %d\n",
525 phba->cfg_hba_queue_depth,
526 mb->un.varRdConfig.max_xri);
527 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
528 }
529
530 phba->lmt = mb->un.varRdConfig.lmt;
531
532 /* Get the default values for Model Name and Description */
533 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
534
535 phba->link_state = LPFC_LINK_DOWN;
536
537 /* Only process IOCBs on ELS ring till hba_state is READY */
538 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
539 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
540 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
541 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
542
543 /* Post receive buffers for desired rings */
544 if (phba->sli_rev != 3)
545 lpfc_post_rcv_buf(phba);
546
547 /*
548 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
549 */
550 if (phba->intr_type == MSIX) {
551 rc = lpfc_config_msi(phba, pmb);
552 if (rc) {
553 mempool_free(pmb, phba->mbox_mem_pool);
554 return -EIO;
555 }
556 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
557 if (rc != MBX_SUCCESS) {
558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
559 "0352 Config MSI mailbox command "
560 "failed, mbxCmd x%x, mbxStatus x%x\n",
561 pmb->u.mb.mbxCommand,
562 pmb->u.mb.mbxStatus);
563 mempool_free(pmb, phba->mbox_mem_pool);
564 return -EIO;
565 }
566 }
567
568 spin_lock_irq(&phba->hbalock);
569 /* Initialize ERATT handling flag */
570 clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag);
571
572 /* Enable appropriate host interrupts */
573 if (lpfc_readl(phba->HCregaddr, &status)) {
574 spin_unlock_irq(&phba->hbalock);
575 return -EIO;
576 }
577 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
578 if (psli->num_rings > 0)
579 status |= HC_R0INT_ENA;
580 if (psli->num_rings > 1)
581 status |= HC_R1INT_ENA;
582 if (psli->num_rings > 2)
583 status |= HC_R2INT_ENA;
584 if (psli->num_rings > 3)
585 status |= HC_R3INT_ENA;
586
587 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
588 (phba->cfg_poll & DISABLE_FCP_RING_INT))
589 status &= ~(HC_R0INT_ENA);
590
591 writel(status, phba->HCregaddr);
592 readl(phba->HCregaddr); /* flush */
593 spin_unlock_irq(&phba->hbalock);
594
595 /* Set up ring-0 (ELS) timer */
596 timeout = phba->fc_ratov * 2;
597 mod_timer(&vport->els_tmofunc,
598 jiffies + msecs_to_jiffies(1000 * timeout));
599 /* Set up heart beat (HB) timer */
600 mod_timer(&phba->hb_tmofunc,
601 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
602 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
603 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
604 phba->last_completion_time = jiffies;
605 /* Set up error attention (ERATT) polling timer */
606 mod_timer(&phba->eratt_poll,
607 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
608
609 if (test_bit(LINK_DISABLED, &phba->hba_flag)) {
610 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
611 "2598 Adapter Link is disabled.\n");
612 lpfc_down_link(phba, pmb);
613 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
614 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
615 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
617 "2599 Adapter failed to issue DOWN_LINK"
618 " mbox command rc 0x%x\n", rc);
619
620 mempool_free(pmb, phba->mbox_mem_pool);
621 return -EIO;
622 }
623 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
624 mempool_free(pmb, phba->mbox_mem_pool);
625 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
626 if (rc)
627 return rc;
628 }
629 /* MBOX buffer will be freed in mbox compl */
630 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
631 if (!pmb) {
632 phba->link_state = LPFC_HBA_ERROR;
633 return -ENOMEM;
634 }
635
636 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
637 pmb->mbox_cmpl = lpfc_config_async_cmpl;
638 pmb->vport = phba->pport;
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640
641 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
642 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
643 "0456 Adapter failed to issue "
644 "ASYNCEVT_ENABLE mbox status x%x\n",
645 rc);
646 mempool_free(pmb, phba->mbox_mem_pool);
647 }
648
649 /* Get Option rom version */
650 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
651 if (!pmb) {
652 phba->link_state = LPFC_HBA_ERROR;
653 return -ENOMEM;
654 }
655
656 lpfc_dump_wakeup_param(phba, pmb);
657 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
658 pmb->vport = phba->pport;
659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660
661 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
662 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
663 "0435 Adapter failed "
664 "to get Option ROM version status x%x\n", rc);
665 mempool_free(pmb, phba->mbox_mem_pool);
666 }
667
668 return 0;
669 }
670
671 /**
672 * lpfc_sli4_refresh_params - update driver copy of params.
673 * @phba: Pointer to HBA context object.
674 *
675 * This is called to refresh driver copy of dynamic fields from the
676 * common_get_sli4_parameters descriptor.
677 **/
678 int
lpfc_sli4_refresh_params(struct lpfc_hba * phba)679 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
680 {
681 LPFC_MBOXQ_t *mboxq;
682 struct lpfc_mqe *mqe;
683 struct lpfc_sli4_parameters *mbx_sli4_parameters;
684 int length, rc;
685
686 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
687 if (!mboxq)
688 return -ENOMEM;
689
690 mqe = &mboxq->u.mqe;
691 /* Read the port's SLI4 Config Parameters */
692 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
693 sizeof(struct lpfc_sli4_cfg_mhdr));
694 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
695 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
696 length, LPFC_SLI4_MBX_EMBED);
697
698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
699 if (unlikely(rc)) {
700 mempool_free(mboxq, phba->mbox_mem_pool);
701 return rc;
702 }
703 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
704 phba->sli4_hba.pc_sli4_params.mi_cap =
705 bf_get(cfg_mi_ver, mbx_sli4_parameters);
706
707 /* Are we forcing MI off via module parameter? */
708 if (phba->cfg_enable_mi)
709 phba->sli4_hba.pc_sli4_params.mi_ver =
710 bf_get(cfg_mi_ver, mbx_sli4_parameters);
711 else
712 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
713
714 phba->sli4_hba.pc_sli4_params.cmf =
715 bf_get(cfg_cmf, mbx_sli4_parameters);
716 phba->sli4_hba.pc_sli4_params.pls =
717 bf_get(cfg_pvl, mbx_sli4_parameters);
718
719 mempool_free(mboxq, phba->mbox_mem_pool);
720 return rc;
721 }
722
723 /**
724 * lpfc_hba_init_link - Initialize the FC link
725 * @phba: pointer to lpfc hba data structure.
726 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
727 *
728 * This routine will issue the INIT_LINK mailbox command call.
729 * It is available to other drivers through the lpfc_hba data
730 * structure for use as a delayed link up mechanism with the
731 * module parameter lpfc_suppress_link_up.
732 *
733 * Return code
734 * 0 - success
735 * Any other value - error
736 **/
737 static int
lpfc_hba_init_link(struct lpfc_hba * phba,uint32_t flag)738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
739 {
740 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
741 }
742
743 /**
744 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
745 * @phba: pointer to lpfc hba data structure.
746 * @fc_topology: desired fc topology.
747 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
748 *
749 * This routine will issue the INIT_LINK mailbox command call.
750 * It is available to other drivers through the lpfc_hba data
751 * structure for use as a delayed link up mechanism with the
752 * module parameter lpfc_suppress_link_up.
753 *
754 * Return code
755 * 0 - success
756 * Any other value - error
757 **/
758 int
lpfc_hba_init_link_fc_topology(struct lpfc_hba * phba,uint32_t fc_topology,uint32_t flag)759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
760 uint32_t flag)
761 {
762 struct lpfc_vport *vport = phba->pport;
763 LPFC_MBOXQ_t *pmb;
764 MAILBOX_t *mb;
765 int rc;
766
767 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
768 if (!pmb) {
769 phba->link_state = LPFC_HBA_ERROR;
770 return -ENOMEM;
771 }
772 mb = &pmb->u.mb;
773 pmb->vport = vport;
774
775 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
777 !(phba->lmt & LMT_1Gb)) ||
778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
779 !(phba->lmt & LMT_2Gb)) ||
780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
781 !(phba->lmt & LMT_4Gb)) ||
782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
783 !(phba->lmt & LMT_8Gb)) ||
784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
785 !(phba->lmt & LMT_10Gb)) ||
786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
787 !(phba->lmt & LMT_16Gb)) ||
788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
789 !(phba->lmt & LMT_32Gb)) ||
790 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
791 !(phba->lmt & LMT_64Gb))) {
792 /* Reset link speed to auto */
793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
794 "1302 Invalid speed for this board:%d "
795 "Reset link speed to auto.\n",
796 phba->cfg_link_speed);
797 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
798 }
799 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
801 if (phba->sli_rev < LPFC_SLI_REV4)
802 lpfc_set_loopback_flag(phba);
803 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
804 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
805 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
806 "0498 Adapter failed to init, mbxCmd x%x "
807 "INIT_LINK, mbxStatus x%x\n",
808 mb->mbxCommand, mb->mbxStatus);
809 if (phba->sli_rev <= LPFC_SLI_REV3) {
810 /* Clear all interrupt enable conditions */
811 writel(0, phba->HCregaddr);
812 readl(phba->HCregaddr); /* flush */
813 /* Clear all pending interrupts */
814 writel(0xffffffff, phba->HAregaddr);
815 readl(phba->HAregaddr); /* flush */
816 }
817 phba->link_state = LPFC_HBA_ERROR;
818 if (rc != MBX_BUSY || flag == MBX_POLL)
819 mempool_free(pmb, phba->mbox_mem_pool);
820 return -EIO;
821 }
822 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
823 if (flag == MBX_POLL)
824 mempool_free(pmb, phba->mbox_mem_pool);
825
826 return 0;
827 }
828
829 /**
830 * lpfc_hba_down_link - this routine downs the FC link
831 * @phba: pointer to lpfc hba data structure.
832 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
833 *
834 * This routine will issue the DOWN_LINK mailbox command call.
835 * It is available to other drivers through the lpfc_hba data
836 * structure for use to stop the link.
837 *
838 * Return code
839 * 0 - success
840 * Any other value - error
841 **/
842 static int
lpfc_hba_down_link(struct lpfc_hba * phba,uint32_t flag)843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
844 {
845 LPFC_MBOXQ_t *pmb;
846 int rc;
847
848 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
849 if (!pmb) {
850 phba->link_state = LPFC_HBA_ERROR;
851 return -ENOMEM;
852 }
853
854 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
855 "0491 Adapter Link is disabled.\n");
856 lpfc_down_link(phba, pmb);
857 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
858 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
859 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
861 "2522 Adapter failed to issue DOWN_LINK"
862 " mbox command rc 0x%x\n", rc);
863
864 mempool_free(pmb, phba->mbox_mem_pool);
865 return -EIO;
866 }
867 if (flag == MBX_POLL)
868 mempool_free(pmb, phba->mbox_mem_pool);
869
870 return 0;
871 }
872
873 /**
874 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
875 * @phba: pointer to lpfc HBA data structure.
876 *
877 * This routine will do LPFC uninitialization before the HBA is reset when
878 * bringing down the SLI Layer.
879 *
880 * Return codes
881 * 0 - success.
882 * Any other value - error.
883 **/
884 int
lpfc_hba_down_prep(struct lpfc_hba * phba)885 lpfc_hba_down_prep(struct lpfc_hba *phba)
886 {
887 struct lpfc_vport **vports;
888 int i;
889
890 if (phba->sli_rev <= LPFC_SLI_REV3) {
891 /* Disable interrupts */
892 writel(0, phba->HCregaddr);
893 readl(phba->HCregaddr); /* flush */
894 }
895
896 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
897 lpfc_cleanup_discovery_resources(phba->pport);
898 else {
899 vports = lpfc_create_vport_work_array(phba);
900 if (vports != NULL)
901 for (i = 0; i <= phba->max_vports &&
902 vports[i] != NULL; i++)
903 lpfc_cleanup_discovery_resources(vports[i]);
904 lpfc_destroy_vport_work_array(phba, vports);
905 }
906 return 0;
907 }
908
909 /**
910 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
911 * rspiocb which got deferred
912 *
913 * @phba: pointer to lpfc HBA data structure.
914 *
915 * This routine will cleanup completed slow path events after HBA is reset
916 * when bringing down the SLI Layer.
917 *
918 *
919 * Return codes
920 * void.
921 **/
922 static void
lpfc_sli4_free_sp_events(struct lpfc_hba * phba)923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
924 {
925 struct lpfc_iocbq *rspiocbq;
926 struct hbq_dmabuf *dmabuf;
927 struct lpfc_cq_event *cq_event;
928
929 clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag);
930
931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
932 /* Get the response iocb from the head of work queue */
933 spin_lock_irq(&phba->hbalock);
934 list_remove_head(&phba->sli4_hba.sp_queue_event,
935 cq_event, struct lpfc_cq_event, list);
936 spin_unlock_irq(&phba->hbalock);
937
938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
939 case CQE_CODE_COMPL_WQE:
940 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
941 cq_event);
942 lpfc_sli_release_iocbq(phba, rspiocbq);
943 break;
944 case CQE_CODE_RECEIVE:
945 case CQE_CODE_RECEIVE_V1:
946 dmabuf = container_of(cq_event, struct hbq_dmabuf,
947 cq_event);
948 lpfc_in_buf_free(phba, &dmabuf->dbuf);
949 }
950 }
951 }
952
953 /**
954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
955 * @phba: pointer to lpfc HBA data structure.
956 *
957 * This routine will cleanup posted ELS buffers after the HBA is reset
958 * when bringing down the SLI Layer.
959 *
960 *
961 * Return codes
962 * void.
963 **/
964 static void
lpfc_hba_free_post_buf(struct lpfc_hba * phba)965 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
966 {
967 struct lpfc_sli *psli = &phba->sli;
968 struct lpfc_sli_ring *pring;
969 struct lpfc_dmabuf *mp, *next_mp;
970 LIST_HEAD(buflist);
971 int count;
972
973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
974 lpfc_sli_hbqbuf_free_all(phba);
975 else {
976 /* Cleanup preposted buffers on the ELS ring */
977 pring = &psli->sli3_ring[LPFC_ELS_RING];
978 spin_lock_irq(&phba->hbalock);
979 list_splice_init(&pring->postbufq, &buflist);
980 spin_unlock_irq(&phba->hbalock);
981
982 count = 0;
983 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
984 list_del(&mp->list);
985 count++;
986 lpfc_mbuf_free(phba, mp->virt, mp->phys);
987 kfree(mp);
988 }
989
990 spin_lock_irq(&phba->hbalock);
991 pring->postbufq_cnt -= count;
992 spin_unlock_irq(&phba->hbalock);
993 }
994 }
995
996 /**
997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * void
1005 **/
1006 static void
lpfc_hba_clean_txcmplq(struct lpfc_hba * phba)1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1008 {
1009 struct lpfc_sli *psli = &phba->sli;
1010 struct lpfc_queue *qp = NULL;
1011 struct lpfc_sli_ring *pring;
1012 LIST_HEAD(completions);
1013 int i;
1014 struct lpfc_iocbq *piocb, *next_iocb;
1015
1016 if (phba->sli_rev != LPFC_SLI_REV4) {
1017 for (i = 0; i < psli->num_rings; i++) {
1018 pring = &psli->sli3_ring[i];
1019 spin_lock_irq(&phba->hbalock);
1020 /* At this point in time the HBA is either reset or DOA
1021 * Nothing should be on txcmplq as it will
1022 * NEVER complete.
1023 */
1024 list_splice_init(&pring->txcmplq, &completions);
1025 pring->txcmplq_cnt = 0;
1026 spin_unlock_irq(&phba->hbalock);
1027
1028 lpfc_sli_abort_iocb_ring(phba, pring);
1029 }
1030 /* Cancel all the IOCBs from the completions list */
1031 lpfc_sli_cancel_iocbs(phba, &completions,
1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1033 return;
1034 }
1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1036 pring = qp->pring;
1037 if (!pring)
1038 continue;
1039 spin_lock_irq(&pring->ring_lock);
1040 list_for_each_entry_safe(piocb, next_iocb,
1041 &pring->txcmplq, list)
1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1043 list_splice_init(&pring->txcmplq, &completions);
1044 pring->txcmplq_cnt = 0;
1045 spin_unlock_irq(&pring->ring_lock);
1046 lpfc_sli_abort_iocb_ring(phba, pring);
1047 }
1048 /* Cancel all the IOCBs from the completions list */
1049 lpfc_sli_cancel_iocbs(phba, &completions,
1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1051 }
1052
1053 /**
1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1055 * @phba: pointer to lpfc HBA data structure.
1056 *
1057 * This routine will do uninitialization after the HBA is reset when bring
1058 * down the SLI Layer.
1059 *
1060 * Return codes
1061 * 0 - success.
1062 * Any other value - error.
1063 **/
1064 static int
lpfc_hba_down_post_s3(struct lpfc_hba * phba)1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1066 {
1067 lpfc_hba_free_post_buf(phba);
1068 lpfc_hba_clean_txcmplq(phba);
1069 return 0;
1070 }
1071
1072 /**
1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1074 * @phba: pointer to lpfc HBA data structure.
1075 *
1076 * This routine will do uninitialization after the HBA is reset when bring
1077 * down the SLI Layer.
1078 *
1079 * Return codes
1080 * 0 - success.
1081 * Any other value - error.
1082 **/
1083 static int
lpfc_hba_down_post_s4(struct lpfc_hba * phba)1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1085 {
1086 struct lpfc_io_buf *psb, *psb_next;
1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1088 struct lpfc_sli4_hdw_queue *qp;
1089 LIST_HEAD(aborts);
1090 LIST_HEAD(nvme_aborts);
1091 LIST_HEAD(nvmet_aborts);
1092 struct lpfc_sglq *sglq_entry = NULL;
1093 int cnt, idx;
1094
1095
1096 lpfc_sli_hbqbuf_free_all(phba);
1097 lpfc_hba_clean_txcmplq(phba);
1098
1099 /* At this point in time the HBA is either reset or DOA. Either
1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1101 * on the lpfc_els_sgl_list so that it can either be freed if the
1102 * driver is unloading or reposted if the driver is restarting
1103 * the port.
1104 */
1105
1106 /* sgl_list_lock required because worker thread uses this
1107 * list.
1108 */
1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1110 list_for_each_entry(sglq_entry,
1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1112 sglq_entry->state = SGL_FREED;
1113
1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 &phba->sli4_hba.lpfc_els_sgl_list);
1116
1117
1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1119
1120 /* abts_xxxx_buf_list_lock required because worker thread uses this
1121 * list.
1122 */
1123 spin_lock_irq(&phba->hbalock);
1124 cnt = 0;
1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1126 qp = &phba->sli4_hba.hdwq[idx];
1127
1128 spin_lock(&qp->abts_io_buf_list_lock);
1129 list_splice_init(&qp->lpfc_abts_io_buf_list,
1130 &aborts);
1131
1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1133 psb->pCmd = NULL;
1134 psb->status = IOSTAT_SUCCESS;
1135 cnt++;
1136 }
1137 spin_lock(&qp->io_buf_list_put_lock);
1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1139 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1140 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1141 qp->abts_scsi_io_bufs = 0;
1142 qp->abts_nvme_io_bufs = 0;
1143 spin_unlock(&qp->io_buf_list_put_lock);
1144 spin_unlock(&qp->abts_io_buf_list_lock);
1145 }
1146 spin_unlock_irq(&phba->hbalock);
1147
1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1151 &nvmet_aborts);
1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1156 }
1157 }
1158
1159 lpfc_sli4_free_sp_events(phba);
1160 return cnt;
1161 }
1162
1163 /**
1164 * lpfc_hba_down_post - Wrapper func for hba down post routine
1165 * @phba: pointer to lpfc HBA data structure.
1166 *
1167 * This routine wraps the actual SLI3 or SLI4 routine for performing
1168 * uninitialization after the HBA is reset when bring down the SLI Layer.
1169 *
1170 * Return codes
1171 * 0 - success.
1172 * Any other value - error.
1173 **/
1174 int
lpfc_hba_down_post(struct lpfc_hba * phba)1175 lpfc_hba_down_post(struct lpfc_hba *phba)
1176 {
1177 return (*phba->lpfc_hba_down_post)(phba);
1178 }
1179
1180 /**
1181 * lpfc_hb_timeout - The HBA-timer timeout handler
1182 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1183 *
1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1186 * work-port-events bitmap and the worker thread is notified. This timeout
1187 * event will be used by the worker thread to invoke the actual timeout
1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1189 * be performed in the timeout handler and the HBA timeout event bit shall
1190 * be cleared by the worker thread after it has taken the event bitmap out.
1191 **/
1192 static void
lpfc_hb_timeout(struct timer_list * t)1193 lpfc_hb_timeout(struct timer_list *t)
1194 {
1195 struct lpfc_hba *phba;
1196 uint32_t tmo_posted;
1197 unsigned long iflag;
1198
1199 phba = from_timer(phba, t, hb_tmofunc);
1200
1201 /* Check for heart beat timeout conditions */
1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1204 if (!tmo_posted)
1205 phba->pport->work_port_events |= WORKER_HB_TMO;
1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1207
1208 /* Tell the worker thread there is work to do */
1209 if (!tmo_posted)
1210 lpfc_worker_wake_up(phba);
1211 return;
1212 }
1213
1214 /**
1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1216 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1217 *
1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1220 * work-port-events bitmap and the worker thread is notified. This timeout
1221 * event will be used by the worker thread to invoke the actual timeout
1222 * handler routine, lpfc_rrq_handler. Any periodical operations will
1223 * be performed in the timeout handler and the RRQ timeout event bit shall
1224 * be cleared by the worker thread after it has taken the event bitmap out.
1225 **/
1226 static void
lpfc_rrq_timeout(struct timer_list * t)1227 lpfc_rrq_timeout(struct timer_list *t)
1228 {
1229 struct lpfc_hba *phba;
1230
1231 phba = from_timer(phba, t, rrq_tmr);
1232 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1233 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1234 return;
1235 }
1236
1237 set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1238 lpfc_worker_wake_up(phba);
1239 }
1240
1241 /**
1242 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1243 * @phba: pointer to lpfc hba data structure.
1244 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1245 *
1246 * This is the callback function to the lpfc heart-beat mailbox command.
1247 * If configured, the lpfc driver issues the heart-beat mailbox command to
1248 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1249 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1250 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1251 * heart-beat outstanding state. Once the mailbox command comes back and
1252 * no error conditions detected, the heart-beat mailbox command timer is
1253 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1254 * state is cleared for the next heart-beat. If the timer expired with the
1255 * heart-beat outstanding state set, the driver will put the HBA offline.
1256 **/
1257 static void
lpfc_hb_mbox_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1259 {
1260 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
1261 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1262
1263 /* Check and reset heart-beat timer if necessary */
1264 mempool_free(pmboxq, phba->mbox_mem_pool);
1265 if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) &&
1266 !(phba->link_state == LPFC_HBA_ERROR) &&
1267 !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1268 mod_timer(&phba->hb_tmofunc,
1269 jiffies +
1270 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1271 return;
1272 }
1273
1274 /*
1275 * lpfc_idle_stat_delay_work - idle_stat tracking
1276 *
1277 * This routine tracks per-eq idle_stat and determines polling decisions.
1278 *
1279 * Return codes:
1280 * None
1281 **/
1282 static void
lpfc_idle_stat_delay_work(struct work_struct * work)1283 lpfc_idle_stat_delay_work(struct work_struct *work)
1284 {
1285 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1286 struct lpfc_hba,
1287 idle_stat_delay_work);
1288 struct lpfc_queue *eq;
1289 struct lpfc_sli4_hdw_queue *hdwq;
1290 struct lpfc_idle_stat *idle_stat;
1291 u32 i, idle_percent;
1292 u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1293
1294 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
1295 return;
1296
1297 if (phba->link_state == LPFC_HBA_ERROR ||
1298 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) ||
1299 phba->cmf_active_mode != LPFC_CFG_OFF)
1300 goto requeue;
1301
1302 for_each_present_cpu(i) {
1303 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1304 eq = hdwq->hba_eq;
1305
1306 /* Skip if we've already handled this eq's primary CPU */
1307 if (eq->chann != i)
1308 continue;
1309
1310 idle_stat = &phba->sli4_hba.idle_stat[i];
1311
1312 /* get_cpu_idle_time returns values as running counters. Thus,
1313 * to know the amount for this period, the prior counter values
1314 * need to be subtracted from the current counter values.
1315 * From there, the idle time stat can be calculated as a
1316 * percentage of 100 - the sum of the other consumption times.
1317 */
1318 wall_idle = get_cpu_idle_time(i, &wall, 1);
1319 diff_idle = wall_idle - idle_stat->prev_idle;
1320 diff_wall = wall - idle_stat->prev_wall;
1321
1322 if (diff_wall <= diff_idle)
1323 busy_time = 0;
1324 else
1325 busy_time = diff_wall - diff_idle;
1326
1327 idle_percent = div64_u64(100 * busy_time, diff_wall);
1328 idle_percent = 100 - idle_percent;
1329
1330 if (idle_percent < 15)
1331 eq->poll_mode = LPFC_QUEUE_WORK;
1332 else
1333 eq->poll_mode = LPFC_THREADED_IRQ;
1334
1335 idle_stat->prev_idle = wall_idle;
1336 idle_stat->prev_wall = wall;
1337 }
1338
1339 requeue:
1340 schedule_delayed_work(&phba->idle_stat_delay_work,
1341 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1342 }
1343
1344 static void
lpfc_hb_eq_delay_work(struct work_struct * work)1345 lpfc_hb_eq_delay_work(struct work_struct *work)
1346 {
1347 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1348 struct lpfc_hba, eq_delay_work);
1349 struct lpfc_eq_intr_info *eqi, *eqi_new;
1350 struct lpfc_queue *eq, *eq_next;
1351 unsigned char *ena_delay = NULL;
1352 uint32_t usdelay;
1353 int i;
1354
1355 if (!phba->cfg_auto_imax ||
1356 test_bit(FC_UNLOADING, &phba->pport->load_flag))
1357 return;
1358
1359 if (phba->link_state == LPFC_HBA_ERROR ||
1360 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1361 goto requeue;
1362
1363 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1364 GFP_KERNEL);
1365 if (!ena_delay)
1366 goto requeue;
1367
1368 for (i = 0; i < phba->cfg_irq_chann; i++) {
1369 /* Get the EQ corresponding to the IRQ vector */
1370 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1371 if (!eq)
1372 continue;
1373 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1374 eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1375 ena_delay[eq->last_cpu] = 1;
1376 }
1377 }
1378
1379 for_each_present_cpu(i) {
1380 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1381 if (ena_delay[i]) {
1382 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1383 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1384 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1385 } else {
1386 usdelay = 0;
1387 }
1388
1389 eqi->icnt = 0;
1390
1391 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1392 if (unlikely(eq->last_cpu != i)) {
1393 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1394 eq->last_cpu);
1395 list_move_tail(&eq->cpu_list, &eqi_new->list);
1396 continue;
1397 }
1398 if (usdelay != eq->q_mode)
1399 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1400 usdelay);
1401 }
1402 }
1403
1404 kfree(ena_delay);
1405
1406 requeue:
1407 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1408 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1409 }
1410
1411 /**
1412 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1413 * @phba: pointer to lpfc hba data structure.
1414 *
1415 * For each heartbeat, this routine does some heuristic methods to adjust
1416 * XRI distribution. The goal is to fully utilize free XRIs.
1417 **/
lpfc_hb_mxp_handler(struct lpfc_hba * phba)1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1419 {
1420 u32 i;
1421 u32 hwq_count;
1422
1423 hwq_count = phba->cfg_hdw_queue;
1424 for (i = 0; i < hwq_count; i++) {
1425 /* Adjust XRIs in private pool */
1426 lpfc_adjust_pvt_pool_count(phba, i);
1427
1428 /* Adjust high watermark */
1429 lpfc_adjust_high_watermark(phba, i);
1430
1431 #ifdef LPFC_MXP_STAT
1432 /* Snapshot pbl, pvt and busy count */
1433 lpfc_snapshot_mxp(phba, i);
1434 #endif
1435 }
1436 }
1437
1438 /**
1439 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1440 * @phba: pointer to lpfc hba data structure.
1441 *
1442 * If a HB mbox is not already in progrees, this routine will allocate
1443 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1444 * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1445 **/
1446 int
lpfc_issue_hb_mbox(struct lpfc_hba * phba)1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1448 {
1449 LPFC_MBOXQ_t *pmboxq;
1450 int retval;
1451
1452 /* Is a Heartbeat mbox already in progress */
1453 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1454 return 0;
1455
1456 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1457 if (!pmboxq)
1458 return -ENOMEM;
1459
1460 lpfc_heart_beat(phba, pmboxq);
1461 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1462 pmboxq->vport = phba->pport;
1463 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1464
1465 if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1466 mempool_free(pmboxq, phba->mbox_mem_pool);
1467 return -ENXIO;
1468 }
1469 set_bit(HBA_HBEAT_INP, &phba->hba_flag);
1470
1471 return 0;
1472 }
1473
1474 /**
1475 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1476 * @phba: pointer to lpfc hba data structure.
1477 *
1478 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1479 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1480 * of the value of lpfc_enable_hba_heartbeat.
1481 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1482 * try to issue a MBX_HEARTBEAT mbox command.
1483 **/
1484 void
lpfc_issue_hb_tmo(struct lpfc_hba * phba)1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1486 {
1487 if (phba->cfg_enable_hba_heartbeat)
1488 return;
1489 set_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1490 }
1491
1492 /**
1493 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1494 * @phba: pointer to lpfc hba data structure.
1495 *
1496 * This is the actual HBA-timer timeout handler to be invoked by the worker
1497 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1498 * handler performs any periodic operations needed for the device. If such
1499 * periodic event has already been attended to either in the interrupt handler
1500 * or by processing slow-ring or fast-ring events within the HBA-timer
1501 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1502 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1503 * is configured and there is no heart-beat mailbox command outstanding, a
1504 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1505 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1506 * to offline.
1507 **/
1508 void
lpfc_hb_timeout_handler(struct lpfc_hba * phba)1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1510 {
1511 struct lpfc_vport **vports;
1512 struct lpfc_dmabuf *buf_ptr;
1513 int retval = 0;
1514 int i, tmo;
1515 struct lpfc_sli *psli = &phba->sli;
1516 LIST_HEAD(completions);
1517
1518 if (phba->cfg_xri_rebalancing) {
1519 /* Multi-XRI pools handler */
1520 lpfc_hb_mxp_handler(phba);
1521 }
1522
1523 vports = lpfc_create_vport_work_array(phba);
1524 if (vports != NULL)
1525 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1526 lpfc_rcv_seq_check_edtov(vports[i]);
1527 lpfc_fdmi_change_check(vports[i]);
1528 }
1529 lpfc_destroy_vport_work_array(phba, vports);
1530
1531 if (phba->link_state == LPFC_HBA_ERROR ||
1532 test_bit(FC_UNLOADING, &phba->pport->load_flag) ||
1533 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1534 return;
1535
1536 if (phba->elsbuf_cnt &&
1537 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1538 spin_lock_irq(&phba->hbalock);
1539 list_splice_init(&phba->elsbuf, &completions);
1540 phba->elsbuf_cnt = 0;
1541 phba->elsbuf_prev_cnt = 0;
1542 spin_unlock_irq(&phba->hbalock);
1543
1544 while (!list_empty(&completions)) {
1545 list_remove_head(&completions, buf_ptr,
1546 struct lpfc_dmabuf, list);
1547 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1548 kfree(buf_ptr);
1549 }
1550 }
1551 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1552
1553 /* If there is no heart beat outstanding, issue a heartbeat command */
1554 if (phba->cfg_enable_hba_heartbeat) {
1555 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1556 spin_lock_irq(&phba->pport->work_port_lock);
1557 if (time_after(phba->last_completion_time +
1558 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1559 jiffies)) {
1560 spin_unlock_irq(&phba->pport->work_port_lock);
1561 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1562 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1563 else
1564 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1565 goto out;
1566 }
1567 spin_unlock_irq(&phba->pport->work_port_lock);
1568
1569 /* Check if a MBX_HEARTBEAT is already in progress */
1570 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) {
1571 /*
1572 * If heart beat timeout called with HBA_HBEAT_INP set
1573 * we need to give the hb mailbox cmd a chance to
1574 * complete or TMO.
1575 */
1576 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1577 "0459 Adapter heartbeat still outstanding: "
1578 "last compl time was %d ms.\n",
1579 jiffies_to_msecs(jiffies
1580 - phba->last_completion_time));
1581 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1582 } else {
1583 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1584 (list_empty(&psli->mboxq))) {
1585
1586 retval = lpfc_issue_hb_mbox(phba);
1587 if (retval) {
1588 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1589 goto out;
1590 }
1591 phba->skipped_hb = 0;
1592 } else if (time_before_eq(phba->last_completion_time,
1593 phba->skipped_hb)) {
1594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1595 "2857 Last completion time not "
1596 " updated in %d ms\n",
1597 jiffies_to_msecs(jiffies
1598 - phba->last_completion_time));
1599 } else
1600 phba->skipped_hb = jiffies;
1601
1602 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1603 goto out;
1604 }
1605 } else {
1606 /* Check to see if we want to force a MBX_HEARTBEAT */
1607 if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) {
1608 retval = lpfc_issue_hb_mbox(phba);
1609 if (retval)
1610 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1611 else
1612 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1613 goto out;
1614 }
1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1616 }
1617 out:
1618 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1619 }
1620
1621 /**
1622 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1623 * @phba: pointer to lpfc hba data structure.
1624 *
1625 * This routine is called to bring the HBA offline when HBA hardware error
1626 * other than Port Error 6 has been detected.
1627 **/
1628 static void
lpfc_offline_eratt(struct lpfc_hba * phba)1629 lpfc_offline_eratt(struct lpfc_hba *phba)
1630 {
1631 struct lpfc_sli *psli = &phba->sli;
1632
1633 spin_lock_irq(&phba->hbalock);
1634 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1635 spin_unlock_irq(&phba->hbalock);
1636 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1637
1638 lpfc_offline(phba);
1639 lpfc_reset_barrier(phba);
1640 spin_lock_irq(&phba->hbalock);
1641 lpfc_sli_brdreset(phba);
1642 spin_unlock_irq(&phba->hbalock);
1643 lpfc_hba_down_post(phba);
1644 lpfc_sli_brdready(phba, HS_MBRDY);
1645 lpfc_unblock_mgmt_io(phba);
1646 phba->link_state = LPFC_HBA_ERROR;
1647 return;
1648 }
1649
1650 /**
1651 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1652 * @phba: pointer to lpfc hba data structure.
1653 *
1654 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1655 * other than Port Error 6 has been detected.
1656 **/
1657 void
lpfc_sli4_offline_eratt(struct lpfc_hba * phba)1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1659 {
1660 spin_lock_irq(&phba->hbalock);
1661 if (phba->link_state == LPFC_HBA_ERROR &&
1662 test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1663 spin_unlock_irq(&phba->hbalock);
1664 return;
1665 }
1666 phba->link_state = LPFC_HBA_ERROR;
1667 spin_unlock_irq(&phba->hbalock);
1668
1669 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1670 lpfc_sli_flush_io_rings(phba);
1671 lpfc_offline(phba);
1672 lpfc_hba_down_post(phba);
1673 lpfc_unblock_mgmt_io(phba);
1674 }
1675
1676 /**
1677 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1678 * @phba: pointer to lpfc hba data structure.
1679 *
1680 * This routine is invoked to handle the deferred HBA hardware error
1681 * conditions. This type of error is indicated by HBA by setting ER1
1682 * and another ER bit in the host status register. The driver will
1683 * wait until the ER1 bit clears before handling the error condition.
1684 **/
1685 static void
lpfc_handle_deferred_eratt(struct lpfc_hba * phba)1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1687 {
1688 uint32_t old_host_status = phba->work_hs;
1689 struct lpfc_sli *psli = &phba->sli;
1690
1691 /* If the pci channel is offline, ignore possible errors,
1692 * since we cannot communicate with the pci card anyway.
1693 */
1694 if (pci_channel_offline(phba->pcidev)) {
1695 clear_bit(DEFER_ERATT, &phba->hba_flag);
1696 return;
1697 }
1698
1699 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1700 "0479 Deferred Adapter Hardware Error "
1701 "Data: x%x x%x x%x\n",
1702 phba->work_hs, phba->work_status[0],
1703 phba->work_status[1]);
1704
1705 spin_lock_irq(&phba->hbalock);
1706 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1707 spin_unlock_irq(&phba->hbalock);
1708
1709
1710 /*
1711 * Firmware stops when it triggred erratt. That could cause the I/Os
1712 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1713 * SCSI layer retry it after re-establishing link.
1714 */
1715 lpfc_sli_abort_fcp_rings(phba);
1716
1717 /*
1718 * There was a firmware error. Take the hba offline and then
1719 * attempt to restart it.
1720 */
1721 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1722 lpfc_offline(phba);
1723
1724 /* Wait for the ER1 bit to clear.*/
1725 while (phba->work_hs & HS_FFER1) {
1726 msleep(100);
1727 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1728 phba->work_hs = UNPLUG_ERR ;
1729 break;
1730 }
1731 /* If driver is unloading let the worker thread continue */
1732 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1733 phba->work_hs = 0;
1734 break;
1735 }
1736 }
1737
1738 /*
1739 * This is to ptrotect against a race condition in which
1740 * first write to the host attention register clear the
1741 * host status register.
1742 */
1743 if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1744 phba->work_hs = old_host_status & ~HS_FFER1;
1745
1746 clear_bit(DEFER_ERATT, &phba->hba_flag);
1747 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1748 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1749 }
1750
1751 static void
lpfc_board_errevt_to_mgmt(struct lpfc_hba * phba)1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1753 {
1754 struct lpfc_board_event_header board_event;
1755 struct Scsi_Host *shost;
1756
1757 board_event.event_type = FC_REG_BOARD_EVENT;
1758 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1759 shost = lpfc_shost_from_vport(phba->pport);
1760 fc_host_post_vendor_event(shost, fc_get_event_number(),
1761 sizeof(board_event),
1762 (char *) &board_event,
1763 LPFC_NL_VENDOR_ID);
1764 }
1765
1766 /**
1767 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1768 * @phba: pointer to lpfc hba data structure.
1769 *
1770 * This routine is invoked to handle the following HBA hardware error
1771 * conditions:
1772 * 1 - HBA error attention interrupt
1773 * 2 - DMA ring index out of range
1774 * 3 - Mailbox command came back as unknown
1775 **/
1776 static void
lpfc_handle_eratt_s3(struct lpfc_hba * phba)1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1778 {
1779 struct lpfc_vport *vport = phba->pport;
1780 struct lpfc_sli *psli = &phba->sli;
1781 uint32_t event_data;
1782 unsigned long temperature;
1783 struct temp_event temp_event_data;
1784 struct Scsi_Host *shost;
1785
1786 /* If the pci channel is offline, ignore possible errors,
1787 * since we cannot communicate with the pci card anyway.
1788 */
1789 if (pci_channel_offline(phba->pcidev)) {
1790 clear_bit(DEFER_ERATT, &phba->hba_flag);
1791 return;
1792 }
1793
1794 /* If resets are disabled then leave the HBA alone and return */
1795 if (!phba->cfg_enable_hba_reset)
1796 return;
1797
1798 /* Send an internal error event to mgmt application */
1799 lpfc_board_errevt_to_mgmt(phba);
1800
1801 if (test_bit(DEFER_ERATT, &phba->hba_flag))
1802 lpfc_handle_deferred_eratt(phba);
1803
1804 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1805 if (phba->work_hs & HS_FFER6)
1806 /* Re-establishing Link */
1807 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1808 "1301 Re-establishing Link "
1809 "Data: x%x x%x x%x\n",
1810 phba->work_hs, phba->work_status[0],
1811 phba->work_status[1]);
1812 if (phba->work_hs & HS_FFER8)
1813 /* Device Zeroization */
1814 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1815 "2861 Host Authentication device "
1816 "zeroization Data:x%x x%x x%x\n",
1817 phba->work_hs, phba->work_status[0],
1818 phba->work_status[1]);
1819
1820 spin_lock_irq(&phba->hbalock);
1821 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1822 spin_unlock_irq(&phba->hbalock);
1823
1824 /*
1825 * Firmware stops when it triggled erratt with HS_FFER6.
1826 * That could cause the I/Os dropped by the firmware.
1827 * Error iocb (I/O) on txcmplq and let the SCSI layer
1828 * retry it after re-establishing link.
1829 */
1830 lpfc_sli_abort_fcp_rings(phba);
1831
1832 /*
1833 * There was a firmware error. Take the hba offline and then
1834 * attempt to restart it.
1835 */
1836 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1837 lpfc_offline(phba);
1838 lpfc_sli_brdrestart(phba);
1839 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1840 lpfc_unblock_mgmt_io(phba);
1841 return;
1842 }
1843 lpfc_unblock_mgmt_io(phba);
1844 } else if (phba->work_hs & HS_CRIT_TEMP) {
1845 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1846 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1847 temp_event_data.event_code = LPFC_CRIT_TEMP;
1848 temp_event_data.data = (uint32_t)temperature;
1849
1850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1851 "0406 Adapter maximum temperature exceeded "
1852 "(%ld), taking this port offline "
1853 "Data: x%x x%x x%x\n",
1854 temperature, phba->work_hs,
1855 phba->work_status[0], phba->work_status[1]);
1856
1857 shost = lpfc_shost_from_vport(phba->pport);
1858 fc_host_post_vendor_event(shost, fc_get_event_number(),
1859 sizeof(temp_event_data),
1860 (char *) &temp_event_data,
1861 SCSI_NL_VID_TYPE_PCI
1862 | PCI_VENDOR_ID_EMULEX);
1863
1864 spin_lock_irq(&phba->hbalock);
1865 phba->over_temp_state = HBA_OVER_TEMP;
1866 spin_unlock_irq(&phba->hbalock);
1867 lpfc_offline_eratt(phba);
1868
1869 } else {
1870 /* The if clause above forces this code path when the status
1871 * failure is a value other than FFER6. Do not call the offline
1872 * twice. This is the adapter hardware error path.
1873 */
1874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1875 "0457 Adapter Hardware Error "
1876 "Data: x%x x%x x%x\n",
1877 phba->work_hs,
1878 phba->work_status[0], phba->work_status[1]);
1879
1880 event_data = FC_REG_DUMP_EVENT;
1881 shost = lpfc_shost_from_vport(vport);
1882 fc_host_post_vendor_event(shost, fc_get_event_number(),
1883 sizeof(event_data), (char *) &event_data,
1884 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1885
1886 lpfc_offline_eratt(phba);
1887 }
1888 return;
1889 }
1890
1891 /**
1892 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1893 * @phba: pointer to lpfc hba data structure.
1894 * @mbx_action: flag for mailbox shutdown action.
1895 * @en_rn_msg: send reset/port recovery message.
1896 * This routine is invoked to perform an SLI4 port PCI function reset in
1897 * response to port status register polling attention. It waits for port
1898 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1899 * During this process, interrupt vectors are freed and later requested
1900 * for handling possible port resource change.
1901 **/
1902 static int
lpfc_sli4_port_sta_fn_reset(struct lpfc_hba * phba,int mbx_action,bool en_rn_msg)1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1904 bool en_rn_msg)
1905 {
1906 int rc;
1907 uint32_t intr_mode;
1908 LPFC_MBOXQ_t *mboxq;
1909
1910 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1911 LPFC_SLI_INTF_IF_TYPE_2) {
1912 /*
1913 * On error status condition, driver need to wait for port
1914 * ready before performing reset.
1915 */
1916 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1917 if (rc)
1918 return rc;
1919 }
1920
1921 /* need reset: attempt for port recovery */
1922 if (en_rn_msg)
1923 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1924 "2887 Reset Needed: Attempting Port "
1925 "Recovery...\n");
1926
1927 /* If we are no wait, the HBA has been reset and is not
1928 * functional, thus we should clear
1929 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1930 */
1931 if (mbx_action == LPFC_MBX_NO_WAIT) {
1932 spin_lock_irq(&phba->hbalock);
1933 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1934 if (phba->sli.mbox_active) {
1935 mboxq = phba->sli.mbox_active;
1936 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1937 __lpfc_mbox_cmpl_put(phba, mboxq);
1938 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1939 phba->sli.mbox_active = NULL;
1940 }
1941 spin_unlock_irq(&phba->hbalock);
1942 }
1943
1944 lpfc_offline_prep(phba, mbx_action);
1945 lpfc_sli_flush_io_rings(phba);
1946 lpfc_offline(phba);
1947 /* release interrupt for possible resource change */
1948 lpfc_sli4_disable_intr(phba);
1949 rc = lpfc_sli_brdrestart(phba);
1950 if (rc) {
1951 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1952 "6309 Failed to restart board\n");
1953 return rc;
1954 }
1955 /* request and enable interrupt */
1956 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1957 if (intr_mode == LPFC_INTR_ERROR) {
1958 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1959 "3175 Failed to enable interrupt\n");
1960 return -EIO;
1961 }
1962 phba->intr_mode = intr_mode;
1963 rc = lpfc_online(phba);
1964 if (rc == 0)
1965 lpfc_unblock_mgmt_io(phba);
1966
1967 return rc;
1968 }
1969
1970 /**
1971 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1972 * @phba: pointer to lpfc hba data structure.
1973 *
1974 * This routine is invoked to handle the SLI4 HBA hardware error attention
1975 * conditions.
1976 **/
1977 static void
lpfc_handle_eratt_s4(struct lpfc_hba * phba)1978 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1979 {
1980 struct lpfc_vport *vport = phba->pport;
1981 uint32_t event_data;
1982 struct Scsi_Host *shost;
1983 uint32_t if_type;
1984 struct lpfc_register portstat_reg = {0};
1985 uint32_t reg_err1, reg_err2;
1986 uint32_t uerrlo_reg, uemasklo_reg;
1987 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1988 bool en_rn_msg = true;
1989 struct temp_event temp_event_data;
1990 struct lpfc_register portsmphr_reg;
1991 int rc, i;
1992
1993 /* If the pci channel is offline, ignore possible errors, since
1994 * we cannot communicate with the pci card anyway.
1995 */
1996 if (pci_channel_offline(phba->pcidev)) {
1997 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1998 "3166 pci channel is offline\n");
1999 lpfc_sli_flush_io_rings(phba);
2000 return;
2001 }
2002
2003 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2004 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2005 switch (if_type) {
2006 case LPFC_SLI_INTF_IF_TYPE_0:
2007 pci_rd_rc1 = lpfc_readl(
2008 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2009 &uerrlo_reg);
2010 pci_rd_rc2 = lpfc_readl(
2011 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2012 &uemasklo_reg);
2013 /* consider PCI bus read error as pci_channel_offline */
2014 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2015 return;
2016 if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) {
2017 lpfc_sli4_offline_eratt(phba);
2018 return;
2019 }
2020 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2021 "7623 Checking UE recoverable");
2022
2023 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2024 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2025 &portsmphr_reg.word0))
2026 continue;
2027
2028 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2029 &portsmphr_reg);
2030 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2031 LPFC_PORT_SEM_UE_RECOVERABLE)
2032 break;
2033 /*Sleep for 1Sec, before checking SEMAPHORE */
2034 msleep(1000);
2035 }
2036
2037 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2038 "4827 smphr_port_status x%x : Waited %dSec",
2039 smphr_port_status, i);
2040
2041 /* Recoverable UE, reset the HBA device */
2042 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2043 LPFC_PORT_SEM_UE_RECOVERABLE) {
2044 for (i = 0; i < 20; i++) {
2045 msleep(1000);
2046 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2047 &portsmphr_reg.word0) &&
2048 (LPFC_POST_STAGE_PORT_READY ==
2049 bf_get(lpfc_port_smphr_port_status,
2050 &portsmphr_reg))) {
2051 rc = lpfc_sli4_port_sta_fn_reset(phba,
2052 LPFC_MBX_NO_WAIT, en_rn_msg);
2053 if (rc == 0)
2054 return;
2055 lpfc_printf_log(phba, KERN_ERR,
2056 LOG_TRACE_EVENT,
2057 "4215 Failed to recover UE");
2058 break;
2059 }
2060 }
2061 }
2062 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2063 "7624 Firmware not ready: Failing UE recovery,"
2064 " waited %dSec", i);
2065 phba->link_state = LPFC_HBA_ERROR;
2066 break;
2067
2068 case LPFC_SLI_INTF_IF_TYPE_2:
2069 case LPFC_SLI_INTF_IF_TYPE_6:
2070 pci_rd_rc1 = lpfc_readl(
2071 phba->sli4_hba.u.if_type2.STATUSregaddr,
2072 &portstat_reg.word0);
2073 /* consider PCI bus read error as pci_channel_offline */
2074 if (pci_rd_rc1 == -EIO) {
2075 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2076 "3151 PCI bus read access failure: x%x\n",
2077 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2078 lpfc_sli4_offline_eratt(phba);
2079 return;
2080 }
2081 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2082 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2083 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2084 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2085 "2889 Port Overtemperature event, "
2086 "taking port offline Data: x%x x%x\n",
2087 reg_err1, reg_err2);
2088
2089 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2090 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2091 temp_event_data.event_code = LPFC_CRIT_TEMP;
2092 temp_event_data.data = 0xFFFFFFFF;
2093
2094 shost = lpfc_shost_from_vport(phba->pport);
2095 fc_host_post_vendor_event(shost, fc_get_event_number(),
2096 sizeof(temp_event_data),
2097 (char *)&temp_event_data,
2098 SCSI_NL_VID_TYPE_PCI
2099 | PCI_VENDOR_ID_EMULEX);
2100
2101 spin_lock_irq(&phba->hbalock);
2102 phba->over_temp_state = HBA_OVER_TEMP;
2103 spin_unlock_irq(&phba->hbalock);
2104 lpfc_sli4_offline_eratt(phba);
2105 return;
2106 }
2107 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2108 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2109 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2110 "3143 Port Down: Firmware Update "
2111 "Detected\n");
2112 en_rn_msg = false;
2113 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2114 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2115 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2116 "3144 Port Down: Debug Dump\n");
2117 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2118 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2119 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2120 "3145 Port Down: Provisioning\n");
2121
2122 /* If resets are disabled then leave the HBA alone and return */
2123 if (!phba->cfg_enable_hba_reset)
2124 return;
2125
2126 /* Check port status register for function reset */
2127 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2128 en_rn_msg);
2129 if (rc == 0) {
2130 /* don't report event on forced debug dump */
2131 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2132 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2133 return;
2134 else
2135 break;
2136 }
2137 /* fall through for not able to recover */
2138 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2139 "3152 Unrecoverable error\n");
2140 lpfc_sli4_offline_eratt(phba);
2141 break;
2142 case LPFC_SLI_INTF_IF_TYPE_1:
2143 default:
2144 break;
2145 }
2146 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2147 "3123 Report dump event to upper layer\n");
2148 /* Send an internal error event to mgmt application */
2149 lpfc_board_errevt_to_mgmt(phba);
2150
2151 event_data = FC_REG_DUMP_EVENT;
2152 shost = lpfc_shost_from_vport(vport);
2153 fc_host_post_vendor_event(shost, fc_get_event_number(),
2154 sizeof(event_data), (char *) &event_data,
2155 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2156 }
2157
2158 /**
2159 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2160 * @phba: pointer to lpfc HBA data structure.
2161 *
2162 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2163 * routine from the API jump table function pointer from the lpfc_hba struct.
2164 *
2165 * Return codes
2166 * 0 - success.
2167 * Any other value - error.
2168 **/
2169 void
lpfc_handle_eratt(struct lpfc_hba * phba)2170 lpfc_handle_eratt(struct lpfc_hba *phba)
2171 {
2172 (*phba->lpfc_handle_eratt)(phba);
2173 }
2174
2175 /**
2176 * lpfc_handle_latt - The HBA link event handler
2177 * @phba: pointer to lpfc hba data structure.
2178 *
2179 * This routine is invoked from the worker thread to handle a HBA host
2180 * attention link event. SLI3 only.
2181 **/
2182 void
lpfc_handle_latt(struct lpfc_hba * phba)2183 lpfc_handle_latt(struct lpfc_hba *phba)
2184 {
2185 struct lpfc_vport *vport = phba->pport;
2186 struct lpfc_sli *psli = &phba->sli;
2187 LPFC_MBOXQ_t *pmb;
2188 volatile uint32_t control;
2189 int rc = 0;
2190
2191 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2192 if (!pmb) {
2193 rc = 1;
2194 goto lpfc_handle_latt_err_exit;
2195 }
2196
2197 rc = lpfc_mbox_rsrc_prep(phba, pmb);
2198 if (rc) {
2199 rc = 2;
2200 mempool_free(pmb, phba->mbox_mem_pool);
2201 goto lpfc_handle_latt_err_exit;
2202 }
2203
2204 /* Cleanup any outstanding ELS commands */
2205 lpfc_els_flush_all_cmd(phba);
2206 psli->slistat.link_event++;
2207 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
2208 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2209 pmb->vport = vport;
2210 /* Block ELS IOCBs until we have processed this mbox command */
2211 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2212 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2213 if (rc == MBX_NOT_FINISHED) {
2214 rc = 4;
2215 goto lpfc_handle_latt_free_mbuf;
2216 }
2217
2218 /* Clear Link Attention in HA REG */
2219 spin_lock_irq(&phba->hbalock);
2220 writel(HA_LATT, phba->HAregaddr);
2221 readl(phba->HAregaddr); /* flush */
2222 spin_unlock_irq(&phba->hbalock);
2223
2224 return;
2225
2226 lpfc_handle_latt_free_mbuf:
2227 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2228 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2229 lpfc_handle_latt_err_exit:
2230 /* Enable Link attention interrupts */
2231 spin_lock_irq(&phba->hbalock);
2232 psli->sli_flag |= LPFC_PROCESS_LA;
2233 control = readl(phba->HCregaddr);
2234 control |= HC_LAINT_ENA;
2235 writel(control, phba->HCregaddr);
2236 readl(phba->HCregaddr); /* flush */
2237
2238 /* Clear Link Attention in HA REG */
2239 writel(HA_LATT, phba->HAregaddr);
2240 readl(phba->HAregaddr); /* flush */
2241 spin_unlock_irq(&phba->hbalock);
2242 lpfc_linkdown(phba);
2243 phba->link_state = LPFC_HBA_ERROR;
2244
2245 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2246 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2247
2248 return;
2249 }
2250
2251 static void
lpfc_fill_vpd(struct lpfc_hba * phba,uint8_t * vpd,int length,int * pindex)2252 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2253 {
2254 int i, j;
2255
2256 while (length > 0) {
2257 /* Look for Serial Number */
2258 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2259 *pindex += 2;
2260 i = vpd[*pindex];
2261 *pindex += 1;
2262 j = 0;
2263 length -= (3+i);
2264 while (i--) {
2265 phba->SerialNumber[j++] = vpd[(*pindex)++];
2266 if (j == 31)
2267 break;
2268 }
2269 phba->SerialNumber[j] = 0;
2270 continue;
2271 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2272 phba->vpd_flag |= VPD_MODEL_DESC;
2273 *pindex += 2;
2274 i = vpd[*pindex];
2275 *pindex += 1;
2276 j = 0;
2277 length -= (3+i);
2278 while (i--) {
2279 phba->ModelDesc[j++] = vpd[(*pindex)++];
2280 if (j == 255)
2281 break;
2282 }
2283 phba->ModelDesc[j] = 0;
2284 continue;
2285 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2286 phba->vpd_flag |= VPD_MODEL_NAME;
2287 *pindex += 2;
2288 i = vpd[*pindex];
2289 *pindex += 1;
2290 j = 0;
2291 length -= (3+i);
2292 while (i--) {
2293 phba->ModelName[j++] = vpd[(*pindex)++];
2294 if (j == 79)
2295 break;
2296 }
2297 phba->ModelName[j] = 0;
2298 continue;
2299 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2300 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2301 *pindex += 2;
2302 i = vpd[*pindex];
2303 *pindex += 1;
2304 j = 0;
2305 length -= (3+i);
2306 while (i--) {
2307 phba->ProgramType[j++] = vpd[(*pindex)++];
2308 if (j == 255)
2309 break;
2310 }
2311 phba->ProgramType[j] = 0;
2312 continue;
2313 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2314 phba->vpd_flag |= VPD_PORT;
2315 *pindex += 2;
2316 i = vpd[*pindex];
2317 *pindex += 1;
2318 j = 0;
2319 length -= (3 + i);
2320 while (i--) {
2321 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2322 (phba->sli4_hba.pport_name_sta ==
2323 LPFC_SLI4_PPNAME_GET)) {
2324 j++;
2325 (*pindex)++;
2326 } else
2327 phba->Port[j++] = vpd[(*pindex)++];
2328 if (j == 19)
2329 break;
2330 }
2331 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2332 (phba->sli4_hba.pport_name_sta ==
2333 LPFC_SLI4_PPNAME_NON))
2334 phba->Port[j] = 0;
2335 continue;
2336 } else {
2337 *pindex += 2;
2338 i = vpd[*pindex];
2339 *pindex += 1;
2340 *pindex += i;
2341 length -= (3 + i);
2342 }
2343 }
2344 }
2345
2346 /**
2347 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2348 * @phba: pointer to lpfc hba data structure.
2349 * @vpd: pointer to the vital product data.
2350 * @len: length of the vital product data in bytes.
2351 *
2352 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2353 * an array of characters. In this routine, the ModelName, ProgramType, and
2354 * ModelDesc, etc. fields of the phba data structure will be populated.
2355 *
2356 * Return codes
2357 * 0 - pointer to the VPD passed in is NULL
2358 * 1 - success
2359 **/
2360 int
lpfc_parse_vpd(struct lpfc_hba * phba,uint8_t * vpd,int len)2361 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2362 {
2363 uint8_t lenlo, lenhi;
2364 int Length;
2365 int i;
2366 int finished = 0;
2367 int index = 0;
2368
2369 if (!vpd)
2370 return 0;
2371
2372 /* Vital Product */
2373 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2374 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2375 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2376 (uint32_t) vpd[3]);
2377 while (!finished && (index < (len - 4))) {
2378 switch (vpd[index]) {
2379 case 0x82:
2380 case 0x91:
2381 index += 1;
2382 lenlo = vpd[index];
2383 index += 1;
2384 lenhi = vpd[index];
2385 index += 1;
2386 i = ((((unsigned short)lenhi) << 8) + lenlo);
2387 index += i;
2388 break;
2389 case 0x90:
2390 index += 1;
2391 lenlo = vpd[index];
2392 index += 1;
2393 lenhi = vpd[index];
2394 index += 1;
2395 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2396 if (Length > len - index)
2397 Length = len - index;
2398
2399 lpfc_fill_vpd(phba, vpd, Length, &index);
2400 finished = 0;
2401 break;
2402 case 0x78:
2403 finished = 1;
2404 break;
2405 default:
2406 index ++;
2407 break;
2408 }
2409 }
2410
2411 return(1);
2412 }
2413
2414 /**
2415 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2416 * @phba: pointer to lpfc hba data structure.
2417 * @mdp: pointer to the data structure to hold the derived model name.
2418 * @descp: pointer to the data structure to hold the derived description.
2419 *
2420 * This routine retrieves HBA's description based on its registered PCI device
2421 * ID. The @descp passed into this function points to an array of 256 chars. It
2422 * shall be returned with the model name, maximum speed, and the host bus type.
2423 * The @mdp passed into this function points to an array of 80 chars. When the
2424 * function returns, the @mdp will be filled with the model name.
2425 **/
2426 static void
lpfc_get_atto_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2427 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2428 {
2429 uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2430 char *model = "<Unknown>";
2431 int tbolt = 0;
2432
2433 switch (sub_dev_id) {
2434 case PCI_DEVICE_ID_CLRY_161E:
2435 model = "161E";
2436 break;
2437 case PCI_DEVICE_ID_CLRY_162E:
2438 model = "162E";
2439 break;
2440 case PCI_DEVICE_ID_CLRY_164E:
2441 model = "164E";
2442 break;
2443 case PCI_DEVICE_ID_CLRY_161P:
2444 model = "161P";
2445 break;
2446 case PCI_DEVICE_ID_CLRY_162P:
2447 model = "162P";
2448 break;
2449 case PCI_DEVICE_ID_CLRY_164P:
2450 model = "164P";
2451 break;
2452 case PCI_DEVICE_ID_CLRY_321E:
2453 model = "321E";
2454 break;
2455 case PCI_DEVICE_ID_CLRY_322E:
2456 model = "322E";
2457 break;
2458 case PCI_DEVICE_ID_CLRY_324E:
2459 model = "324E";
2460 break;
2461 case PCI_DEVICE_ID_CLRY_321P:
2462 model = "321P";
2463 break;
2464 case PCI_DEVICE_ID_CLRY_322P:
2465 model = "322P";
2466 break;
2467 case PCI_DEVICE_ID_CLRY_324P:
2468 model = "324P";
2469 break;
2470 case PCI_DEVICE_ID_TLFC_2XX2:
2471 model = "2XX2";
2472 tbolt = 1;
2473 break;
2474 case PCI_DEVICE_ID_TLFC_3162:
2475 model = "3162";
2476 tbolt = 1;
2477 break;
2478 case PCI_DEVICE_ID_TLFC_3322:
2479 model = "3322";
2480 tbolt = 1;
2481 break;
2482 default:
2483 model = "Unknown";
2484 break;
2485 }
2486
2487 if (mdp && mdp[0] == '\0')
2488 snprintf(mdp, 79, "%s", model);
2489
2490 if (descp && descp[0] == '\0')
2491 snprintf(descp, 255,
2492 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2493 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2494 model,
2495 phba->Port);
2496 }
2497
2498 /**
2499 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2500 * @phba: pointer to lpfc hba data structure.
2501 * @mdp: pointer to the data structure to hold the derived model name.
2502 * @descp: pointer to the data structure to hold the derived description.
2503 *
2504 * This routine retrieves HBA's description based on its registered PCI device
2505 * ID. The @descp passed into this function points to an array of 256 chars. It
2506 * shall be returned with the model name, maximum speed, and the host bus type.
2507 * The @mdp passed into this function points to an array of 80 chars. When the
2508 * function returns, the @mdp will be filled with the model name.
2509 **/
2510 static void
lpfc_get_hba_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2511 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2512 {
2513 lpfc_vpd_t *vp;
2514 uint16_t dev_id = phba->pcidev->device;
2515 int max_speed;
2516 int GE = 0;
2517 int oneConnect = 0; /* default is not a oneConnect */
2518 struct {
2519 char *name;
2520 char *bus;
2521 char *function;
2522 } m = {"<Unknown>", "", ""};
2523
2524 if (mdp && mdp[0] != '\0'
2525 && descp && descp[0] != '\0')
2526 return;
2527
2528 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2529 lpfc_get_atto_model_desc(phba, mdp, descp);
2530 return;
2531 }
2532
2533 if (phba->lmt & LMT_64Gb)
2534 max_speed = 64;
2535 else if (phba->lmt & LMT_32Gb)
2536 max_speed = 32;
2537 else if (phba->lmt & LMT_16Gb)
2538 max_speed = 16;
2539 else if (phba->lmt & LMT_10Gb)
2540 max_speed = 10;
2541 else if (phba->lmt & LMT_8Gb)
2542 max_speed = 8;
2543 else if (phba->lmt & LMT_4Gb)
2544 max_speed = 4;
2545 else if (phba->lmt & LMT_2Gb)
2546 max_speed = 2;
2547 else if (phba->lmt & LMT_1Gb)
2548 max_speed = 1;
2549 else
2550 max_speed = 0;
2551
2552 vp = &phba->vpd;
2553
2554 switch (dev_id) {
2555 case PCI_DEVICE_ID_FIREFLY:
2556 m = (typeof(m)){"LP6000", "PCI",
2557 "Obsolete, Unsupported Fibre Channel Adapter"};
2558 break;
2559 case PCI_DEVICE_ID_SUPERFLY:
2560 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2561 m = (typeof(m)){"LP7000", "PCI", ""};
2562 else
2563 m = (typeof(m)){"LP7000E", "PCI", ""};
2564 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2565 break;
2566 case PCI_DEVICE_ID_DRAGONFLY:
2567 m = (typeof(m)){"LP8000", "PCI",
2568 "Obsolete, Unsupported Fibre Channel Adapter"};
2569 break;
2570 case PCI_DEVICE_ID_CENTAUR:
2571 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2572 m = (typeof(m)){"LP9002", "PCI", ""};
2573 else
2574 m = (typeof(m)){"LP9000", "PCI", ""};
2575 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2576 break;
2577 case PCI_DEVICE_ID_RFLY:
2578 m = (typeof(m)){"LP952", "PCI",
2579 "Obsolete, Unsupported Fibre Channel Adapter"};
2580 break;
2581 case PCI_DEVICE_ID_PEGASUS:
2582 m = (typeof(m)){"LP9802", "PCI-X",
2583 "Obsolete, Unsupported Fibre Channel Adapter"};
2584 break;
2585 case PCI_DEVICE_ID_THOR:
2586 m = (typeof(m)){"LP10000", "PCI-X",
2587 "Obsolete, Unsupported Fibre Channel Adapter"};
2588 break;
2589 case PCI_DEVICE_ID_VIPER:
2590 m = (typeof(m)){"LPX1000", "PCI-X",
2591 "Obsolete, Unsupported Fibre Channel Adapter"};
2592 break;
2593 case PCI_DEVICE_ID_PFLY:
2594 m = (typeof(m)){"LP982", "PCI-X",
2595 "Obsolete, Unsupported Fibre Channel Adapter"};
2596 break;
2597 case PCI_DEVICE_ID_TFLY:
2598 m = (typeof(m)){"LP1050", "PCI-X",
2599 "Obsolete, Unsupported Fibre Channel Adapter"};
2600 break;
2601 case PCI_DEVICE_ID_HELIOS:
2602 m = (typeof(m)){"LP11000", "PCI-X2",
2603 "Obsolete, Unsupported Fibre Channel Adapter"};
2604 break;
2605 case PCI_DEVICE_ID_HELIOS_SCSP:
2606 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2607 "Obsolete, Unsupported Fibre Channel Adapter"};
2608 break;
2609 case PCI_DEVICE_ID_HELIOS_DCSP:
2610 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2611 "Obsolete, Unsupported Fibre Channel Adapter"};
2612 break;
2613 case PCI_DEVICE_ID_NEPTUNE:
2614 m = (typeof(m)){"LPe1000", "PCIe",
2615 "Obsolete, Unsupported Fibre Channel Adapter"};
2616 break;
2617 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2618 m = (typeof(m)){"LPe1000-SP", "PCIe",
2619 "Obsolete, Unsupported Fibre Channel Adapter"};
2620 break;
2621 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2622 m = (typeof(m)){"LPe1002-SP", "PCIe",
2623 "Obsolete, Unsupported Fibre Channel Adapter"};
2624 break;
2625 case PCI_DEVICE_ID_BMID:
2626 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
2627 break;
2628 case PCI_DEVICE_ID_BSMB:
2629 m = (typeof(m)){"LP111", "PCI-X2",
2630 "Obsolete, Unsupported Fibre Channel Adapter"};
2631 break;
2632 case PCI_DEVICE_ID_ZEPHYR:
2633 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2634 break;
2635 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2636 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2637 break;
2638 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2639 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
2640 GE = 1;
2641 break;
2642 case PCI_DEVICE_ID_ZMID:
2643 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
2644 break;
2645 case PCI_DEVICE_ID_ZSMB:
2646 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
2647 break;
2648 case PCI_DEVICE_ID_LP101:
2649 m = (typeof(m)){"LP101", "PCI-X",
2650 "Obsolete, Unsupported Fibre Channel Adapter"};
2651 break;
2652 case PCI_DEVICE_ID_LP10000S:
2653 m = (typeof(m)){"LP10000-S", "PCI",
2654 "Obsolete, Unsupported Fibre Channel Adapter"};
2655 break;
2656 case PCI_DEVICE_ID_LP11000S:
2657 m = (typeof(m)){"LP11000-S", "PCI-X2",
2658 "Obsolete, Unsupported Fibre Channel Adapter"};
2659 break;
2660 case PCI_DEVICE_ID_LPE11000S:
2661 m = (typeof(m)){"LPe11000-S", "PCIe",
2662 "Obsolete, Unsupported Fibre Channel Adapter"};
2663 break;
2664 case PCI_DEVICE_ID_SAT:
2665 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
2666 break;
2667 case PCI_DEVICE_ID_SAT_MID:
2668 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
2669 break;
2670 case PCI_DEVICE_ID_SAT_SMB:
2671 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
2672 break;
2673 case PCI_DEVICE_ID_SAT_DCSP:
2674 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
2675 break;
2676 case PCI_DEVICE_ID_SAT_SCSP:
2677 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
2678 break;
2679 case PCI_DEVICE_ID_SAT_S:
2680 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
2681 break;
2682 case PCI_DEVICE_ID_PROTEUS_VF:
2683 m = (typeof(m)){"LPev12000", "PCIe IOV",
2684 "Obsolete, Unsupported Fibre Channel Adapter"};
2685 break;
2686 case PCI_DEVICE_ID_PROTEUS_PF:
2687 m = (typeof(m)){"LPev12000", "PCIe IOV",
2688 "Obsolete, Unsupported Fibre Channel Adapter"};
2689 break;
2690 case PCI_DEVICE_ID_PROTEUS_S:
2691 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2692 "Obsolete, Unsupported Fibre Channel Adapter"};
2693 break;
2694 case PCI_DEVICE_ID_TIGERSHARK:
2695 oneConnect = 1;
2696 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
2697 break;
2698 case PCI_DEVICE_ID_TOMCAT:
2699 oneConnect = 1;
2700 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2701 break;
2702 case PCI_DEVICE_ID_FALCON:
2703 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2704 "EmulexSecure Fibre"};
2705 break;
2706 case PCI_DEVICE_ID_BALIUS:
2707 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2708 "Obsolete, Unsupported Fibre Channel Adapter"};
2709 break;
2710 case PCI_DEVICE_ID_LANCER_FC:
2711 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
2712 break;
2713 case PCI_DEVICE_ID_LANCER_FC_VF:
2714 m = (typeof(m)){"LPe16000", "PCIe",
2715 "Obsolete, Unsupported Fibre Channel Adapter"};
2716 break;
2717 case PCI_DEVICE_ID_LANCER_FCOE:
2718 oneConnect = 1;
2719 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
2720 break;
2721 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2722 oneConnect = 1;
2723 m = (typeof(m)){"OCe15100", "PCIe",
2724 "Obsolete, Unsupported FCoE"};
2725 break;
2726 case PCI_DEVICE_ID_LANCER_G6_FC:
2727 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2728 break;
2729 case PCI_DEVICE_ID_LANCER_G7_FC:
2730 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2731 break;
2732 case PCI_DEVICE_ID_LANCER_G7P_FC:
2733 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2734 break;
2735 case PCI_DEVICE_ID_SKYHAWK:
2736 case PCI_DEVICE_ID_SKYHAWK_VF:
2737 oneConnect = 1;
2738 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2739 break;
2740 default:
2741 m = (typeof(m)){"Unknown", "", ""};
2742 break;
2743 }
2744
2745 if (mdp && mdp[0] == '\0')
2746 snprintf(mdp, 79,"%s", m.name);
2747 /*
2748 * oneConnect hba requires special processing, they are all initiators
2749 * and we put the port number on the end
2750 */
2751 if (descp && descp[0] == '\0') {
2752 if (oneConnect)
2753 snprintf(descp, 255,
2754 "Emulex OneConnect %s, %s Initiator %s",
2755 m.name, m.function,
2756 phba->Port);
2757 else if (max_speed == 0)
2758 snprintf(descp, 255,
2759 "Emulex %s %s %s",
2760 m.name, m.bus, m.function);
2761 else
2762 snprintf(descp, 255,
2763 "Emulex %s %d%s %s %s",
2764 m.name, max_speed, (GE) ? "GE" : "Gb",
2765 m.bus, m.function);
2766 }
2767 }
2768
2769 /**
2770 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2771 * @phba: pointer to lpfc hba data structure.
2772 * @pring: pointer to a IOCB ring.
2773 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2774 *
2775 * This routine posts a given number of IOCBs with the associated DMA buffer
2776 * descriptors specified by the cnt argument to the given IOCB ring.
2777 *
2778 * Return codes
2779 * The number of IOCBs NOT able to be posted to the IOCB ring.
2780 **/
2781 int
lpfc_sli3_post_buffer(struct lpfc_hba * phba,struct lpfc_sli_ring * pring,int cnt)2782 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2783 {
2784 IOCB_t *icmd;
2785 struct lpfc_iocbq *iocb;
2786 struct lpfc_dmabuf *mp1, *mp2;
2787
2788 cnt += pring->missbufcnt;
2789
2790 /* While there are buffers to post */
2791 while (cnt > 0) {
2792 /* Allocate buffer for command iocb */
2793 iocb = lpfc_sli_get_iocbq(phba);
2794 if (iocb == NULL) {
2795 pring->missbufcnt = cnt;
2796 return cnt;
2797 }
2798 icmd = &iocb->iocb;
2799
2800 /* 2 buffers can be posted per command */
2801 /* Allocate buffer to post */
2802 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2803 if (mp1)
2804 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2805 if (!mp1 || !mp1->virt) {
2806 kfree(mp1);
2807 lpfc_sli_release_iocbq(phba, iocb);
2808 pring->missbufcnt = cnt;
2809 return cnt;
2810 }
2811
2812 INIT_LIST_HEAD(&mp1->list);
2813 /* Allocate buffer to post */
2814 if (cnt > 1) {
2815 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2816 if (mp2)
2817 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2818 &mp2->phys);
2819 if (!mp2 || !mp2->virt) {
2820 kfree(mp2);
2821 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2822 kfree(mp1);
2823 lpfc_sli_release_iocbq(phba, iocb);
2824 pring->missbufcnt = cnt;
2825 return cnt;
2826 }
2827
2828 INIT_LIST_HEAD(&mp2->list);
2829 } else {
2830 mp2 = NULL;
2831 }
2832
2833 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2834 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2835 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2836 icmd->ulpBdeCount = 1;
2837 cnt--;
2838 if (mp2) {
2839 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2840 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2841 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2842 cnt--;
2843 icmd->ulpBdeCount = 2;
2844 }
2845
2846 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2847 icmd->ulpLe = 1;
2848
2849 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2850 IOCB_ERROR) {
2851 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2852 kfree(mp1);
2853 cnt++;
2854 if (mp2) {
2855 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2856 kfree(mp2);
2857 cnt++;
2858 }
2859 lpfc_sli_release_iocbq(phba, iocb);
2860 pring->missbufcnt = cnt;
2861 return cnt;
2862 }
2863 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2864 if (mp2)
2865 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2866 }
2867 pring->missbufcnt = 0;
2868 return 0;
2869 }
2870
2871 /**
2872 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2873 * @phba: pointer to lpfc hba data structure.
2874 *
2875 * This routine posts initial receive IOCB buffers to the ELS ring. The
2876 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2877 * set to 64 IOCBs. SLI3 only.
2878 *
2879 * Return codes
2880 * 0 - success (currently always success)
2881 **/
2882 static int
lpfc_post_rcv_buf(struct lpfc_hba * phba)2883 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2884 {
2885 struct lpfc_sli *psli = &phba->sli;
2886
2887 /* Ring 0, ELS / CT buffers */
2888 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2889 /* Ring 2 - FCP no buffers needed */
2890
2891 return 0;
2892 }
2893
2894 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2895
2896 /**
2897 * lpfc_sha_init - Set up initial array of hash table entries
2898 * @HashResultPointer: pointer to an array as hash table.
2899 *
2900 * This routine sets up the initial values to the array of hash table entries
2901 * for the LC HBAs.
2902 **/
2903 static void
lpfc_sha_init(uint32_t * HashResultPointer)2904 lpfc_sha_init(uint32_t * HashResultPointer)
2905 {
2906 HashResultPointer[0] = 0x67452301;
2907 HashResultPointer[1] = 0xEFCDAB89;
2908 HashResultPointer[2] = 0x98BADCFE;
2909 HashResultPointer[3] = 0x10325476;
2910 HashResultPointer[4] = 0xC3D2E1F0;
2911 }
2912
2913 /**
2914 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2915 * @HashResultPointer: pointer to an initial/result hash table.
2916 * @HashWorkingPointer: pointer to an working hash table.
2917 *
2918 * This routine iterates an initial hash table pointed by @HashResultPointer
2919 * with the values from the working hash table pointeed by @HashWorkingPointer.
2920 * The results are putting back to the initial hash table, returned through
2921 * the @HashResultPointer as the result hash table.
2922 **/
2923 static void
lpfc_sha_iterate(uint32_t * HashResultPointer,uint32_t * HashWorkingPointer)2924 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2925 {
2926 int t;
2927 uint32_t TEMP;
2928 uint32_t A, B, C, D, E;
2929 t = 16;
2930 do {
2931 HashWorkingPointer[t] =
2932 S(1,
2933 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2934 8] ^
2935 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2936 } while (++t <= 79);
2937 t = 0;
2938 A = HashResultPointer[0];
2939 B = HashResultPointer[1];
2940 C = HashResultPointer[2];
2941 D = HashResultPointer[3];
2942 E = HashResultPointer[4];
2943
2944 do {
2945 if (t < 20) {
2946 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2947 } else if (t < 40) {
2948 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2949 } else if (t < 60) {
2950 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2951 } else {
2952 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2953 }
2954 TEMP += S(5, A) + E + HashWorkingPointer[t];
2955 E = D;
2956 D = C;
2957 C = S(30, B);
2958 B = A;
2959 A = TEMP;
2960 } while (++t <= 79);
2961
2962 HashResultPointer[0] += A;
2963 HashResultPointer[1] += B;
2964 HashResultPointer[2] += C;
2965 HashResultPointer[3] += D;
2966 HashResultPointer[4] += E;
2967
2968 }
2969
2970 /**
2971 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2972 * @RandomChallenge: pointer to the entry of host challenge random number array.
2973 * @HashWorking: pointer to the entry of the working hash array.
2974 *
2975 * This routine calculates the working hash array referred by @HashWorking
2976 * from the challenge random numbers associated with the host, referred by
2977 * @RandomChallenge. The result is put into the entry of the working hash
2978 * array and returned by reference through @HashWorking.
2979 **/
2980 static void
lpfc_challenge_key(uint32_t * RandomChallenge,uint32_t * HashWorking)2981 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2982 {
2983 *HashWorking = (*RandomChallenge ^ *HashWorking);
2984 }
2985
2986 /**
2987 * lpfc_hba_init - Perform special handling for LC HBA initialization
2988 * @phba: pointer to lpfc hba data structure.
2989 * @hbainit: pointer to an array of unsigned 32-bit integers.
2990 *
2991 * This routine performs the special handling for LC HBA initialization.
2992 **/
2993 void
lpfc_hba_init(struct lpfc_hba * phba,uint32_t * hbainit)2994 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2995 {
2996 int t;
2997 uint32_t *HashWorking;
2998 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
2999
3000 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3001 if (!HashWorking)
3002 return;
3003
3004 HashWorking[0] = HashWorking[78] = *pwwnn++;
3005 HashWorking[1] = HashWorking[79] = *pwwnn;
3006
3007 for (t = 0; t < 7; t++)
3008 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3009
3010 lpfc_sha_init(hbainit);
3011 lpfc_sha_iterate(hbainit, HashWorking);
3012 kfree(HashWorking);
3013 }
3014
3015 /**
3016 * lpfc_cleanup - Performs vport cleanups before deleting a vport
3017 * @vport: pointer to a virtual N_Port data structure.
3018 *
3019 * This routine performs the necessary cleanups before deleting the @vport.
3020 * It invokes the discovery state machine to perform necessary state
3021 * transitions and to release the ndlps associated with the @vport. Note,
3022 * the physical port is treated as @vport 0.
3023 **/
3024 void
lpfc_cleanup(struct lpfc_vport * vport)3025 lpfc_cleanup(struct lpfc_vport *vport)
3026 {
3027 struct lpfc_hba *phba = vport->phba;
3028 struct lpfc_nodelist *ndlp, *next_ndlp;
3029 int i = 0;
3030
3031 if (phba->link_state > LPFC_LINK_DOWN)
3032 lpfc_port_link_failure(vport);
3033
3034 /* Clean up VMID resources */
3035 if (lpfc_is_vmid_enabled(phba))
3036 lpfc_vmid_vport_cleanup(vport);
3037
3038 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3039 if (vport->port_type != LPFC_PHYSICAL_PORT &&
3040 ndlp->nlp_DID == Fabric_DID) {
3041 /* Just free up ndlp with Fabric_DID for vports */
3042 lpfc_nlp_put(ndlp);
3043 continue;
3044 }
3045
3046 if (ndlp->nlp_DID == Fabric_Cntl_DID &&
3047 ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
3048 lpfc_nlp_put(ndlp);
3049 continue;
3050 }
3051
3052 /* Fabric Ports not in UNMAPPED state are cleaned up in the
3053 * DEVICE_RM event.
3054 */
3055 if (ndlp->nlp_type & NLP_FABRIC &&
3056 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3057 lpfc_disc_state_machine(vport, ndlp, NULL,
3058 NLP_EVT_DEVICE_RECOVERY);
3059
3060 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3061 lpfc_disc_state_machine(vport, ndlp, NULL,
3062 NLP_EVT_DEVICE_RM);
3063 }
3064
3065 /* This is a special case flush to return all
3066 * IOs before entering this loop. There are
3067 * two points in the code where a flush is
3068 * avoided if the FC_UNLOADING flag is set.
3069 * one is in the multipool destroy,
3070 * (this prevents a crash) and the other is
3071 * in the nvme abort handler, ( also prevents
3072 * a crash). Both of these exceptions are
3073 * cases where the slot is still accessible.
3074 * The flush here is only when the pci slot
3075 * is offline.
3076 */
3077 if (test_bit(FC_UNLOADING, &vport->load_flag) &&
3078 pci_channel_offline(phba->pcidev))
3079 lpfc_sli_flush_io_rings(vport->phba);
3080
3081 /* At this point, ALL ndlp's should be gone
3082 * because of the previous NLP_EVT_DEVICE_RM.
3083 * Lets wait for this to happen, if needed.
3084 */
3085 while (!list_empty(&vport->fc_nodes)) {
3086 if (i++ > 3000) {
3087 lpfc_printf_vlog(vport, KERN_ERR,
3088 LOG_TRACE_EVENT,
3089 "0233 Nodelist not empty\n");
3090 list_for_each_entry_safe(ndlp, next_ndlp,
3091 &vport->fc_nodes, nlp_listp) {
3092 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3093 LOG_DISCOVERY,
3094 "0282 did:x%x ndlp:x%px "
3095 "refcnt:%d xflags x%x "
3096 "nflag x%lx\n",
3097 ndlp->nlp_DID, (void *)ndlp,
3098 kref_read(&ndlp->kref),
3099 ndlp->fc4_xpt_flags,
3100 ndlp->nlp_flag);
3101 }
3102 break;
3103 }
3104
3105 /* Wait for any activity on ndlps to settle */
3106 msleep(10);
3107 }
3108 lpfc_cleanup_vports_rrqs(vport, NULL);
3109 }
3110
3111 /**
3112 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3113 * @vport: pointer to a virtual N_Port data structure.
3114 *
3115 * This routine stops all the timers associated with a @vport. This function
3116 * is invoked before disabling or deleting a @vport. Note that the physical
3117 * port is treated as @vport 0.
3118 **/
3119 void
lpfc_stop_vport_timers(struct lpfc_vport * vport)3120 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3121 {
3122 del_timer_sync(&vport->els_tmofunc);
3123 del_timer_sync(&vport->delayed_disc_tmo);
3124 lpfc_can_disctmo(vport);
3125 return;
3126 }
3127
3128 /**
3129 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3130 * @phba: pointer to lpfc hba data structure.
3131 *
3132 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3133 * caller of this routine should already hold the host lock.
3134 **/
3135 void
__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3136 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3137 {
3138 /* Clear pending FCF rediscovery wait flag */
3139 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3140
3141 /* Now, try to stop the timer */
3142 del_timer(&phba->fcf.redisc_wait);
3143 }
3144
3145 /**
3146 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3147 * @phba: pointer to lpfc hba data structure.
3148 *
3149 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3150 * checks whether the FCF rediscovery wait timer is pending with the host
3151 * lock held before proceeding with disabling the timer and clearing the
3152 * wait timer pendig flag.
3153 **/
3154 void
lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3155 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3156 {
3157 spin_lock_irq(&phba->hbalock);
3158 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3159 /* FCF rediscovery timer already fired or stopped */
3160 spin_unlock_irq(&phba->hbalock);
3161 return;
3162 }
3163 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3164 /* Clear failover in progress flags */
3165 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3166 spin_unlock_irq(&phba->hbalock);
3167 }
3168
3169 /**
3170 * lpfc_cmf_stop - Stop CMF processing
3171 * @phba: pointer to lpfc hba data structure.
3172 *
3173 * This is called when the link goes down or if CMF mode is turned OFF.
3174 * It is also called when going offline or unloaded just before the
3175 * congestion info buffer is unregistered.
3176 **/
3177 void
lpfc_cmf_stop(struct lpfc_hba * phba)3178 lpfc_cmf_stop(struct lpfc_hba *phba)
3179 {
3180 int cpu;
3181 struct lpfc_cgn_stat *cgs;
3182
3183 /* We only do something if CMF is enabled */
3184 if (!phba->sli4_hba.pc_sli4_params.cmf)
3185 return;
3186
3187 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3188 "6221 Stop CMF / Cancel Timer\n");
3189
3190 /* Cancel the CMF timer */
3191 hrtimer_cancel(&phba->cmf_stats_timer);
3192 hrtimer_cancel(&phba->cmf_timer);
3193
3194 /* Zero CMF counters */
3195 atomic_set(&phba->cmf_busy, 0);
3196 for_each_present_cpu(cpu) {
3197 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3198 atomic64_set(&cgs->total_bytes, 0);
3199 atomic64_set(&cgs->rcv_bytes, 0);
3200 atomic_set(&cgs->rx_io_cnt, 0);
3201 atomic64_set(&cgs->rx_latency, 0);
3202 }
3203 atomic_set(&phba->cmf_bw_wait, 0);
3204
3205 /* Resume any blocked IO - Queue unblock on workqueue */
3206 queue_work(phba->wq, &phba->unblock_request_work);
3207 }
3208
3209 static inline uint64_t
lpfc_get_max_line_rate(struct lpfc_hba * phba)3210 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3211 {
3212 uint64_t rate = lpfc_sli_port_speed_get(phba);
3213
3214 return ((((unsigned long)rate) * 1024 * 1024) / 10);
3215 }
3216
3217 void
lpfc_cmf_signal_init(struct lpfc_hba * phba)3218 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3219 {
3220 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3221 "6223 Signal CMF init\n");
3222
3223 /* Use the new fc_linkspeed to recalculate */
3224 phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3225 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3226 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3227 phba->cmf_interval_rate, 1000);
3228 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3229
3230 /* This is a signal to firmware to sync up CMF BW with link speed */
3231 lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3232 }
3233
3234 /**
3235 * lpfc_cmf_start - Start CMF processing
3236 * @phba: pointer to lpfc hba data structure.
3237 *
3238 * This is called when the link comes up or if CMF mode is turned OFF
3239 * to Monitor or Managed.
3240 **/
3241 void
lpfc_cmf_start(struct lpfc_hba * phba)3242 lpfc_cmf_start(struct lpfc_hba *phba)
3243 {
3244 struct lpfc_cgn_stat *cgs;
3245 int cpu;
3246
3247 /* We only do something if CMF is enabled */
3248 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3249 phba->cmf_active_mode == LPFC_CFG_OFF)
3250 return;
3251
3252 /* Reinitialize congestion buffer info */
3253 lpfc_init_congestion_buf(phba);
3254
3255 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3256 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3257 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3258 atomic_set(&phba->cgn_sync_warn_cnt, 0);
3259
3260 atomic_set(&phba->cmf_busy, 0);
3261 for_each_present_cpu(cpu) {
3262 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3263 atomic64_set(&cgs->total_bytes, 0);
3264 atomic64_set(&cgs->rcv_bytes, 0);
3265 atomic_set(&cgs->rx_io_cnt, 0);
3266 atomic64_set(&cgs->rx_latency, 0);
3267 }
3268 phba->cmf_latency.tv_sec = 0;
3269 phba->cmf_latency.tv_nsec = 0;
3270
3271 lpfc_cmf_signal_init(phba);
3272
3273 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3274 "6222 Start CMF / Timer\n");
3275
3276 phba->cmf_timer_cnt = 0;
3277 hrtimer_start(&phba->cmf_timer,
3278 ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC),
3279 HRTIMER_MODE_REL);
3280 hrtimer_start(&phba->cmf_stats_timer,
3281 ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC),
3282 HRTIMER_MODE_REL);
3283 /* Setup for latency check in IO cmpl routines */
3284 ktime_get_real_ts64(&phba->cmf_latency);
3285
3286 atomic_set(&phba->cmf_bw_wait, 0);
3287 atomic_set(&phba->cmf_stop_io, 0);
3288 }
3289
3290 /**
3291 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3292 * @phba: pointer to lpfc hba data structure.
3293 *
3294 * This routine stops all the timers associated with a HBA. This function is
3295 * invoked before either putting a HBA offline or unloading the driver.
3296 **/
3297 void
lpfc_stop_hba_timers(struct lpfc_hba * phba)3298 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3299 {
3300 if (phba->pport)
3301 lpfc_stop_vport_timers(phba->pport);
3302 cancel_delayed_work_sync(&phba->eq_delay_work);
3303 cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3304 del_timer_sync(&phba->sli.mbox_tmo);
3305 del_timer_sync(&phba->fabric_block_timer);
3306 del_timer_sync(&phba->eratt_poll);
3307 del_timer_sync(&phba->hb_tmofunc);
3308 if (phba->sli_rev == LPFC_SLI_REV4) {
3309 del_timer_sync(&phba->rrq_tmr);
3310 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
3311 }
3312 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
3313 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
3314
3315 switch (phba->pci_dev_grp) {
3316 case LPFC_PCI_DEV_LP:
3317 /* Stop any LightPulse device specific driver timers */
3318 del_timer_sync(&phba->fcp_poll_timer);
3319 break;
3320 case LPFC_PCI_DEV_OC:
3321 /* Stop any OneConnect device specific driver timers */
3322 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3323 break;
3324 default:
3325 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3326 "0297 Invalid device group (x%x)\n",
3327 phba->pci_dev_grp);
3328 break;
3329 }
3330 return;
3331 }
3332
3333 /**
3334 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3335 * @phba: pointer to lpfc hba data structure.
3336 * @mbx_action: flag for mailbox no wait action.
3337 *
3338 * This routine marks a HBA's management interface as blocked. Once the HBA's
3339 * management interface is marked as blocked, all the user space access to
3340 * the HBA, whether they are from sysfs interface or libdfc interface will
3341 * all be blocked. The HBA is set to block the management interface when the
3342 * driver prepares the HBA interface for online or offline.
3343 **/
3344 static void
lpfc_block_mgmt_io(struct lpfc_hba * phba,int mbx_action)3345 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3346 {
3347 unsigned long iflag;
3348 uint8_t actcmd = MBX_HEARTBEAT;
3349 unsigned long timeout;
3350
3351 spin_lock_irqsave(&phba->hbalock, iflag);
3352 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3353 spin_unlock_irqrestore(&phba->hbalock, iflag);
3354 if (mbx_action == LPFC_MBX_NO_WAIT)
3355 return;
3356 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
3357 spin_lock_irqsave(&phba->hbalock, iflag);
3358 if (phba->sli.mbox_active) {
3359 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3360 /* Determine how long we might wait for the active mailbox
3361 * command to be gracefully completed by firmware.
3362 */
3363 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
3364 phba->sli.mbox_active) * 1000) + jiffies;
3365 }
3366 spin_unlock_irqrestore(&phba->hbalock, iflag);
3367
3368 /* Wait for the outstnading mailbox command to complete */
3369 while (phba->sli.mbox_active) {
3370 /* Check active mailbox complete status every 2ms */
3371 msleep(2);
3372 if (time_after(jiffies, timeout)) {
3373 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3374 "2813 Mgmt IO is Blocked %x "
3375 "- mbox cmd %x still active\n",
3376 phba->sli.sli_flag, actcmd);
3377 break;
3378 }
3379 }
3380 }
3381
3382 /**
3383 * lpfc_sli4_node_rpi_restore - Recover assigned RPIs for active nodes.
3384 * @phba: pointer to lpfc hba data structure.
3385 *
3386 * Allocate RPIs for all active remote nodes. This is needed whenever
3387 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3388 * is to fixup the temporary rpi assignments.
3389 **/
3390 void
lpfc_sli4_node_rpi_restore(struct lpfc_hba * phba)3391 lpfc_sli4_node_rpi_restore(struct lpfc_hba *phba)
3392 {
3393 struct lpfc_nodelist *ndlp, *next_ndlp;
3394 struct lpfc_vport **vports;
3395 int i, rpi;
3396
3397 if (phba->sli_rev != LPFC_SLI_REV4)
3398 return;
3399
3400 vports = lpfc_create_vport_work_array(phba);
3401 if (!vports)
3402 return;
3403
3404 for (i = 0; i <= phba->max_vports && vports[i]; i++) {
3405 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3406 continue;
3407
3408 list_for_each_entry_safe(ndlp, next_ndlp,
3409 &vports[i]->fc_nodes,
3410 nlp_listp) {
3411 rpi = lpfc_sli4_alloc_rpi(phba);
3412 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3413 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3414 LOG_NODE | LOG_DISCOVERY,
3415 "0099 RPI alloc error for "
3416 "ndlp x%px DID:x%06x "
3417 "flg:x%lx\n",
3418 ndlp, ndlp->nlp_DID,
3419 ndlp->nlp_flag);
3420 continue;
3421 }
3422 ndlp->nlp_rpi = rpi;
3423 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3424 LOG_NODE | LOG_DISCOVERY,
3425 "0009 Assign RPI x%x to ndlp x%px "
3426 "DID:x%06x flg:x%lx\n",
3427 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3428 ndlp->nlp_flag);
3429 }
3430 }
3431 lpfc_destroy_vport_work_array(phba, vports);
3432 }
3433
3434 /**
3435 * lpfc_create_expedite_pool - create expedite pool
3436 * @phba: pointer to lpfc hba data structure.
3437 *
3438 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3439 * to expedite pool. Mark them as expedite.
3440 **/
lpfc_create_expedite_pool(struct lpfc_hba * phba)3441 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3442 {
3443 struct lpfc_sli4_hdw_queue *qp;
3444 struct lpfc_io_buf *lpfc_ncmd;
3445 struct lpfc_io_buf *lpfc_ncmd_next;
3446 struct lpfc_epd_pool *epd_pool;
3447 unsigned long iflag;
3448
3449 epd_pool = &phba->epd_pool;
3450 qp = &phba->sli4_hba.hdwq[0];
3451
3452 spin_lock_init(&epd_pool->lock);
3453 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3454 spin_lock(&epd_pool->lock);
3455 INIT_LIST_HEAD(&epd_pool->list);
3456 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3457 &qp->lpfc_io_buf_list_put, list) {
3458 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3459 lpfc_ncmd->expedite = true;
3460 qp->put_io_bufs--;
3461 epd_pool->count++;
3462 if (epd_pool->count >= XRI_BATCH)
3463 break;
3464 }
3465 spin_unlock(&epd_pool->lock);
3466 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3467 }
3468
3469 /**
3470 * lpfc_destroy_expedite_pool - destroy expedite pool
3471 * @phba: pointer to lpfc hba data structure.
3472 *
3473 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3474 * of HWQ 0. Clear the mark.
3475 **/
lpfc_destroy_expedite_pool(struct lpfc_hba * phba)3476 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3477 {
3478 struct lpfc_sli4_hdw_queue *qp;
3479 struct lpfc_io_buf *lpfc_ncmd;
3480 struct lpfc_io_buf *lpfc_ncmd_next;
3481 struct lpfc_epd_pool *epd_pool;
3482 unsigned long iflag;
3483
3484 epd_pool = &phba->epd_pool;
3485 qp = &phba->sli4_hba.hdwq[0];
3486
3487 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3488 spin_lock(&epd_pool->lock);
3489 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3490 &epd_pool->list, list) {
3491 list_move_tail(&lpfc_ncmd->list,
3492 &qp->lpfc_io_buf_list_put);
3493 lpfc_ncmd->flags = false;
3494 qp->put_io_bufs++;
3495 epd_pool->count--;
3496 }
3497 spin_unlock(&epd_pool->lock);
3498 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3499 }
3500
3501 /**
3502 * lpfc_create_multixri_pools - create multi-XRI pools
3503 * @phba: pointer to lpfc hba data structure.
3504 *
3505 * This routine initialize public, private per HWQ. Then, move XRIs from
3506 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3507 * Initialized.
3508 **/
lpfc_create_multixri_pools(struct lpfc_hba * phba)3509 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3510 {
3511 u32 i, j;
3512 u32 hwq_count;
3513 u32 count_per_hwq;
3514 struct lpfc_io_buf *lpfc_ncmd;
3515 struct lpfc_io_buf *lpfc_ncmd_next;
3516 unsigned long iflag;
3517 struct lpfc_sli4_hdw_queue *qp;
3518 struct lpfc_multixri_pool *multixri_pool;
3519 struct lpfc_pbl_pool *pbl_pool;
3520 struct lpfc_pvt_pool *pvt_pool;
3521
3522 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3523 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3524 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3525 phba->sli4_hba.io_xri_cnt);
3526
3527 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3528 lpfc_create_expedite_pool(phba);
3529
3530 hwq_count = phba->cfg_hdw_queue;
3531 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3532
3533 for (i = 0; i < hwq_count; i++) {
3534 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3535
3536 if (!multixri_pool) {
3537 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3538 "1238 Failed to allocate memory for "
3539 "multixri_pool\n");
3540
3541 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3542 lpfc_destroy_expedite_pool(phba);
3543
3544 j = 0;
3545 while (j < i) {
3546 qp = &phba->sli4_hba.hdwq[j];
3547 kfree(qp->p_multixri_pool);
3548 j++;
3549 }
3550 phba->cfg_xri_rebalancing = 0;
3551 return;
3552 }
3553
3554 qp = &phba->sli4_hba.hdwq[i];
3555 qp->p_multixri_pool = multixri_pool;
3556
3557 multixri_pool->xri_limit = count_per_hwq;
3558 multixri_pool->rrb_next_hwqid = i;
3559
3560 /* Deal with public free xri pool */
3561 pbl_pool = &multixri_pool->pbl_pool;
3562 spin_lock_init(&pbl_pool->lock);
3563 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3564 spin_lock(&pbl_pool->lock);
3565 INIT_LIST_HEAD(&pbl_pool->list);
3566 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3567 &qp->lpfc_io_buf_list_put, list) {
3568 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3569 qp->put_io_bufs--;
3570 pbl_pool->count++;
3571 }
3572 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3573 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3574 pbl_pool->count, i);
3575 spin_unlock(&pbl_pool->lock);
3576 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3577
3578 /* Deal with private free xri pool */
3579 pvt_pool = &multixri_pool->pvt_pool;
3580 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3581 pvt_pool->low_watermark = XRI_BATCH;
3582 spin_lock_init(&pvt_pool->lock);
3583 spin_lock_irqsave(&pvt_pool->lock, iflag);
3584 INIT_LIST_HEAD(&pvt_pool->list);
3585 pvt_pool->count = 0;
3586 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3587 }
3588 }
3589
3590 /**
3591 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3592 * @phba: pointer to lpfc hba data structure.
3593 *
3594 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3595 **/
lpfc_destroy_multixri_pools(struct lpfc_hba * phba)3596 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3597 {
3598 u32 i;
3599 u32 hwq_count;
3600 struct lpfc_io_buf *lpfc_ncmd;
3601 struct lpfc_io_buf *lpfc_ncmd_next;
3602 unsigned long iflag;
3603 struct lpfc_sli4_hdw_queue *qp;
3604 struct lpfc_multixri_pool *multixri_pool;
3605 struct lpfc_pbl_pool *pbl_pool;
3606 struct lpfc_pvt_pool *pvt_pool;
3607
3608 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3609 lpfc_destroy_expedite_pool(phba);
3610
3611 if (!test_bit(FC_UNLOADING, &phba->pport->load_flag))
3612 lpfc_sli_flush_io_rings(phba);
3613
3614 hwq_count = phba->cfg_hdw_queue;
3615
3616 for (i = 0; i < hwq_count; i++) {
3617 qp = &phba->sli4_hba.hdwq[i];
3618 multixri_pool = qp->p_multixri_pool;
3619 if (!multixri_pool)
3620 continue;
3621
3622 qp->p_multixri_pool = NULL;
3623
3624 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3625
3626 /* Deal with public free xri pool */
3627 pbl_pool = &multixri_pool->pbl_pool;
3628 spin_lock(&pbl_pool->lock);
3629
3630 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3631 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3632 pbl_pool->count, i);
3633
3634 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3635 &pbl_pool->list, list) {
3636 list_move_tail(&lpfc_ncmd->list,
3637 &qp->lpfc_io_buf_list_put);
3638 qp->put_io_bufs++;
3639 pbl_pool->count--;
3640 }
3641
3642 INIT_LIST_HEAD(&pbl_pool->list);
3643 pbl_pool->count = 0;
3644
3645 spin_unlock(&pbl_pool->lock);
3646
3647 /* Deal with private free xri pool */
3648 pvt_pool = &multixri_pool->pvt_pool;
3649 spin_lock(&pvt_pool->lock);
3650
3651 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3652 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3653 pvt_pool->count, i);
3654
3655 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3656 &pvt_pool->list, list) {
3657 list_move_tail(&lpfc_ncmd->list,
3658 &qp->lpfc_io_buf_list_put);
3659 qp->put_io_bufs++;
3660 pvt_pool->count--;
3661 }
3662
3663 INIT_LIST_HEAD(&pvt_pool->list);
3664 pvt_pool->count = 0;
3665
3666 spin_unlock(&pvt_pool->lock);
3667 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3668
3669 kfree(multixri_pool);
3670 }
3671 }
3672
3673 /**
3674 * lpfc_online - Initialize and bring a HBA online
3675 * @phba: pointer to lpfc hba data structure.
3676 *
3677 * This routine initializes the HBA and brings a HBA online. During this
3678 * process, the management interface is blocked to prevent user space access
3679 * to the HBA interfering with the driver initialization.
3680 *
3681 * Return codes
3682 * 0 - successful
3683 * 1 - failed
3684 **/
3685 int
lpfc_online(struct lpfc_hba * phba)3686 lpfc_online(struct lpfc_hba *phba)
3687 {
3688 struct lpfc_vport *vport;
3689 struct lpfc_vport **vports;
3690 int i, error = 0;
3691 bool vpis_cleared = false;
3692
3693 if (!phba)
3694 return 0;
3695 vport = phba->pport;
3696
3697 if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3698 return 0;
3699
3700 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3701 "0458 Bring Adapter online\n");
3702
3703 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3704
3705 if (phba->sli_rev == LPFC_SLI_REV4) {
3706 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3707 lpfc_unblock_mgmt_io(phba);
3708 return 1;
3709 }
3710 spin_lock_irq(&phba->hbalock);
3711 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3712 vpis_cleared = true;
3713 spin_unlock_irq(&phba->hbalock);
3714
3715 /* Reestablish the local initiator port.
3716 * The offline process destroyed the previous lport.
3717 */
3718 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3719 !phba->nvmet_support) {
3720 error = lpfc_nvme_create_localport(phba->pport);
3721 if (error)
3722 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3723 "6132 NVME restore reg failed "
3724 "on nvmei error x%x\n", error);
3725 }
3726 } else {
3727 lpfc_sli_queue_init(phba);
3728 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3729 lpfc_unblock_mgmt_io(phba);
3730 return 1;
3731 }
3732 }
3733
3734 vports = lpfc_create_vport_work_array(phba);
3735 if (vports != NULL) {
3736 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3737 clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3738 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3739 set_bit(FC_VPORT_NEEDS_REG_VPI,
3740 &vports[i]->fc_flag);
3741 if (phba->sli_rev == LPFC_SLI_REV4) {
3742 set_bit(FC_VPORT_NEEDS_INIT_VPI,
3743 &vports[i]->fc_flag);
3744 if ((vpis_cleared) &&
3745 (vports[i]->port_type !=
3746 LPFC_PHYSICAL_PORT))
3747 vports[i]->vpi = 0;
3748 }
3749 }
3750 }
3751 lpfc_destroy_vport_work_array(phba, vports);
3752
3753 if (phba->cfg_xri_rebalancing)
3754 lpfc_create_multixri_pools(phba);
3755
3756 lpfc_cpuhp_add(phba);
3757
3758 lpfc_unblock_mgmt_io(phba);
3759 return 0;
3760 }
3761
3762 /**
3763 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3764 * @phba: pointer to lpfc hba data structure.
3765 *
3766 * This routine marks a HBA's management interface as not blocked. Once the
3767 * HBA's management interface is marked as not blocked, all the user space
3768 * access to the HBA, whether they are from sysfs interface or libdfc
3769 * interface will be allowed. The HBA is set to block the management interface
3770 * when the driver prepares the HBA interface for online or offline and then
3771 * set to unblock the management interface afterwards.
3772 **/
3773 void
lpfc_unblock_mgmt_io(struct lpfc_hba * phba)3774 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3775 {
3776 unsigned long iflag;
3777
3778 spin_lock_irqsave(&phba->hbalock, iflag);
3779 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3780 spin_unlock_irqrestore(&phba->hbalock, iflag);
3781 }
3782
3783 /**
3784 * lpfc_offline_prep - Prepare a HBA to be brought offline
3785 * @phba: pointer to lpfc hba data structure.
3786 * @mbx_action: flag for mailbox shutdown action.
3787 *
3788 * This routine is invoked to prepare a HBA to be brought offline. It performs
3789 * unregistration login to all the nodes on all vports and flushes the mailbox
3790 * queue to make it ready to be brought offline.
3791 **/
3792 void
lpfc_offline_prep(struct lpfc_hba * phba,int mbx_action)3793 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3794 {
3795 struct lpfc_vport *vport = phba->pport;
3796 struct lpfc_nodelist *ndlp, *next_ndlp;
3797 struct lpfc_vport **vports;
3798 struct Scsi_Host *shost;
3799 int i;
3800 int offline;
3801 bool hba_pci_err;
3802
3803 if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3804 return;
3805
3806 lpfc_block_mgmt_io(phba, mbx_action);
3807
3808 lpfc_linkdown(phba);
3809
3810 offline = pci_channel_offline(phba->pcidev);
3811 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3812
3813 /* Issue an unreg_login to all nodes on all vports */
3814 vports = lpfc_create_vport_work_array(phba);
3815 if (vports != NULL) {
3816 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3817 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3818 continue;
3819 shost = lpfc_shost_from_vport(vports[i]);
3820 spin_lock_irq(shost->host_lock);
3821 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3822 spin_unlock_irq(shost->host_lock);
3823 set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag);
3824 clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag);
3825
3826 list_for_each_entry_safe(ndlp, next_ndlp,
3827 &vports[i]->fc_nodes,
3828 nlp_listp) {
3829
3830 clear_bit(NLP_NPR_ADISC, &ndlp->nlp_flag);
3831 if (offline || hba_pci_err) {
3832 clear_bit(NLP_UNREG_INP,
3833 &ndlp->nlp_flag);
3834 clear_bit(NLP_RPI_REGISTERED,
3835 &ndlp->nlp_flag);
3836 }
3837
3838 if (ndlp->nlp_type & NLP_FABRIC) {
3839 lpfc_disc_state_machine(vports[i], ndlp,
3840 NULL, NLP_EVT_DEVICE_RECOVERY);
3841
3842 /* Don't remove the node unless the node
3843 * has been unregistered with the
3844 * transport, and we're not in recovery
3845 * before dev_loss_tmo triggered.
3846 * Otherwise, let dev_loss take care of
3847 * the node.
3848 */
3849 if (!(ndlp->save_flags &
3850 NLP_IN_RECOV_POST_DEV_LOSS) &&
3851 !(ndlp->fc4_xpt_flags &
3852 (NVME_XPT_REGD | SCSI_XPT_REGD)))
3853 lpfc_disc_state_machine
3854 (vports[i], ndlp,
3855 NULL,
3856 NLP_EVT_DEVICE_RM);
3857 }
3858 }
3859 }
3860 }
3861 lpfc_destroy_vport_work_array(phba, vports);
3862
3863 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3864
3865 if (phba->wq)
3866 flush_workqueue(phba->wq);
3867 }
3868
3869 /**
3870 * lpfc_offline - Bring a HBA offline
3871 * @phba: pointer to lpfc hba data structure.
3872 *
3873 * This routine actually brings a HBA offline. It stops all the timers
3874 * associated with the HBA, brings down the SLI layer, and eventually
3875 * marks the HBA as in offline state for the upper layer protocol.
3876 **/
3877 void
lpfc_offline(struct lpfc_hba * phba)3878 lpfc_offline(struct lpfc_hba *phba)
3879 {
3880 struct Scsi_Host *shost;
3881 struct lpfc_vport **vports;
3882 int i;
3883
3884 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3885 return;
3886
3887 /* stop port and all timers associated with this hba */
3888 lpfc_stop_port(phba);
3889
3890 /* Tear down the local and target port registrations. The
3891 * nvme transports need to cleanup.
3892 */
3893 lpfc_nvmet_destroy_targetport(phba);
3894 lpfc_nvme_destroy_localport(phba->pport);
3895
3896 vports = lpfc_create_vport_work_array(phba);
3897 if (vports != NULL)
3898 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3899 lpfc_stop_vport_timers(vports[i]);
3900 lpfc_destroy_vport_work_array(phba, vports);
3901 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3902 "0460 Bring Adapter offline\n");
3903 /* Bring down the SLI Layer and cleanup. The HBA is offline
3904 now. */
3905 lpfc_sli_hba_down(phba);
3906 spin_lock_irq(&phba->hbalock);
3907 phba->work_ha = 0;
3908 spin_unlock_irq(&phba->hbalock);
3909 vports = lpfc_create_vport_work_array(phba);
3910 if (vports != NULL)
3911 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3912 shost = lpfc_shost_from_vport(vports[i]);
3913 spin_lock_irq(shost->host_lock);
3914 vports[i]->work_port_events = 0;
3915 spin_unlock_irq(shost->host_lock);
3916 set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3917 }
3918 lpfc_destroy_vport_work_array(phba, vports);
3919 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3920 * in hba_unset
3921 */
3922 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3923 __lpfc_cpuhp_remove(phba);
3924
3925 if (phba->cfg_xri_rebalancing)
3926 lpfc_destroy_multixri_pools(phba);
3927 }
3928
3929 /**
3930 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3931 * @phba: pointer to lpfc hba data structure.
3932 *
3933 * This routine is to free all the SCSI buffers and IOCBs from the driver
3934 * list back to kernel. It is called from lpfc_pci_remove_one to free
3935 * the internal resources before the device is removed from the system.
3936 **/
3937 static void
lpfc_scsi_free(struct lpfc_hba * phba)3938 lpfc_scsi_free(struct lpfc_hba *phba)
3939 {
3940 struct lpfc_io_buf *sb, *sb_next;
3941
3942 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3943 return;
3944
3945 spin_lock_irq(&phba->hbalock);
3946
3947 /* Release all the lpfc_scsi_bufs maintained by this host. */
3948
3949 spin_lock(&phba->scsi_buf_list_put_lock);
3950 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3951 list) {
3952 list_del(&sb->list);
3953 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3954 sb->dma_handle);
3955 kfree(sb);
3956 phba->total_scsi_bufs--;
3957 }
3958 spin_unlock(&phba->scsi_buf_list_put_lock);
3959
3960 spin_lock(&phba->scsi_buf_list_get_lock);
3961 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3962 list) {
3963 list_del(&sb->list);
3964 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3965 sb->dma_handle);
3966 kfree(sb);
3967 phba->total_scsi_bufs--;
3968 }
3969 spin_unlock(&phba->scsi_buf_list_get_lock);
3970 spin_unlock_irq(&phba->hbalock);
3971 }
3972
3973 /**
3974 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3975 * @phba: pointer to lpfc hba data structure.
3976 *
3977 * This routine is to free all the IO buffers and IOCBs from the driver
3978 * list back to kernel. It is called from lpfc_pci_remove_one to free
3979 * the internal resources before the device is removed from the system.
3980 **/
3981 void
lpfc_io_free(struct lpfc_hba * phba)3982 lpfc_io_free(struct lpfc_hba *phba)
3983 {
3984 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
3985 struct lpfc_sli4_hdw_queue *qp;
3986 int idx;
3987
3988 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3989 qp = &phba->sli4_hba.hdwq[idx];
3990 /* Release all the lpfc_nvme_bufs maintained by this host. */
3991 spin_lock(&qp->io_buf_list_put_lock);
3992 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3993 &qp->lpfc_io_buf_list_put,
3994 list) {
3995 list_del(&lpfc_ncmd->list);
3996 qp->put_io_bufs--;
3997 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
3998 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
3999 if (phba->cfg_xpsgl && !phba->nvmet_support)
4000 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4001 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4002 kfree(lpfc_ncmd);
4003 qp->total_io_bufs--;
4004 }
4005 spin_unlock(&qp->io_buf_list_put_lock);
4006
4007 spin_lock(&qp->io_buf_list_get_lock);
4008 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4009 &qp->lpfc_io_buf_list_get,
4010 list) {
4011 list_del(&lpfc_ncmd->list);
4012 qp->get_io_bufs--;
4013 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4014 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4015 if (phba->cfg_xpsgl && !phba->nvmet_support)
4016 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4017 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4018 kfree(lpfc_ncmd);
4019 qp->total_io_bufs--;
4020 }
4021 spin_unlock(&qp->io_buf_list_get_lock);
4022 }
4023 }
4024
4025 /**
4026 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4027 * @phba: pointer to lpfc hba data structure.
4028 *
4029 * This routine first calculates the sizes of the current els and allocated
4030 * scsi sgl lists, and then goes through all sgls to updates the physical
4031 * XRIs assigned due to port function reset. During port initialization, the
4032 * current els and allocated scsi sgl lists are 0s.
4033 *
4034 * Return codes
4035 * 0 - successful (for now, it always returns 0)
4036 **/
4037 int
lpfc_sli4_els_sgl_update(struct lpfc_hba * phba)4038 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4039 {
4040 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4041 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4042 LIST_HEAD(els_sgl_list);
4043 int rc;
4044
4045 /*
4046 * update on pci function's els xri-sgl list
4047 */
4048 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4049
4050 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4051 /* els xri-sgl expanded */
4052 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4053 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4054 "3157 ELS xri-sgl count increased from "
4055 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4056 els_xri_cnt);
4057 /* allocate the additional els sgls */
4058 for (i = 0; i < xri_cnt; i++) {
4059 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4060 GFP_KERNEL);
4061 if (sglq_entry == NULL) {
4062 lpfc_printf_log(phba, KERN_ERR,
4063 LOG_TRACE_EVENT,
4064 "2562 Failure to allocate an "
4065 "ELS sgl entry:%d\n", i);
4066 rc = -ENOMEM;
4067 goto out_free_mem;
4068 }
4069 sglq_entry->buff_type = GEN_BUFF_TYPE;
4070 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4071 &sglq_entry->phys);
4072 if (sglq_entry->virt == NULL) {
4073 kfree(sglq_entry);
4074 lpfc_printf_log(phba, KERN_ERR,
4075 LOG_TRACE_EVENT,
4076 "2563 Failure to allocate an "
4077 "ELS mbuf:%d\n", i);
4078 rc = -ENOMEM;
4079 goto out_free_mem;
4080 }
4081 sglq_entry->sgl = sglq_entry->virt;
4082 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4083 sglq_entry->state = SGL_FREED;
4084 list_add_tail(&sglq_entry->list, &els_sgl_list);
4085 }
4086 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4087 list_splice_init(&els_sgl_list,
4088 &phba->sli4_hba.lpfc_els_sgl_list);
4089 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4090 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4091 /* els xri-sgl shrinked */
4092 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4093 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4094 "3158 ELS xri-sgl count decreased from "
4095 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4096 els_xri_cnt);
4097 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4098 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4099 &els_sgl_list);
4100 /* release extra els sgls from list */
4101 for (i = 0; i < xri_cnt; i++) {
4102 list_remove_head(&els_sgl_list,
4103 sglq_entry, struct lpfc_sglq, list);
4104 if (sglq_entry) {
4105 __lpfc_mbuf_free(phba, sglq_entry->virt,
4106 sglq_entry->phys);
4107 kfree(sglq_entry);
4108 }
4109 }
4110 list_splice_init(&els_sgl_list,
4111 &phba->sli4_hba.lpfc_els_sgl_list);
4112 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4113 } else
4114 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4115 "3163 ELS xri-sgl count unchanged: %d\n",
4116 els_xri_cnt);
4117 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4118
4119 /* update xris to els sgls on the list */
4120 sglq_entry = NULL;
4121 sglq_entry_next = NULL;
4122 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4123 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4124 lxri = lpfc_sli4_next_xritag(phba);
4125 if (lxri == NO_XRI) {
4126 lpfc_printf_log(phba, KERN_ERR,
4127 LOG_TRACE_EVENT,
4128 "2400 Failed to allocate xri for "
4129 "ELS sgl\n");
4130 rc = -ENOMEM;
4131 goto out_free_mem;
4132 }
4133 sglq_entry->sli4_lxritag = lxri;
4134 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4135 }
4136 return 0;
4137
4138 out_free_mem:
4139 lpfc_free_els_sgl_list(phba);
4140 return rc;
4141 }
4142
4143 /**
4144 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4145 * @phba: pointer to lpfc hba data structure.
4146 *
4147 * This routine first calculates the sizes of the current els and allocated
4148 * scsi sgl lists, and then goes through all sgls to updates the physical
4149 * XRIs assigned due to port function reset. During port initialization, the
4150 * current els and allocated scsi sgl lists are 0s.
4151 *
4152 * Return codes
4153 * 0 - successful (for now, it always returns 0)
4154 **/
4155 int
lpfc_sli4_nvmet_sgl_update(struct lpfc_hba * phba)4156 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4157 {
4158 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4159 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4160 uint16_t nvmet_xri_cnt;
4161 LIST_HEAD(nvmet_sgl_list);
4162 int rc;
4163
4164 /*
4165 * update on pci function's nvmet xri-sgl list
4166 */
4167 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4168
4169 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4170 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4171 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4172 /* els xri-sgl expanded */
4173 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4174 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4175 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
4176 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4177 /* allocate the additional nvmet sgls */
4178 for (i = 0; i < xri_cnt; i++) {
4179 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4180 GFP_KERNEL);
4181 if (sglq_entry == NULL) {
4182 lpfc_printf_log(phba, KERN_ERR,
4183 LOG_TRACE_EVENT,
4184 "6303 Failure to allocate an "
4185 "NVMET sgl entry:%d\n", i);
4186 rc = -ENOMEM;
4187 goto out_free_mem;
4188 }
4189 sglq_entry->buff_type = NVMET_BUFF_TYPE;
4190 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4191 &sglq_entry->phys);
4192 if (sglq_entry->virt == NULL) {
4193 kfree(sglq_entry);
4194 lpfc_printf_log(phba, KERN_ERR,
4195 LOG_TRACE_EVENT,
4196 "6304 Failure to allocate an "
4197 "NVMET buf:%d\n", i);
4198 rc = -ENOMEM;
4199 goto out_free_mem;
4200 }
4201 sglq_entry->sgl = sglq_entry->virt;
4202 memset(sglq_entry->sgl, 0,
4203 phba->cfg_sg_dma_buf_size);
4204 sglq_entry->state = SGL_FREED;
4205 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4206 }
4207 spin_lock_irq(&phba->hbalock);
4208 spin_lock(&phba->sli4_hba.sgl_list_lock);
4209 list_splice_init(&nvmet_sgl_list,
4210 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4211 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4212 spin_unlock_irq(&phba->hbalock);
4213 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4214 /* nvmet xri-sgl shrunk */
4215 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4216 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4217 "6305 NVMET xri-sgl count decreased from "
4218 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4219 nvmet_xri_cnt);
4220 spin_lock_irq(&phba->hbalock);
4221 spin_lock(&phba->sli4_hba.sgl_list_lock);
4222 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4223 &nvmet_sgl_list);
4224 /* release extra nvmet sgls from list */
4225 for (i = 0; i < xri_cnt; i++) {
4226 list_remove_head(&nvmet_sgl_list,
4227 sglq_entry, struct lpfc_sglq, list);
4228 if (sglq_entry) {
4229 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4230 sglq_entry->phys);
4231 kfree(sglq_entry);
4232 }
4233 }
4234 list_splice_init(&nvmet_sgl_list,
4235 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4236 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4237 spin_unlock_irq(&phba->hbalock);
4238 } else
4239 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4240 "6306 NVMET xri-sgl count unchanged: %d\n",
4241 nvmet_xri_cnt);
4242 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4243
4244 /* update xris to nvmet sgls on the list */
4245 sglq_entry = NULL;
4246 sglq_entry_next = NULL;
4247 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4248 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4249 lxri = lpfc_sli4_next_xritag(phba);
4250 if (lxri == NO_XRI) {
4251 lpfc_printf_log(phba, KERN_ERR,
4252 LOG_TRACE_EVENT,
4253 "6307 Failed to allocate xri for "
4254 "NVMET sgl\n");
4255 rc = -ENOMEM;
4256 goto out_free_mem;
4257 }
4258 sglq_entry->sli4_lxritag = lxri;
4259 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4260 }
4261 return 0;
4262
4263 out_free_mem:
4264 lpfc_free_nvmet_sgl_list(phba);
4265 return rc;
4266 }
4267
4268 int
lpfc_io_buf_flush(struct lpfc_hba * phba,struct list_head * cbuf)4269 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4270 {
4271 LIST_HEAD(blist);
4272 struct lpfc_sli4_hdw_queue *qp;
4273 struct lpfc_io_buf *lpfc_cmd;
4274 struct lpfc_io_buf *iobufp, *prev_iobufp;
4275 int idx, cnt, xri, inserted;
4276
4277 cnt = 0;
4278 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4279 qp = &phba->sli4_hba.hdwq[idx];
4280 spin_lock_irq(&qp->io_buf_list_get_lock);
4281 spin_lock(&qp->io_buf_list_put_lock);
4282
4283 /* Take everything off the get and put lists */
4284 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4285 list_splice(&qp->lpfc_io_buf_list_put, &blist);
4286 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4287 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4288 cnt += qp->get_io_bufs + qp->put_io_bufs;
4289 qp->get_io_bufs = 0;
4290 qp->put_io_bufs = 0;
4291 qp->total_io_bufs = 0;
4292 spin_unlock(&qp->io_buf_list_put_lock);
4293 spin_unlock_irq(&qp->io_buf_list_get_lock);
4294 }
4295
4296 /*
4297 * Take IO buffers off blist and put on cbuf sorted by XRI.
4298 * This is because POST_SGL takes a sequential range of XRIs
4299 * to post to the firmware.
4300 */
4301 for (idx = 0; idx < cnt; idx++) {
4302 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4303 if (!lpfc_cmd)
4304 return cnt;
4305 if (idx == 0) {
4306 list_add_tail(&lpfc_cmd->list, cbuf);
4307 continue;
4308 }
4309 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4310 inserted = 0;
4311 prev_iobufp = NULL;
4312 list_for_each_entry(iobufp, cbuf, list) {
4313 if (xri < iobufp->cur_iocbq.sli4_xritag) {
4314 if (prev_iobufp)
4315 list_add(&lpfc_cmd->list,
4316 &prev_iobufp->list);
4317 else
4318 list_add(&lpfc_cmd->list, cbuf);
4319 inserted = 1;
4320 break;
4321 }
4322 prev_iobufp = iobufp;
4323 }
4324 if (!inserted)
4325 list_add_tail(&lpfc_cmd->list, cbuf);
4326 }
4327 return cnt;
4328 }
4329
4330 int
lpfc_io_buf_replenish(struct lpfc_hba * phba,struct list_head * cbuf)4331 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4332 {
4333 struct lpfc_sli4_hdw_queue *qp;
4334 struct lpfc_io_buf *lpfc_cmd;
4335 int idx, cnt;
4336 unsigned long iflags;
4337
4338 qp = phba->sli4_hba.hdwq;
4339 cnt = 0;
4340 while (!list_empty(cbuf)) {
4341 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4342 list_remove_head(cbuf, lpfc_cmd,
4343 struct lpfc_io_buf, list);
4344 if (!lpfc_cmd)
4345 return cnt;
4346 cnt++;
4347 qp = &phba->sli4_hba.hdwq[idx];
4348 lpfc_cmd->hdwq_no = idx;
4349 lpfc_cmd->hdwq = qp;
4350 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4351 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags);
4352 list_add_tail(&lpfc_cmd->list,
4353 &qp->lpfc_io_buf_list_put);
4354 qp->put_io_bufs++;
4355 qp->total_io_bufs++;
4356 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
4357 iflags);
4358 }
4359 }
4360 return cnt;
4361 }
4362
4363 /**
4364 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4365 * @phba: pointer to lpfc hba data structure.
4366 *
4367 * This routine first calculates the sizes of the current els and allocated
4368 * scsi sgl lists, and then goes through all sgls to updates the physical
4369 * XRIs assigned due to port function reset. During port initialization, the
4370 * current els and allocated scsi sgl lists are 0s.
4371 *
4372 * Return codes
4373 * 0 - successful (for now, it always returns 0)
4374 **/
4375 int
lpfc_sli4_io_sgl_update(struct lpfc_hba * phba)4376 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4377 {
4378 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4379 uint16_t i, lxri, els_xri_cnt;
4380 uint16_t io_xri_cnt, io_xri_max;
4381 LIST_HEAD(io_sgl_list);
4382 int rc, cnt;
4383
4384 /*
4385 * update on pci function's allocated nvme xri-sgl list
4386 */
4387
4388 /* maximum number of xris available for nvme buffers */
4389 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4390 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4391 phba->sli4_hba.io_xri_max = io_xri_max;
4392
4393 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4394 "6074 Current allocated XRI sgl count:%d, "
4395 "maximum XRI count:%d els_xri_cnt:%d\n\n",
4396 phba->sli4_hba.io_xri_cnt,
4397 phba->sli4_hba.io_xri_max,
4398 els_xri_cnt);
4399
4400 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4401
4402 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4403 /* max nvme xri shrunk below the allocated nvme buffers */
4404 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4405 phba->sli4_hba.io_xri_max;
4406 /* release the extra allocated nvme buffers */
4407 for (i = 0; i < io_xri_cnt; i++) {
4408 list_remove_head(&io_sgl_list, lpfc_ncmd,
4409 struct lpfc_io_buf, list);
4410 if (lpfc_ncmd) {
4411 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4412 lpfc_ncmd->data,
4413 lpfc_ncmd->dma_handle);
4414 kfree(lpfc_ncmd);
4415 }
4416 }
4417 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4418 }
4419
4420 /* update xris associated to remaining allocated nvme buffers */
4421 lpfc_ncmd = NULL;
4422 lpfc_ncmd_next = NULL;
4423 phba->sli4_hba.io_xri_cnt = cnt;
4424 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4425 &io_sgl_list, list) {
4426 lxri = lpfc_sli4_next_xritag(phba);
4427 if (lxri == NO_XRI) {
4428 lpfc_printf_log(phba, KERN_ERR,
4429 LOG_TRACE_EVENT,
4430 "6075 Failed to allocate xri for "
4431 "nvme buffer\n");
4432 rc = -ENOMEM;
4433 goto out_free_mem;
4434 }
4435 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4436 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4437 }
4438 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4439 return 0;
4440
4441 out_free_mem:
4442 lpfc_io_free(phba);
4443 return rc;
4444 }
4445
4446 /**
4447 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4448 * @phba: Pointer to lpfc hba data structure.
4449 * @num_to_alloc: The requested number of buffers to allocate.
4450 *
4451 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4452 * the nvme buffer contains all the necessary information needed to initiate
4453 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4454 * them on a list, it post them to the port by using SGL block post.
4455 *
4456 * Return codes:
4457 * int - number of IO buffers that were allocated and posted.
4458 * 0 = failure, less than num_to_alloc is a partial failure.
4459 **/
4460 int
lpfc_new_io_buf(struct lpfc_hba * phba,int num_to_alloc)4461 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4462 {
4463 struct lpfc_io_buf *lpfc_ncmd;
4464 struct lpfc_iocbq *pwqeq;
4465 uint16_t iotag, lxri = 0;
4466 int bcnt, num_posted;
4467 LIST_HEAD(prep_nblist);
4468 LIST_HEAD(post_nblist);
4469 LIST_HEAD(nvme_nblist);
4470
4471 phba->sli4_hba.io_xri_cnt = 0;
4472 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4473 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
4474 if (!lpfc_ncmd)
4475 break;
4476 /*
4477 * Get memory from the pci pool to map the virt space to
4478 * pci bus space for an I/O. The DMA buffer includes the
4479 * number of SGE's necessary to support the sg_tablesize.
4480 */
4481 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4482 GFP_KERNEL,
4483 &lpfc_ncmd->dma_handle);
4484 if (!lpfc_ncmd->data) {
4485 kfree(lpfc_ncmd);
4486 break;
4487 }
4488
4489 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4490 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4491 } else {
4492 /*
4493 * 4K Page alignment is CRITICAL to BlockGuard, double
4494 * check to be sure.
4495 */
4496 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4497 (((unsigned long)(lpfc_ncmd->data) &
4498 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4499 lpfc_printf_log(phba, KERN_ERR,
4500 LOG_TRACE_EVENT,
4501 "3369 Memory alignment err: "
4502 "addr=%lx\n",
4503 (unsigned long)lpfc_ncmd->data);
4504 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4505 lpfc_ncmd->data,
4506 lpfc_ncmd->dma_handle);
4507 kfree(lpfc_ncmd);
4508 break;
4509 }
4510 }
4511
4512 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4513
4514 lxri = lpfc_sli4_next_xritag(phba);
4515 if (lxri == NO_XRI) {
4516 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4517 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4518 kfree(lpfc_ncmd);
4519 break;
4520 }
4521 pwqeq = &lpfc_ncmd->cur_iocbq;
4522
4523 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4524 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4525 if (iotag == 0) {
4526 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4527 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4528 kfree(lpfc_ncmd);
4529 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4530 "6121 Failed to allocate IOTAG for"
4531 " XRI:0x%x\n", lxri);
4532 lpfc_sli4_free_xri(phba, lxri);
4533 break;
4534 }
4535 pwqeq->sli4_lxritag = lxri;
4536 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4537
4538 /* Initialize local short-hand pointers. */
4539 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4540 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4541 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4542 spin_lock_init(&lpfc_ncmd->buf_lock);
4543
4544 /* add the nvme buffer to a post list */
4545 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4546 phba->sli4_hba.io_xri_cnt++;
4547 }
4548 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4549 "6114 Allocate %d out of %d requested new NVME "
4550 "buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4551 sizeof(*lpfc_ncmd));
4552
4553
4554 /* post the list of nvme buffer sgls to port if available */
4555 if (!list_empty(&post_nblist))
4556 num_posted = lpfc_sli4_post_io_sgl_list(
4557 phba, &post_nblist, bcnt);
4558 else
4559 num_posted = 0;
4560
4561 return num_posted;
4562 }
4563
4564 static uint64_t
lpfc_get_wwpn(struct lpfc_hba * phba)4565 lpfc_get_wwpn(struct lpfc_hba *phba)
4566 {
4567 uint64_t wwn;
4568 int rc;
4569 LPFC_MBOXQ_t *mboxq;
4570 MAILBOX_t *mb;
4571
4572 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4573 GFP_KERNEL);
4574 if (!mboxq)
4575 return (uint64_t)-1;
4576
4577 /* First get WWN of HBA instance */
4578 lpfc_read_nv(phba, mboxq);
4579 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4580 if (rc != MBX_SUCCESS) {
4581 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4582 "6019 Mailbox failed , mbxCmd x%x "
4583 "READ_NV, mbxStatus x%x\n",
4584 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4585 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4586 mempool_free(mboxq, phba->mbox_mem_pool);
4587 return (uint64_t) -1;
4588 }
4589 mb = &mboxq->u.mb;
4590 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4591 /* wwn is WWPN of HBA instance */
4592 mempool_free(mboxq, phba->mbox_mem_pool);
4593 if (phba->sli_rev == LPFC_SLI_REV4)
4594 return be64_to_cpu(wwn);
4595 else
4596 return rol64(wwn, 32);
4597 }
4598
lpfc_get_sg_tablesize(struct lpfc_hba * phba)4599 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4600 {
4601 if (phba->sli_rev == LPFC_SLI_REV4)
4602 if (phba->cfg_xpsgl && !phba->nvmet_support)
4603 return LPFC_MAX_SG_TABLESIZE;
4604 else
4605 return phba->cfg_scsi_seg_cnt;
4606 else
4607 return phba->cfg_sg_seg_cnt;
4608 }
4609
4610 /**
4611 * lpfc_vmid_res_alloc - Allocates resources for VMID
4612 * @phba: pointer to lpfc hba data structure.
4613 * @vport: pointer to vport data structure
4614 *
4615 * This routine allocated the resources needed for the VMID.
4616 *
4617 * Return codes
4618 * 0 on Success
4619 * Non-0 on Failure
4620 */
4621 static int
lpfc_vmid_res_alloc(struct lpfc_hba * phba,struct lpfc_vport * vport)4622 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4623 {
4624 /* VMID feature is supported only on SLI4 */
4625 if (phba->sli_rev == LPFC_SLI_REV3) {
4626 phba->cfg_vmid_app_header = 0;
4627 phba->cfg_vmid_priority_tagging = 0;
4628 }
4629
4630 if (lpfc_is_vmid_enabled(phba)) {
4631 vport->vmid =
4632 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid),
4633 GFP_KERNEL);
4634 if (!vport->vmid)
4635 return -ENOMEM;
4636
4637 rwlock_init(&vport->vmid_lock);
4638
4639 /* Set the VMID parameters for the vport */
4640 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4641 vport->vmid_inactivity_timeout =
4642 phba->cfg_vmid_inactivity_timeout;
4643 vport->max_vmid = phba->cfg_max_vmid;
4644 vport->cur_vmid_cnt = 0;
4645
4646 vport->vmid_priority_range = bitmap_zalloc
4647 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4648
4649 if (!vport->vmid_priority_range) {
4650 kfree(vport->vmid);
4651 return -ENOMEM;
4652 }
4653
4654 hash_init(vport->hash_table);
4655 }
4656 return 0;
4657 }
4658
4659 /**
4660 * lpfc_create_port - Create an FC port
4661 * @phba: pointer to lpfc hba data structure.
4662 * @instance: a unique integer ID to this FC port.
4663 * @dev: pointer to the device data structure.
4664 *
4665 * This routine creates a FC port for the upper layer protocol. The FC port
4666 * can be created on top of either a physical port or a virtual port provided
4667 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4668 * and associates the FC port created before adding the shost into the SCSI
4669 * layer.
4670 *
4671 * Return codes
4672 * @vport - pointer to the virtual N_Port data structure.
4673 * NULL - port create failed.
4674 **/
4675 struct lpfc_vport *
lpfc_create_port(struct lpfc_hba * phba,int instance,struct device * dev)4676 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4677 {
4678 struct lpfc_vport *vport;
4679 struct Scsi_Host *shost = NULL;
4680 struct scsi_host_template *template;
4681 int error = 0;
4682 int i;
4683 uint64_t wwn;
4684 bool use_no_reset_hba = false;
4685 int rc;
4686 u8 if_type;
4687
4688 if (lpfc_no_hba_reset_cnt) {
4689 if (phba->sli_rev < LPFC_SLI_REV4 &&
4690 dev == &phba->pcidev->dev) {
4691 /* Reset the port first */
4692 lpfc_sli_brdrestart(phba);
4693 rc = lpfc_sli_chipset_init(phba);
4694 if (rc)
4695 return NULL;
4696 }
4697 wwn = lpfc_get_wwpn(phba);
4698 }
4699
4700 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4701 if (wwn == lpfc_no_hba_reset[i]) {
4702 lpfc_printf_log(phba, KERN_ERR,
4703 LOG_TRACE_EVENT,
4704 "6020 Setting use_no_reset port=%llx\n",
4705 wwn);
4706 use_no_reset_hba = true;
4707 break;
4708 }
4709 }
4710
4711 /* Seed template for SCSI host registration */
4712 if (dev == &phba->pcidev->dev) {
4713 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4714 /* Seed physical port template */
4715 template = &lpfc_template;
4716
4717 if (use_no_reset_hba)
4718 /* template is for a no reset SCSI Host */
4719 template->eh_host_reset_handler = NULL;
4720
4721 /* Seed updated value of sg_tablesize */
4722 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4723 } else {
4724 /* NVMET is for physical port only */
4725 template = &lpfc_template_nvme;
4726 }
4727 } else {
4728 /* Seed vport template */
4729 template = &lpfc_vport_template;
4730
4731 /* Seed updated value of sg_tablesize */
4732 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4733 }
4734
4735 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4736 if (!shost)
4737 goto out;
4738
4739 vport = (struct lpfc_vport *) shost->hostdata;
4740 vport->phba = phba;
4741 set_bit(FC_LOADING, &vport->load_flag);
4742 set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag);
4743 vport->fc_rscn_flush = 0;
4744 atomic_set(&vport->fc_plogi_cnt, 0);
4745 atomic_set(&vport->fc_adisc_cnt, 0);
4746 atomic_set(&vport->fc_reglogin_cnt, 0);
4747 atomic_set(&vport->fc_prli_cnt, 0);
4748 atomic_set(&vport->fc_unmap_cnt, 0);
4749 atomic_set(&vport->fc_map_cnt, 0);
4750 atomic_set(&vport->fc_npr_cnt, 0);
4751 atomic_set(&vport->fc_unused_cnt, 0);
4752 lpfc_get_vport_cfgparam(vport);
4753
4754 /* Adjust value in vport */
4755 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4756
4757 shost->unique_id = instance;
4758 shost->max_id = LPFC_MAX_TARGET;
4759 shost->max_lun = vport->cfg_max_luns;
4760 shost->this_id = -1;
4761
4762 /* Set max_cmd_len applicable to ASIC support */
4763 if (phba->sli_rev == LPFC_SLI_REV4) {
4764 if_type = bf_get(lpfc_sli_intf_if_type,
4765 &phba->sli4_hba.sli_intf);
4766 switch (if_type) {
4767 case LPFC_SLI_INTF_IF_TYPE_2:
4768 fallthrough;
4769 case LPFC_SLI_INTF_IF_TYPE_6:
4770 shost->max_cmd_len = LPFC_FCP_CDB_LEN_32;
4771 break;
4772 default:
4773 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4774 break;
4775 }
4776 } else {
4777 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4778 }
4779
4780 if (phba->sli_rev == LPFC_SLI_REV4) {
4781 if (!phba->cfg_fcp_mq_threshold ||
4782 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4783 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4784
4785 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4786 phba->cfg_fcp_mq_threshold);
4787
4788 shost->dma_boundary =
4789 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4790 } else
4791 /* SLI-3 has a limited number of hardware queues (3),
4792 * thus there is only one for FCP processing.
4793 */
4794 shost->nr_hw_queues = 1;
4795
4796 /*
4797 * Set initial can_queue value since 0 is no longer supported and
4798 * scsi_add_host will fail. This will be adjusted later based on the
4799 * max xri value determined in hba setup.
4800 */
4801 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4802 if (dev != &phba->pcidev->dev) {
4803 shost->transportt = lpfc_vport_transport_template;
4804 vport->port_type = LPFC_NPIV_PORT;
4805 } else {
4806 shost->transportt = lpfc_transport_template;
4807 vport->port_type = LPFC_PHYSICAL_PORT;
4808 }
4809
4810 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4811 "9081 CreatePort TMPLATE type %x TBLsize %d "
4812 "SEGcnt %d/%d\n",
4813 vport->port_type, shost->sg_tablesize,
4814 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4815
4816 /* Allocate the resources for VMID */
4817 rc = lpfc_vmid_res_alloc(phba, vport);
4818
4819 if (rc)
4820 goto out_put_shost;
4821
4822 /* Initialize all internally managed lists. */
4823 INIT_LIST_HEAD(&vport->fc_nodes);
4824 spin_lock_init(&vport->fc_nodes_list_lock);
4825 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4826 spin_lock_init(&vport->work_port_lock);
4827
4828 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4829
4830 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4831
4832 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4833
4834 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4835 lpfc_setup_bg(phba, shost);
4836
4837 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4838 if (error)
4839 goto out_free_vmid;
4840
4841 spin_lock_irq(&phba->port_list_lock);
4842 list_add_tail(&vport->listentry, &phba->port_list);
4843 spin_unlock_irq(&phba->port_list_lock);
4844 return vport;
4845
4846 out_free_vmid:
4847 kfree(vport->vmid);
4848 bitmap_free(vport->vmid_priority_range);
4849 out_put_shost:
4850 scsi_host_put(shost);
4851 out:
4852 return NULL;
4853 }
4854
4855 /**
4856 * destroy_port - destroy an FC port
4857 * @vport: pointer to an lpfc virtual N_Port data structure.
4858 *
4859 * This routine destroys a FC port from the upper layer protocol. All the
4860 * resources associated with the port are released.
4861 **/
4862 void
destroy_port(struct lpfc_vport * vport)4863 destroy_port(struct lpfc_vport *vport)
4864 {
4865 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4866 struct lpfc_hba *phba = vport->phba;
4867
4868 lpfc_debugfs_terminate(vport);
4869 fc_remove_host(shost);
4870 scsi_remove_host(shost);
4871
4872 spin_lock_irq(&phba->port_list_lock);
4873 list_del_init(&vport->listentry);
4874 spin_unlock_irq(&phba->port_list_lock);
4875
4876 lpfc_cleanup(vport);
4877 return;
4878 }
4879
4880 /**
4881 * lpfc_get_instance - Get a unique integer ID
4882 *
4883 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4884 * uses the kernel idr facility to perform the task.
4885 *
4886 * Return codes:
4887 * instance - a unique integer ID allocated as the new instance.
4888 * -1 - lpfc get instance failed.
4889 **/
4890 int
lpfc_get_instance(void)4891 lpfc_get_instance(void)
4892 {
4893 int ret;
4894
4895 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4896 return ret < 0 ? -1 : ret;
4897 }
4898
4899 /**
4900 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4901 * @shost: pointer to SCSI host data structure.
4902 * @time: elapsed time of the scan in jiffies.
4903 *
4904 * This routine is called by the SCSI layer with a SCSI host to determine
4905 * whether the scan host is finished.
4906 *
4907 * Note: there is no scan_start function as adapter initialization will have
4908 * asynchronously kicked off the link initialization.
4909 *
4910 * Return codes
4911 * 0 - SCSI host scan is not over yet.
4912 * 1 - SCSI host scan is over.
4913 **/
lpfc_scan_finished(struct Scsi_Host * shost,unsigned long time)4914 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4915 {
4916 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4917 struct lpfc_hba *phba = vport->phba;
4918 int stat = 0;
4919
4920 spin_lock_irq(shost->host_lock);
4921
4922 if (test_bit(FC_UNLOADING, &vport->load_flag)) {
4923 stat = 1;
4924 goto finished;
4925 }
4926 if (time >= msecs_to_jiffies(30 * 1000)) {
4927 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4928 "0461 Scanning longer than 30 "
4929 "seconds. Continuing initialization\n");
4930 stat = 1;
4931 goto finished;
4932 }
4933 if (time >= msecs_to_jiffies(15 * 1000) &&
4934 phba->link_state <= LPFC_LINK_DOWN) {
4935 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4936 "0465 Link down longer than 15 "
4937 "seconds. Continuing initialization\n");
4938 stat = 1;
4939 goto finished;
4940 }
4941
4942 if (vport->port_state != LPFC_VPORT_READY)
4943 goto finished;
4944 if (vport->num_disc_nodes || vport->fc_prli_sent)
4945 goto finished;
4946 if (!atomic_read(&vport->fc_map_cnt) &&
4947 time < msecs_to_jiffies(2 * 1000))
4948 goto finished;
4949 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4950 goto finished;
4951
4952 stat = 1;
4953
4954 finished:
4955 spin_unlock_irq(shost->host_lock);
4956 return stat;
4957 }
4958
lpfc_host_supported_speeds_set(struct Scsi_Host * shost)4959 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4960 {
4961 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4962 struct lpfc_hba *phba = vport->phba;
4963
4964 fc_host_supported_speeds(shost) = 0;
4965 /*
4966 * Avoid reporting supported link speed for FCoE as it can't be
4967 * controlled via FCoE.
4968 */
4969 if (test_bit(HBA_FCOE_MODE, &phba->hba_flag))
4970 return;
4971
4972 if (phba->lmt & LMT_256Gb)
4973 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4974 if (phba->lmt & LMT_128Gb)
4975 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4976 if (phba->lmt & LMT_64Gb)
4977 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4978 if (phba->lmt & LMT_32Gb)
4979 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4980 if (phba->lmt & LMT_16Gb)
4981 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4982 if (phba->lmt & LMT_10Gb)
4983 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4984 if (phba->lmt & LMT_8Gb)
4985 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4986 if (phba->lmt & LMT_4Gb)
4987 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4988 if (phba->lmt & LMT_2Gb)
4989 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4990 if (phba->lmt & LMT_1Gb)
4991 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4992 }
4993
4994 /**
4995 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
4996 * @shost: pointer to SCSI host data structure.
4997 *
4998 * This routine initializes a given SCSI host attributes on a FC port. The
4999 * SCSI host can be either on top of a physical port or a virtual port.
5000 **/
lpfc_host_attrib_init(struct Scsi_Host * shost)5001 void lpfc_host_attrib_init(struct Scsi_Host *shost)
5002 {
5003 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
5004 struct lpfc_hba *phba = vport->phba;
5005 /*
5006 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
5007 */
5008
5009 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5010 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5011 fc_host_supported_classes(shost) = FC_COS_CLASS3;
5012
5013 memset(fc_host_supported_fc4s(shost), 0,
5014 sizeof(fc_host_supported_fc4s(shost)));
5015 fc_host_supported_fc4s(shost)[2] = 1;
5016 fc_host_supported_fc4s(shost)[7] = 1;
5017
5018 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5019 sizeof fc_host_symbolic_name(shost));
5020
5021 lpfc_host_supported_speeds_set(shost);
5022
5023 fc_host_maxframe_size(shost) =
5024 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5025 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5026
5027 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5028
5029 /* This value is also unchanging */
5030 memset(fc_host_active_fc4s(shost), 0,
5031 sizeof(fc_host_active_fc4s(shost)));
5032 fc_host_active_fc4s(shost)[2] = 1;
5033 fc_host_active_fc4s(shost)[7] = 1;
5034
5035 fc_host_max_npiv_vports(shost) = phba->max_vpi;
5036 clear_bit(FC_LOADING, &vport->load_flag);
5037 }
5038
5039 /**
5040 * lpfc_stop_port_s3 - Stop SLI3 device port
5041 * @phba: pointer to lpfc hba data structure.
5042 *
5043 * This routine is invoked to stop an SLI3 device port, it stops the device
5044 * from generating interrupts and stops the device driver's timers for the
5045 * device.
5046 **/
5047 static void
lpfc_stop_port_s3(struct lpfc_hba * phba)5048 lpfc_stop_port_s3(struct lpfc_hba *phba)
5049 {
5050 /* Clear all interrupt enable conditions */
5051 writel(0, phba->HCregaddr);
5052 readl(phba->HCregaddr); /* flush */
5053 /* Clear all pending interrupts */
5054 writel(0xffffffff, phba->HAregaddr);
5055 readl(phba->HAregaddr); /* flush */
5056
5057 /* Reset some HBA SLI setup states */
5058 lpfc_stop_hba_timers(phba);
5059 phba->pport->work_port_events = 0;
5060 }
5061
5062 /**
5063 * lpfc_stop_port_s4 - Stop SLI4 device port
5064 * @phba: pointer to lpfc hba data structure.
5065 *
5066 * This routine is invoked to stop an SLI4 device port, it stops the device
5067 * from generating interrupts and stops the device driver's timers for the
5068 * device.
5069 **/
5070 static void
lpfc_stop_port_s4(struct lpfc_hba * phba)5071 lpfc_stop_port_s4(struct lpfc_hba *phba)
5072 {
5073 /* Reset some HBA SLI4 setup states */
5074 lpfc_stop_hba_timers(phba);
5075 if (phba->pport)
5076 phba->pport->work_port_events = 0;
5077 phba->sli4_hba.intr_enable = 0;
5078 }
5079
5080 /**
5081 * lpfc_stop_port - Wrapper function for stopping hba port
5082 * @phba: Pointer to HBA context object.
5083 *
5084 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5085 * the API jump table function pointer from the lpfc_hba struct.
5086 **/
5087 void
lpfc_stop_port(struct lpfc_hba * phba)5088 lpfc_stop_port(struct lpfc_hba *phba)
5089 {
5090 phba->lpfc_stop_port(phba);
5091
5092 if (phba->wq)
5093 flush_workqueue(phba->wq);
5094 }
5095
5096 /**
5097 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5098 * @phba: Pointer to hba for which this call is being executed.
5099 *
5100 * This routine starts the timer waiting for the FCF rediscovery to complete.
5101 **/
5102 void
lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba * phba)5103 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5104 {
5105 unsigned long fcf_redisc_wait_tmo =
5106 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5107 /* Start fcf rediscovery wait period timer */
5108 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5109 spin_lock_irq(&phba->hbalock);
5110 /* Allow action to new fcf asynchronous event */
5111 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5112 /* Mark the FCF rediscovery pending state */
5113 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5114 spin_unlock_irq(&phba->hbalock);
5115 }
5116
5117 /**
5118 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5119 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5120 *
5121 * This routine is invoked when waiting for FCF table rediscover has been
5122 * timed out. If new FCF record(s) has (have) been discovered during the
5123 * wait period, a new FCF event shall be added to the FCOE async event
5124 * list, and then worker thread shall be waked up for processing from the
5125 * worker thread context.
5126 **/
5127 static void
lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list * t)5128 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5129 {
5130 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
5131
5132 /* Don't send FCF rediscovery event if timer cancelled */
5133 spin_lock_irq(&phba->hbalock);
5134 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5135 spin_unlock_irq(&phba->hbalock);
5136 return;
5137 }
5138 /* Clear FCF rediscovery timer pending flag */
5139 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5140 /* FCF rediscovery event to worker thread */
5141 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5142 spin_unlock_irq(&phba->hbalock);
5143 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5144 "2776 FCF rediscover quiescent timer expired\n");
5145 /* wake up worker thread */
5146 lpfc_worker_wake_up(phba);
5147 }
5148
5149 /**
5150 * lpfc_vmid_poll - VMID timeout detection
5151 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5152 *
5153 * This routine is invoked when there is no I/O on by a VM for the specified
5154 * amount of time. When this situation is detected, the VMID has to be
5155 * deregistered from the switch and all the local resources freed. The VMID
5156 * will be reassigned to the VM once the I/O begins.
5157 **/
5158 static void
lpfc_vmid_poll(struct timer_list * t)5159 lpfc_vmid_poll(struct timer_list *t)
5160 {
5161 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll);
5162 u32 wake_up = 0;
5163
5164 /* check if there is a need to issue QFPA */
5165 if (phba->pport->vmid_priority_tagging) {
5166 wake_up = 1;
5167 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5168 }
5169
5170 /* Is the vmid inactivity timer enabled */
5171 if (phba->pport->vmid_inactivity_timeout ||
5172 test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) {
5173 wake_up = 1;
5174 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5175 }
5176
5177 if (wake_up)
5178 lpfc_worker_wake_up(phba);
5179
5180 /* restart the timer for the next iteration */
5181 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 *
5182 LPFC_VMID_TIMER));
5183 }
5184
5185 /**
5186 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5187 * @phba: pointer to lpfc hba data structure.
5188 * @acqe_link: pointer to the async link completion queue entry.
5189 *
5190 * This routine is to parse the SLI4 link-attention link fault code.
5191 **/
5192 static void
lpfc_sli4_parse_latt_fault(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5193 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5194 struct lpfc_acqe_link *acqe_link)
5195 {
5196 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) {
5197 case LPFC_FC_LA_TYPE_LINK_DOWN:
5198 case LPFC_FC_LA_TYPE_TRUNKING_EVENT:
5199 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
5200 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
5201 break;
5202 default:
5203 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5204 case LPFC_ASYNC_LINK_FAULT_NONE:
5205 case LPFC_ASYNC_LINK_FAULT_LOCAL:
5206 case LPFC_ASYNC_LINK_FAULT_REMOTE:
5207 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5208 break;
5209 default:
5210 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5211 "0398 Unknown link fault code: x%x\n",
5212 bf_get(lpfc_acqe_link_fault, acqe_link));
5213 break;
5214 }
5215 break;
5216 }
5217 }
5218
5219 /**
5220 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5221 * @phba: pointer to lpfc hba data structure.
5222 * @acqe_link: pointer to the async link completion queue entry.
5223 *
5224 * This routine is to parse the SLI4 link attention type and translate it
5225 * into the base driver's link attention type coding.
5226 *
5227 * Return: Link attention type in terms of base driver's coding.
5228 **/
5229 static uint8_t
lpfc_sli4_parse_latt_type(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5230 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5231 struct lpfc_acqe_link *acqe_link)
5232 {
5233 uint8_t att_type;
5234
5235 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5236 case LPFC_ASYNC_LINK_STATUS_DOWN:
5237 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5238 att_type = LPFC_ATT_LINK_DOWN;
5239 break;
5240 case LPFC_ASYNC_LINK_STATUS_UP:
5241 /* Ignore physical link up events - wait for logical link up */
5242 att_type = LPFC_ATT_RESERVED;
5243 break;
5244 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5245 att_type = LPFC_ATT_LINK_UP;
5246 break;
5247 default:
5248 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5249 "0399 Invalid link attention type: x%x\n",
5250 bf_get(lpfc_acqe_link_status, acqe_link));
5251 att_type = LPFC_ATT_RESERVED;
5252 break;
5253 }
5254 return att_type;
5255 }
5256
5257 /**
5258 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5259 * @phba: pointer to lpfc hba data structure.
5260 *
5261 * This routine is to get an SLI3 FC port's link speed in Mbps.
5262 *
5263 * Return: link speed in terms of Mbps.
5264 **/
5265 uint32_t
lpfc_sli_port_speed_get(struct lpfc_hba * phba)5266 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5267 {
5268 uint32_t link_speed;
5269
5270 if (!lpfc_is_link_up(phba))
5271 return 0;
5272
5273 if (phba->sli_rev <= LPFC_SLI_REV3) {
5274 switch (phba->fc_linkspeed) {
5275 case LPFC_LINK_SPEED_1GHZ:
5276 link_speed = 1000;
5277 break;
5278 case LPFC_LINK_SPEED_2GHZ:
5279 link_speed = 2000;
5280 break;
5281 case LPFC_LINK_SPEED_4GHZ:
5282 link_speed = 4000;
5283 break;
5284 case LPFC_LINK_SPEED_8GHZ:
5285 link_speed = 8000;
5286 break;
5287 case LPFC_LINK_SPEED_10GHZ:
5288 link_speed = 10000;
5289 break;
5290 case LPFC_LINK_SPEED_16GHZ:
5291 link_speed = 16000;
5292 break;
5293 default:
5294 link_speed = 0;
5295 }
5296 } else {
5297 if (phba->sli4_hba.link_state.logical_speed)
5298 link_speed =
5299 phba->sli4_hba.link_state.logical_speed;
5300 else
5301 link_speed = phba->sli4_hba.link_state.speed;
5302 }
5303 return link_speed;
5304 }
5305
5306 /**
5307 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5308 * @phba: pointer to lpfc hba data structure.
5309 * @evt_code: asynchronous event code.
5310 * @speed_code: asynchronous event link speed code.
5311 *
5312 * This routine is to parse the giving SLI4 async event link speed code into
5313 * value of Mbps for the link speed.
5314 *
5315 * Return: link speed in terms of Mbps.
5316 **/
5317 static uint32_t
lpfc_sli4_port_speed_parse(struct lpfc_hba * phba,uint32_t evt_code,uint8_t speed_code)5318 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5319 uint8_t speed_code)
5320 {
5321 uint32_t port_speed;
5322
5323 switch (evt_code) {
5324 case LPFC_TRAILER_CODE_LINK:
5325 switch (speed_code) {
5326 case LPFC_ASYNC_LINK_SPEED_ZERO:
5327 port_speed = 0;
5328 break;
5329 case LPFC_ASYNC_LINK_SPEED_10MBPS:
5330 port_speed = 10;
5331 break;
5332 case LPFC_ASYNC_LINK_SPEED_100MBPS:
5333 port_speed = 100;
5334 break;
5335 case LPFC_ASYNC_LINK_SPEED_1GBPS:
5336 port_speed = 1000;
5337 break;
5338 case LPFC_ASYNC_LINK_SPEED_10GBPS:
5339 port_speed = 10000;
5340 break;
5341 case LPFC_ASYNC_LINK_SPEED_20GBPS:
5342 port_speed = 20000;
5343 break;
5344 case LPFC_ASYNC_LINK_SPEED_25GBPS:
5345 port_speed = 25000;
5346 break;
5347 case LPFC_ASYNC_LINK_SPEED_40GBPS:
5348 port_speed = 40000;
5349 break;
5350 case LPFC_ASYNC_LINK_SPEED_100GBPS:
5351 port_speed = 100000;
5352 break;
5353 default:
5354 port_speed = 0;
5355 }
5356 break;
5357 case LPFC_TRAILER_CODE_FC:
5358 switch (speed_code) {
5359 case LPFC_FC_LA_SPEED_UNKNOWN:
5360 port_speed = 0;
5361 break;
5362 case LPFC_FC_LA_SPEED_1G:
5363 port_speed = 1000;
5364 break;
5365 case LPFC_FC_LA_SPEED_2G:
5366 port_speed = 2000;
5367 break;
5368 case LPFC_FC_LA_SPEED_4G:
5369 port_speed = 4000;
5370 break;
5371 case LPFC_FC_LA_SPEED_8G:
5372 port_speed = 8000;
5373 break;
5374 case LPFC_FC_LA_SPEED_10G:
5375 port_speed = 10000;
5376 break;
5377 case LPFC_FC_LA_SPEED_16G:
5378 port_speed = 16000;
5379 break;
5380 case LPFC_FC_LA_SPEED_32G:
5381 port_speed = 32000;
5382 break;
5383 case LPFC_FC_LA_SPEED_64G:
5384 port_speed = 64000;
5385 break;
5386 case LPFC_FC_LA_SPEED_128G:
5387 port_speed = 128000;
5388 break;
5389 case LPFC_FC_LA_SPEED_256G:
5390 port_speed = 256000;
5391 break;
5392 default:
5393 port_speed = 0;
5394 }
5395 break;
5396 default:
5397 port_speed = 0;
5398 }
5399 return port_speed;
5400 }
5401
5402 /**
5403 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5404 * @phba: pointer to lpfc hba data structure.
5405 * @acqe_link: pointer to the async link completion queue entry.
5406 *
5407 * This routine is to handle the SLI4 asynchronous FCoE link event.
5408 **/
5409 static void
lpfc_sli4_async_link_evt(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5410 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5411 struct lpfc_acqe_link *acqe_link)
5412 {
5413 LPFC_MBOXQ_t *pmb;
5414 MAILBOX_t *mb;
5415 struct lpfc_mbx_read_top *la;
5416 uint8_t att_type;
5417 int rc;
5418
5419 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5420 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5421 return;
5422 phba->fcoe_eventtag = acqe_link->event_tag;
5423 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5424 if (!pmb) {
5425 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5426 "0395 The mboxq allocation failed\n");
5427 return;
5428 }
5429
5430 rc = lpfc_mbox_rsrc_prep(phba, pmb);
5431 if (rc) {
5432 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5433 "0396 mailbox allocation failed\n");
5434 goto out_free_pmb;
5435 }
5436
5437 /* Cleanup any outstanding ELS commands */
5438 lpfc_els_flush_all_cmd(phba);
5439
5440 /* Block ELS IOCBs until we have done process link event */
5441 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5442
5443 /* Update link event statistics */
5444 phba->sli.slistat.link_event++;
5445
5446 /* Create lpfc_handle_latt mailbox command from link ACQE */
5447 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
5448 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5449 pmb->vport = phba->pport;
5450
5451 /* Keep the link status for extra SLI4 state machine reference */
5452 phba->sli4_hba.link_state.speed =
5453 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5454 bf_get(lpfc_acqe_link_speed, acqe_link));
5455 phba->sli4_hba.link_state.duplex =
5456 bf_get(lpfc_acqe_link_duplex, acqe_link);
5457 phba->sli4_hba.link_state.status =
5458 bf_get(lpfc_acqe_link_status, acqe_link);
5459 phba->sli4_hba.link_state.type =
5460 bf_get(lpfc_acqe_link_type, acqe_link);
5461 phba->sli4_hba.link_state.number =
5462 bf_get(lpfc_acqe_link_number, acqe_link);
5463 phba->sli4_hba.link_state.fault =
5464 bf_get(lpfc_acqe_link_fault, acqe_link);
5465 phba->sli4_hba.link_state.logical_speed =
5466 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5467
5468 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5469 "2900 Async FC/FCoE Link event - Speed:%dGBit "
5470 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5471 "Logical speed:%dMbps Fault:%d\n",
5472 phba->sli4_hba.link_state.speed,
5473 phba->sli4_hba.link_state.topology,
5474 phba->sli4_hba.link_state.status,
5475 phba->sli4_hba.link_state.type,
5476 phba->sli4_hba.link_state.number,
5477 phba->sli4_hba.link_state.logical_speed,
5478 phba->sli4_hba.link_state.fault);
5479 /*
5480 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5481 * topology info. Note: Optional for non FC-AL ports.
5482 */
5483 if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) {
5484 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5485 if (rc == MBX_NOT_FINISHED)
5486 goto out_free_pmb;
5487 return;
5488 }
5489 /*
5490 * For FCoE Mode: fill in all the topology information we need and call
5491 * the READ_TOPOLOGY completion routine to continue without actually
5492 * sending the READ_TOPOLOGY mailbox command to the port.
5493 */
5494 /* Initialize completion status */
5495 mb = &pmb->u.mb;
5496 mb->mbxStatus = MBX_SUCCESS;
5497
5498 /* Parse port fault information field */
5499 lpfc_sli4_parse_latt_fault(phba, acqe_link);
5500
5501 /* Parse and translate link attention fields */
5502 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5503 la->eventTag = acqe_link->event_tag;
5504 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5505 bf_set(lpfc_mbx_read_top_link_spd, la,
5506 (bf_get(lpfc_acqe_link_speed, acqe_link)));
5507
5508 /* Fake the following irrelevant fields */
5509 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5510 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5511 bf_set(lpfc_mbx_read_top_il, la, 0);
5512 bf_set(lpfc_mbx_read_top_pb, la, 0);
5513 bf_set(lpfc_mbx_read_top_fa, la, 0);
5514 bf_set(lpfc_mbx_read_top_mm, la, 0);
5515
5516 /* Invoke the lpfc_handle_latt mailbox command callback function */
5517 lpfc_mbx_cmpl_read_topology(phba, pmb);
5518
5519 return;
5520
5521 out_free_pmb:
5522 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5523 }
5524
5525 /**
5526 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5527 * topology.
5528 * @phba: pointer to lpfc hba data structure.
5529 * @speed_code: asynchronous event link speed code.
5530 *
5531 * This routine is to parse the giving SLI4 async event link speed code into
5532 * value of Read topology link speed.
5533 *
5534 * Return: link speed in terms of Read topology.
5535 **/
5536 static uint8_t
lpfc_async_link_speed_to_read_top(struct lpfc_hba * phba,uint8_t speed_code)5537 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5538 {
5539 uint8_t port_speed;
5540
5541 switch (speed_code) {
5542 case LPFC_FC_LA_SPEED_1G:
5543 port_speed = LPFC_LINK_SPEED_1GHZ;
5544 break;
5545 case LPFC_FC_LA_SPEED_2G:
5546 port_speed = LPFC_LINK_SPEED_2GHZ;
5547 break;
5548 case LPFC_FC_LA_SPEED_4G:
5549 port_speed = LPFC_LINK_SPEED_4GHZ;
5550 break;
5551 case LPFC_FC_LA_SPEED_8G:
5552 port_speed = LPFC_LINK_SPEED_8GHZ;
5553 break;
5554 case LPFC_FC_LA_SPEED_16G:
5555 port_speed = LPFC_LINK_SPEED_16GHZ;
5556 break;
5557 case LPFC_FC_LA_SPEED_32G:
5558 port_speed = LPFC_LINK_SPEED_32GHZ;
5559 break;
5560 case LPFC_FC_LA_SPEED_64G:
5561 port_speed = LPFC_LINK_SPEED_64GHZ;
5562 break;
5563 case LPFC_FC_LA_SPEED_128G:
5564 port_speed = LPFC_LINK_SPEED_128GHZ;
5565 break;
5566 case LPFC_FC_LA_SPEED_256G:
5567 port_speed = LPFC_LINK_SPEED_256GHZ;
5568 break;
5569 default:
5570 port_speed = 0;
5571 break;
5572 }
5573
5574 return port_speed;
5575 }
5576
5577 void
lpfc_cgn_dump_rxmonitor(struct lpfc_hba * phba)5578 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5579 {
5580 if (!phba->rx_monitor) {
5581 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5582 "4411 Rx Monitor Info is empty.\n");
5583 } else {
5584 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5585 LPFC_MAX_RXMONITOR_DUMP);
5586 }
5587 }
5588
5589 /**
5590 * lpfc_cgn_update_stat - Save data into congestion stats buffer
5591 * @phba: pointer to lpfc hba data structure.
5592 * @dtag: FPIN descriptor received
5593 *
5594 * Increment the FPIN received counter/time when it happens.
5595 */
5596 void
lpfc_cgn_update_stat(struct lpfc_hba * phba,uint32_t dtag)5597 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5598 {
5599 struct lpfc_cgn_info *cp;
5600 u32 value;
5601
5602 /* Make sure we have a congestion info buffer */
5603 if (!phba->cgn_i)
5604 return;
5605 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5606
5607 /* Update congestion statistics */
5608 switch (dtag) {
5609 case ELS_DTAG_LNK_INTEGRITY:
5610 le32_add_cpu(&cp->link_integ_notification, 1);
5611 lpfc_cgn_update_tstamp(phba, &cp->stat_lnk);
5612 break;
5613 case ELS_DTAG_DELIVERY:
5614 le32_add_cpu(&cp->delivery_notification, 1);
5615 lpfc_cgn_update_tstamp(phba, &cp->stat_delivery);
5616 break;
5617 case ELS_DTAG_PEER_CONGEST:
5618 le32_add_cpu(&cp->cgn_peer_notification, 1);
5619 lpfc_cgn_update_tstamp(phba, &cp->stat_peer);
5620 break;
5621 case ELS_DTAG_CONGESTION:
5622 le32_add_cpu(&cp->cgn_notification, 1);
5623 lpfc_cgn_update_tstamp(phba, &cp->stat_fpin);
5624 }
5625 if (phba->cgn_fpin_frequency &&
5626 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5627 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5628 cp->cgn_stat_npm = value;
5629 }
5630
5631 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5632 LPFC_CGN_CRC32_SEED);
5633 cp->cgn_info_crc = cpu_to_le32(value);
5634 }
5635
5636 /**
5637 * lpfc_cgn_update_tstamp - Update cmf timestamp
5638 * @phba: pointer to lpfc hba data structure.
5639 * @ts: structure to write the timestamp to.
5640 */
5641 void
lpfc_cgn_update_tstamp(struct lpfc_hba * phba,struct lpfc_cgn_ts * ts)5642 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts)
5643 {
5644 struct timespec64 cur_time;
5645 struct tm tm_val;
5646
5647 ktime_get_real_ts64(&cur_time);
5648 time64_to_tm(cur_time.tv_sec, 0, &tm_val);
5649
5650 ts->month = tm_val.tm_mon + 1;
5651 ts->day = tm_val.tm_mday;
5652 ts->year = tm_val.tm_year - 100;
5653 ts->hour = tm_val.tm_hour;
5654 ts->minute = tm_val.tm_min;
5655 ts->second = tm_val.tm_sec;
5656
5657 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5658 "2646 Updated CMF timestamp : "
5659 "%u/%u/%u %u:%u:%u\n",
5660 ts->day, ts->month,
5661 ts->year, ts->hour,
5662 ts->minute, ts->second);
5663 }
5664
5665 /**
5666 * lpfc_cmf_stats_timer - Save data into registered congestion buffer
5667 * @timer: Timer cookie to access lpfc private data
5668 *
5669 * Save the congestion event data every minute.
5670 * On the hour collapse all the minute data into hour data. Every day
5671 * collapse all the hour data into daily data. Separate driver
5672 * and fabrc congestion event counters that will be saved out
5673 * to the registered congestion buffer every minute.
5674 */
5675 static enum hrtimer_restart
lpfc_cmf_stats_timer(struct hrtimer * timer)5676 lpfc_cmf_stats_timer(struct hrtimer *timer)
5677 {
5678 struct lpfc_hba *phba;
5679 struct lpfc_cgn_info *cp;
5680 uint32_t i, index;
5681 uint16_t value, mvalue;
5682 uint64_t bps;
5683 uint32_t mbps;
5684 uint32_t dvalue, wvalue, lvalue, avalue;
5685 uint64_t latsum;
5686 __le16 *ptr;
5687 __le32 *lptr;
5688 __le16 *mptr;
5689
5690 phba = container_of(timer, struct lpfc_hba, cmf_stats_timer);
5691 /* Make sure we have a congestion info buffer */
5692 if (!phba->cgn_i)
5693 return HRTIMER_NORESTART;
5694 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5695
5696 phba->cgn_evt_timestamp = jiffies +
5697 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5698 phba->cgn_evt_minute++;
5699
5700 /* We should get to this point in the routine on 1 minute intervals */
5701 lpfc_cgn_update_tstamp(phba, &cp->base_time);
5702
5703 if (phba->cgn_fpin_frequency &&
5704 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5705 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5706 cp->cgn_stat_npm = value;
5707 }
5708
5709 /* Read and clear the latency counters for this minute */
5710 lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5711 latsum = atomic64_read(&phba->cgn_latency_evt);
5712 atomic_set(&phba->cgn_latency_evt_cnt, 0);
5713 atomic64_set(&phba->cgn_latency_evt, 0);
5714
5715 /* We need to store MB/sec bandwidth in the congestion information.
5716 * block_cnt is count of 512 byte blocks for the entire minute,
5717 * bps will get bytes per sec before finally converting to MB/sec.
5718 */
5719 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5720 phba->rx_block_cnt = 0;
5721 mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5722
5723 /* Every minute */
5724 /* cgn parameters */
5725 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5726 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5727 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5728 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5729
5730 /* Fill in default LUN qdepth */
5731 value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5732 cp->cgn_lunq = cpu_to_le16(value);
5733
5734 /* Record congestion buffer info - every minute
5735 * cgn_driver_evt_cnt (Driver events)
5736 * cgn_fabric_warn_cnt (Congestion Warnings)
5737 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5738 * cgn_fabric_alarm_cnt (Congestion Alarms)
5739 */
5740 index = ++cp->cgn_index_minute;
5741 if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5742 cp->cgn_index_minute = 0;
5743 index = 0;
5744 }
5745
5746 /* Get the number of driver events in this sample and reset counter */
5747 dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5748 atomic_set(&phba->cgn_driver_evt_cnt, 0);
5749
5750 /* Get the number of warning events - FPIN and Signal for this minute */
5751 wvalue = 0;
5752 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5753 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5754 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5755 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5756 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5757
5758 /* Get the number of alarm events - FPIN and Signal for this minute */
5759 avalue = 0;
5760 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5761 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5762 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5763 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5764
5765 /* Collect the driver, warning, alarm and latency counts for this
5766 * minute into the driver congestion buffer.
5767 */
5768 ptr = &cp->cgn_drvr_min[index];
5769 value = (uint16_t)dvalue;
5770 *ptr = cpu_to_le16(value);
5771
5772 ptr = &cp->cgn_warn_min[index];
5773 value = (uint16_t)wvalue;
5774 *ptr = cpu_to_le16(value);
5775
5776 ptr = &cp->cgn_alarm_min[index];
5777 value = (uint16_t)avalue;
5778 *ptr = cpu_to_le16(value);
5779
5780 lptr = &cp->cgn_latency_min[index];
5781 if (lvalue) {
5782 lvalue = (uint32_t)div_u64(latsum, lvalue);
5783 *lptr = cpu_to_le32(lvalue);
5784 } else {
5785 *lptr = 0;
5786 }
5787
5788 /* Collect the bandwidth value into the driver's congesion buffer. */
5789 mptr = &cp->cgn_bw_min[index];
5790 *mptr = cpu_to_le16(mvalue);
5791
5792 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5793 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5794 index, dvalue, wvalue, *lptr, mvalue, avalue);
5795
5796 /* Every hour */
5797 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5798 /* Record congestion buffer info - every hour
5799 * Collapse all minutes into an hour
5800 */
5801 index = ++cp->cgn_index_hour;
5802 if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5803 cp->cgn_index_hour = 0;
5804 index = 0;
5805 }
5806
5807 dvalue = 0;
5808 wvalue = 0;
5809 lvalue = 0;
5810 avalue = 0;
5811 mvalue = 0;
5812 mbps = 0;
5813 for (i = 0; i < LPFC_MIN_HOUR; i++) {
5814 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5815 wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5816 lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5817 mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5818 avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5819 }
5820 if (lvalue) /* Avg of latency averages */
5821 lvalue /= LPFC_MIN_HOUR;
5822 if (mbps) /* Avg of Bandwidth averages */
5823 mvalue = mbps / LPFC_MIN_HOUR;
5824
5825 lptr = &cp->cgn_drvr_hr[index];
5826 *lptr = cpu_to_le32(dvalue);
5827 lptr = &cp->cgn_warn_hr[index];
5828 *lptr = cpu_to_le32(wvalue);
5829 lptr = &cp->cgn_latency_hr[index];
5830 *lptr = cpu_to_le32(lvalue);
5831 mptr = &cp->cgn_bw_hr[index];
5832 *mptr = cpu_to_le16(mvalue);
5833 lptr = &cp->cgn_alarm_hr[index];
5834 *lptr = cpu_to_le32(avalue);
5835
5836 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5837 "2419 Congestion Info - hour "
5838 "(%d): %d %d %d %d %d\n",
5839 index, dvalue, wvalue, lvalue, mvalue, avalue);
5840 }
5841
5842 /* Every day */
5843 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5844 /* Record congestion buffer info - every hour
5845 * Collapse all hours into a day. Rotate days
5846 * after LPFC_MAX_CGN_DAYS.
5847 */
5848 index = ++cp->cgn_index_day;
5849 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5850 cp->cgn_index_day = 0;
5851 index = 0;
5852 }
5853
5854 dvalue = 0;
5855 wvalue = 0;
5856 lvalue = 0;
5857 mvalue = 0;
5858 mbps = 0;
5859 avalue = 0;
5860 for (i = 0; i < LPFC_HOUR_DAY; i++) {
5861 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5862 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5863 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5864 mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5865 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5866 }
5867 if (lvalue) /* Avg of latency averages */
5868 lvalue /= LPFC_HOUR_DAY;
5869 if (mbps) /* Avg of Bandwidth averages */
5870 mvalue = mbps / LPFC_HOUR_DAY;
5871
5872 lptr = &cp->cgn_drvr_day[index];
5873 *lptr = cpu_to_le32(dvalue);
5874 lptr = &cp->cgn_warn_day[index];
5875 *lptr = cpu_to_le32(wvalue);
5876 lptr = &cp->cgn_latency_day[index];
5877 *lptr = cpu_to_le32(lvalue);
5878 mptr = &cp->cgn_bw_day[index];
5879 *mptr = cpu_to_le16(mvalue);
5880 lptr = &cp->cgn_alarm_day[index];
5881 *lptr = cpu_to_le32(avalue);
5882
5883 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5884 "2420 Congestion Info - daily (%d): "
5885 "%d %d %d %d %d\n",
5886 index, dvalue, wvalue, lvalue, mvalue, avalue);
5887 }
5888
5889 /* Use the frequency found in the last rcv'ed FPIN */
5890 value = phba->cgn_fpin_frequency;
5891 cp->cgn_warn_freq = cpu_to_le16(value);
5892 cp->cgn_alarm_freq = cpu_to_le16(value);
5893
5894 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5895 LPFC_CGN_CRC32_SEED);
5896 cp->cgn_info_crc = cpu_to_le32(lvalue);
5897
5898 hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC));
5899
5900 return HRTIMER_RESTART;
5901 }
5902
5903 /**
5904 * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5905 * @phba: The Hba for which this call is being executed.
5906 *
5907 * The routine calculates the latency from the beginning of the CMF timer
5908 * interval to the current point in time. It is called from IO completion
5909 * when we exceed our Bandwidth limitation for the time interval.
5910 */
5911 uint32_t
lpfc_calc_cmf_latency(struct lpfc_hba * phba)5912 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5913 {
5914 struct timespec64 cmpl_time;
5915 uint32_t msec = 0;
5916
5917 ktime_get_real_ts64(&cmpl_time);
5918
5919 /* This routine works on a ms granularity so sec and usec are
5920 * converted accordingly.
5921 */
5922 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5923 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5924 NSEC_PER_MSEC;
5925 } else {
5926 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5927 msec = (cmpl_time.tv_sec -
5928 phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5929 msec += ((cmpl_time.tv_nsec -
5930 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5931 } else {
5932 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5933 1) * MSEC_PER_SEC;
5934 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5935 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5936 }
5937 }
5938 return msec;
5939 }
5940
5941 /**
5942 * lpfc_cmf_timer - This is the timer function for one congestion
5943 * rate interval.
5944 * @timer: Pointer to the high resolution timer that expired
5945 */
5946 static enum hrtimer_restart
lpfc_cmf_timer(struct hrtimer * timer)5947 lpfc_cmf_timer(struct hrtimer *timer)
5948 {
5949 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5950 cmf_timer);
5951 struct rx_info_entry entry;
5952 uint32_t io_cnt;
5953 uint32_t busy, max_read;
5954 uint64_t total, rcv, lat, mbpi, extra, cnt;
5955 int timer_interval = LPFC_CMF_INTERVAL;
5956 uint32_t ms;
5957 struct lpfc_cgn_stat *cgs;
5958 int cpu;
5959
5960 /* Only restart the timer if congestion mgmt is on */
5961 if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5962 !phba->cmf_latency.tv_sec) {
5963 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5964 "6224 CMF timer exit: %d %lld\n",
5965 phba->cmf_active_mode,
5966 (uint64_t)phba->cmf_latency.tv_sec);
5967 return HRTIMER_NORESTART;
5968 }
5969
5970 /* If pport is not ready yet, just exit and wait for
5971 * the next timer cycle to hit.
5972 */
5973 if (!phba->pport)
5974 goto skip;
5975
5976 /* Do not block SCSI IO while in the timer routine since
5977 * total_bytes will be cleared
5978 */
5979 atomic_set(&phba->cmf_stop_io, 1);
5980
5981 /* First we need to calculate the actual ms between
5982 * the last timer interrupt and this one. We ask for
5983 * LPFC_CMF_INTERVAL, however the actual time may
5984 * vary depending on system overhead.
5985 */
5986 ms = lpfc_calc_cmf_latency(phba);
5987
5988
5989 /* Immediately after we calculate the time since the last
5990 * timer interrupt, set the start time for the next
5991 * interrupt
5992 */
5993 ktime_get_real_ts64(&phba->cmf_latency);
5994
5995 phba->cmf_link_byte_count =
5996 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
5997
5998 /* Collect all the stats from the prior timer interval */
5999 total = 0;
6000 io_cnt = 0;
6001 lat = 0;
6002 rcv = 0;
6003 for_each_present_cpu(cpu) {
6004 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6005 total += atomic64_xchg(&cgs->total_bytes, 0);
6006 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6007 lat += atomic64_xchg(&cgs->rx_latency, 0);
6008 rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6009 }
6010
6011 /* Before we issue another CMF_SYNC_WQE, retrieve the BW
6012 * returned from the last CMF_SYNC_WQE issued, from
6013 * cmf_last_sync_bw. This will be the target BW for
6014 * this next timer interval.
6015 */
6016 if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6017 phba->link_state != LPFC_LINK_DOWN &&
6018 test_bit(HBA_SETUP, &phba->hba_flag)) {
6019 mbpi = phba->cmf_last_sync_bw;
6020 phba->cmf_last_sync_bw = 0;
6021 extra = 0;
6022
6023 /* Calculate any extra bytes needed to account for the
6024 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6025 * calculate the adjustment needed for total to reflect
6026 * a full LPFC_CMF_INTERVAL.
6027 */
6028 if (ms && ms < LPFC_CMF_INTERVAL) {
6029 cnt = div_u64(total, ms); /* bytes per ms */
6030 cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6031 extra = cnt - total;
6032 }
6033 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6034 } else {
6035 /* For Monitor mode or link down we want mbpi
6036 * to be the full link speed
6037 */
6038 mbpi = phba->cmf_link_byte_count;
6039 extra = 0;
6040 }
6041 phba->cmf_timer_cnt++;
6042
6043 if (io_cnt) {
6044 /* Update congestion info buffer latency in us */
6045 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6046 atomic64_add(lat, &phba->cgn_latency_evt);
6047 }
6048 busy = atomic_xchg(&phba->cmf_busy, 0);
6049 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6050
6051 /* Calculate MBPI for the next timer interval */
6052 if (mbpi) {
6053 if (mbpi > phba->cmf_link_byte_count ||
6054 phba->cmf_active_mode == LPFC_CFG_MONITOR)
6055 mbpi = phba->cmf_link_byte_count;
6056
6057 /* Change max_bytes_per_interval to what the prior
6058 * CMF_SYNC_WQE cmpl indicated.
6059 */
6060 if (mbpi != phba->cmf_max_bytes_per_interval)
6061 phba->cmf_max_bytes_per_interval = mbpi;
6062 }
6063
6064 /* Save rxmonitor information for debug */
6065 if (phba->rx_monitor) {
6066 entry.total_bytes = total;
6067 entry.cmf_bytes = total + extra;
6068 entry.rcv_bytes = rcv;
6069 entry.cmf_busy = busy;
6070 entry.cmf_info = phba->cmf_active_info;
6071 if (io_cnt) {
6072 entry.avg_io_latency = div_u64(lat, io_cnt);
6073 entry.avg_io_size = div_u64(rcv, io_cnt);
6074 } else {
6075 entry.avg_io_latency = 0;
6076 entry.avg_io_size = 0;
6077 }
6078 entry.max_read_cnt = max_read;
6079 entry.io_cnt = io_cnt;
6080 entry.max_bytes_per_interval = mbpi;
6081 if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6082 entry.timer_utilization = phba->cmf_last_ts;
6083 else
6084 entry.timer_utilization = ms;
6085 entry.timer_interval = ms;
6086 phba->cmf_last_ts = 0;
6087
6088 lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6089 }
6090
6091 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6092 /* If Monitor mode, check if we are oversubscribed
6093 * against the full line rate.
6094 */
6095 if (mbpi && total > mbpi)
6096 atomic_inc(&phba->cgn_driver_evt_cnt);
6097 }
6098 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */
6099
6100 /* Since total_bytes has already been zero'ed, its okay to unblock
6101 * after max_bytes_per_interval is setup.
6102 */
6103 if (atomic_xchg(&phba->cmf_bw_wait, 0))
6104 queue_work(phba->wq, &phba->unblock_request_work);
6105
6106 /* SCSI IO is now unblocked */
6107 atomic_set(&phba->cmf_stop_io, 0);
6108
6109 skip:
6110 hrtimer_forward_now(timer,
6111 ktime_set(0, timer_interval * NSEC_PER_MSEC));
6112 return HRTIMER_RESTART;
6113 }
6114
6115 #define trunk_link_status(__idx)\
6116 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6117 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6118 "Link up" : "Link down") : "NA"
6119 /* Did port __idx reported an error */
6120 #define trunk_port_fault(__idx)\
6121 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6122 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6123
6124 static void
lpfc_update_trunk_link_status(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6125 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6126 struct lpfc_acqe_fc_la *acqe_fc)
6127 {
6128 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6129 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6130 u8 cnt = 0;
6131
6132 phba->sli4_hba.link_state.speed =
6133 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6134 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6135
6136 phba->sli4_hba.link_state.logical_speed =
6137 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6138 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6139 phba->fc_linkspeed =
6140 lpfc_async_link_speed_to_read_top(
6141 phba,
6142 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6143
6144 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6145 phba->trunk_link.link0.state =
6146 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6147 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6148 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6149 cnt++;
6150 }
6151 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6152 phba->trunk_link.link1.state =
6153 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6154 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6155 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6156 cnt++;
6157 }
6158 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6159 phba->trunk_link.link2.state =
6160 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6161 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6162 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6163 cnt++;
6164 }
6165 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6166 phba->trunk_link.link3.state =
6167 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6168 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6169 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6170 cnt++;
6171 }
6172
6173 if (cnt)
6174 phba->trunk_link.phy_lnk_speed =
6175 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6176 else
6177 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6178
6179 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6180 "2910 Async FC Trunking Event - Speed:%d\n"
6181 "\tLogical speed:%d "
6182 "port0: %s port1: %s port2: %s port3: %s\n",
6183 phba->sli4_hba.link_state.speed,
6184 phba->sli4_hba.link_state.logical_speed,
6185 trunk_link_status(0), trunk_link_status(1),
6186 trunk_link_status(2), trunk_link_status(3));
6187
6188 if (phba->cmf_active_mode != LPFC_CFG_OFF)
6189 lpfc_cmf_signal_init(phba);
6190
6191 if (port_fault)
6192 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6193 "3202 trunk error:0x%x (%s) seen on port0:%s "
6194 /*
6195 * SLI-4: We have only 0xA error codes
6196 * defined as of now. print an appropriate
6197 * message in case driver needs to be updated.
6198 */
6199 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6200 "UNDEFINED. update driver." : trunk_errmsg[err],
6201 trunk_port_fault(0), trunk_port_fault(1),
6202 trunk_port_fault(2), trunk_port_fault(3));
6203 }
6204
6205
6206 /**
6207 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6208 * @phba: pointer to lpfc hba data structure.
6209 * @acqe_fc: pointer to the async fc completion queue entry.
6210 *
6211 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6212 * that the event was received and then issue a read_topology mailbox command so
6213 * that the rest of the driver will treat it the same as SLI3.
6214 **/
6215 static void
lpfc_sli4_async_fc_evt(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6216 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6217 {
6218 LPFC_MBOXQ_t *pmb;
6219 MAILBOX_t *mb;
6220 struct lpfc_mbx_read_top *la;
6221 char *log_level;
6222 int rc;
6223
6224 if (bf_get(lpfc_trailer_type, acqe_fc) !=
6225 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6226 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6227 "2895 Non FC link Event detected.(%d)\n",
6228 bf_get(lpfc_trailer_type, acqe_fc));
6229 return;
6230 }
6231
6232 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6233 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6234 lpfc_update_trunk_link_status(phba, acqe_fc);
6235 return;
6236 }
6237
6238 /* Keep the link status for extra SLI4 state machine reference */
6239 phba->sli4_hba.link_state.speed =
6240 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6241 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6242 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6243 phba->sli4_hba.link_state.topology =
6244 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6245 phba->sli4_hba.link_state.status =
6246 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6247 phba->sli4_hba.link_state.type =
6248 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6249 phba->sli4_hba.link_state.number =
6250 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6251 phba->sli4_hba.link_state.fault =
6252 bf_get(lpfc_acqe_link_fault, acqe_fc);
6253 phba->sli4_hba.link_state.link_status =
6254 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc);
6255
6256 /*
6257 * Only select attention types need logical speed modification to what
6258 * was previously set.
6259 */
6260 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6261 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6262 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6263 LPFC_FC_LA_TYPE_LINK_DOWN)
6264 phba->sli4_hba.link_state.logical_speed = 0;
6265 else if (!phba->sli4_hba.conf_trunk)
6266 phba->sli4_hba.link_state.logical_speed =
6267 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6268 }
6269
6270 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6271 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
6272 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6273 "%dMbps Fault:x%x Link Status:x%x\n",
6274 phba->sli4_hba.link_state.speed,
6275 phba->sli4_hba.link_state.topology,
6276 phba->sli4_hba.link_state.status,
6277 phba->sli4_hba.link_state.type,
6278 phba->sli4_hba.link_state.number,
6279 phba->sli4_hba.link_state.logical_speed,
6280 phba->sli4_hba.link_state.fault,
6281 phba->sli4_hba.link_state.link_status);
6282
6283 /*
6284 * The following attention types are informational only, providing
6285 * further details about link status. Overwrite the value of
6286 * link_state.status appropriately. No further action is required.
6287 */
6288 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6289 switch (phba->sli4_hba.link_state.status) {
6290 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
6291 log_level = KERN_WARNING;
6292 phba->sli4_hba.link_state.status =
6293 LPFC_FC_LA_TYPE_LINK_DOWN;
6294 break;
6295 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
6296 /*
6297 * During bb credit recovery establishment, receiving
6298 * this attention type is normal. Link Up attention
6299 * type is expected to occur before this informational
6300 * attention type so keep the Link Up status.
6301 */
6302 log_level = KERN_INFO;
6303 phba->sli4_hba.link_state.status =
6304 LPFC_FC_LA_TYPE_LINK_UP;
6305 break;
6306 default:
6307 log_level = KERN_INFO;
6308 break;
6309 }
6310 lpfc_log_msg(phba, log_level, LOG_SLI,
6311 "2992 Async FC event - Informational Link "
6312 "Attention Type x%x\n",
6313 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc));
6314 return;
6315 }
6316
6317 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6318 if (!pmb) {
6319 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6320 "2897 The mboxq allocation failed\n");
6321 return;
6322 }
6323 rc = lpfc_mbox_rsrc_prep(phba, pmb);
6324 if (rc) {
6325 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6326 "2898 The mboxq prep failed\n");
6327 goto out_free_pmb;
6328 }
6329
6330 /* Cleanup any outstanding ELS commands */
6331 lpfc_els_flush_all_cmd(phba);
6332
6333 /* Block ELS IOCBs until we have done process link event */
6334 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6335
6336 /* Update link event statistics */
6337 phba->sli.slistat.link_event++;
6338
6339 /* Create lpfc_handle_latt mailbox command from link ACQE */
6340 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
6341 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6342 pmb->vport = phba->pport;
6343
6344 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6345 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6346
6347 switch (phba->sli4_hba.link_state.status) {
6348 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6349 phba->link_flag |= LS_MDS_LINK_DOWN;
6350 break;
6351 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6352 phba->link_flag |= LS_MDS_LOOPBACK;
6353 break;
6354 default:
6355 break;
6356 }
6357
6358 /* Initialize completion status */
6359 mb = &pmb->u.mb;
6360 mb->mbxStatus = MBX_SUCCESS;
6361
6362 /* Parse port fault information field */
6363 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6364
6365 /* Parse and translate link attention fields */
6366 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6367 la->eventTag = acqe_fc->event_tag;
6368
6369 if (phba->sli4_hba.link_state.status ==
6370 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6371 bf_set(lpfc_mbx_read_top_att_type, la,
6372 LPFC_FC_LA_TYPE_UNEXP_WWPN);
6373 } else {
6374 bf_set(lpfc_mbx_read_top_att_type, la,
6375 LPFC_FC_LA_TYPE_LINK_DOWN);
6376 }
6377 /* Invoke the mailbox command callback function */
6378 lpfc_mbx_cmpl_read_topology(phba, pmb);
6379
6380 return;
6381 }
6382
6383 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6384 if (rc == MBX_NOT_FINISHED)
6385 goto out_free_pmb;
6386 return;
6387
6388 out_free_pmb:
6389 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6390 }
6391
6392 /**
6393 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6394 * @phba: pointer to lpfc hba data structure.
6395 * @acqe_sli: pointer to the async SLI completion queue entry.
6396 *
6397 * This routine is to handle the SLI4 asynchronous SLI events.
6398 **/
6399 static void
lpfc_sli4_async_sli_evt(struct lpfc_hba * phba,struct lpfc_acqe_sli * acqe_sli)6400 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6401 {
6402 char port_name;
6403 char message[128];
6404 uint8_t status;
6405 uint8_t evt_type;
6406 uint8_t operational = 0;
6407 struct temp_event temp_event_data;
6408 struct lpfc_acqe_misconfigured_event *misconfigured;
6409 struct lpfc_acqe_cgn_signal *cgn_signal;
6410 struct Scsi_Host *shost;
6411 struct lpfc_vport **vports;
6412 int rc, i, cnt;
6413
6414 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6415
6416 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6417 "2901 Async SLI event - Type:%d, Event Data: x%08x "
6418 "x%08x x%08x x%08x\n", evt_type,
6419 acqe_sli->event_data1, acqe_sli->event_data2,
6420 acqe_sli->event_data3, acqe_sli->trailer);
6421
6422 port_name = phba->Port[0];
6423 if (port_name == 0x00)
6424 port_name = '?'; /* get port name is empty */
6425
6426 switch (evt_type) {
6427 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6428 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6429 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6430 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6431
6432 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6433 "3190 Over Temperature:%d Celsius- Port Name %c\n",
6434 acqe_sli->event_data1, port_name);
6435
6436 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6437 shost = lpfc_shost_from_vport(phba->pport);
6438 fc_host_post_vendor_event(shost, fc_get_event_number(),
6439 sizeof(temp_event_data),
6440 (char *)&temp_event_data,
6441 SCSI_NL_VID_TYPE_PCI
6442 | PCI_VENDOR_ID_EMULEX);
6443 break;
6444 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6445 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6446 temp_event_data.event_code = LPFC_NORMAL_TEMP;
6447 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6448
6449 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6450 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
6451 acqe_sli->event_data1, port_name);
6452
6453 shost = lpfc_shost_from_vport(phba->pport);
6454 fc_host_post_vendor_event(shost, fc_get_event_number(),
6455 sizeof(temp_event_data),
6456 (char *)&temp_event_data,
6457 SCSI_NL_VID_TYPE_PCI
6458 | PCI_VENDOR_ID_EMULEX);
6459 break;
6460 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6461 misconfigured = (struct lpfc_acqe_misconfigured_event *)
6462 &acqe_sli->event_data1;
6463
6464 /* fetch the status for this port */
6465 switch (phba->sli4_hba.lnk_info.lnk_no) {
6466 case LPFC_LINK_NUMBER_0:
6467 status = bf_get(lpfc_sli_misconfigured_port0_state,
6468 &misconfigured->theEvent);
6469 operational = bf_get(lpfc_sli_misconfigured_port0_op,
6470 &misconfigured->theEvent);
6471 break;
6472 case LPFC_LINK_NUMBER_1:
6473 status = bf_get(lpfc_sli_misconfigured_port1_state,
6474 &misconfigured->theEvent);
6475 operational = bf_get(lpfc_sli_misconfigured_port1_op,
6476 &misconfigured->theEvent);
6477 break;
6478 case LPFC_LINK_NUMBER_2:
6479 status = bf_get(lpfc_sli_misconfigured_port2_state,
6480 &misconfigured->theEvent);
6481 operational = bf_get(lpfc_sli_misconfigured_port2_op,
6482 &misconfigured->theEvent);
6483 break;
6484 case LPFC_LINK_NUMBER_3:
6485 status = bf_get(lpfc_sli_misconfigured_port3_state,
6486 &misconfigured->theEvent);
6487 operational = bf_get(lpfc_sli_misconfigured_port3_op,
6488 &misconfigured->theEvent);
6489 break;
6490 default:
6491 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6492 "3296 "
6493 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6494 "event: Invalid link %d",
6495 phba->sli4_hba.lnk_info.lnk_no);
6496 return;
6497 }
6498
6499 /* Skip if optic state unchanged */
6500 if (phba->sli4_hba.lnk_info.optic_state == status)
6501 return;
6502
6503 switch (status) {
6504 case LPFC_SLI_EVENT_STATUS_VALID:
6505 sprintf(message, "Physical Link is functional");
6506 break;
6507 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6508 sprintf(message, "Optics faulted/incorrectly "
6509 "installed/not installed - Reseat optics, "
6510 "if issue not resolved, replace.");
6511 break;
6512 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6513 sprintf(message,
6514 "Optics of two types installed - Remove one "
6515 "optic or install matching pair of optics.");
6516 break;
6517 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6518 sprintf(message, "Incompatible optics - Replace with "
6519 "compatible optics for card to function.");
6520 break;
6521 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6522 sprintf(message, "Unqualified optics - Replace with "
6523 "Avago optics for Warranty and Technical "
6524 "Support - Link is%s operational",
6525 (operational) ? " not" : "");
6526 break;
6527 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6528 sprintf(message, "Uncertified optics - Replace with "
6529 "Avago-certified optics to enable link "
6530 "operation - Link is%s operational",
6531 (operational) ? " not" : "");
6532 break;
6533 default:
6534 /* firmware is reporting a status we don't know about */
6535 sprintf(message, "Unknown event status x%02x", status);
6536 break;
6537 }
6538
6539 /* Issue READ_CONFIG mbox command to refresh supported speeds */
6540 rc = lpfc_sli4_read_config(phba);
6541 if (rc) {
6542 phba->lmt = 0;
6543 lpfc_printf_log(phba, KERN_ERR,
6544 LOG_TRACE_EVENT,
6545 "3194 Unable to retrieve supported "
6546 "speeds, rc = 0x%x\n", rc);
6547 }
6548 rc = lpfc_sli4_refresh_params(phba);
6549 if (rc) {
6550 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6551 "3174 Unable to update pls support, "
6552 "rc x%x\n", rc);
6553 }
6554 vports = lpfc_create_vport_work_array(phba);
6555 if (vports != NULL) {
6556 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6557 i++) {
6558 shost = lpfc_shost_from_vport(vports[i]);
6559 lpfc_host_supported_speeds_set(shost);
6560 }
6561 }
6562 lpfc_destroy_vport_work_array(phba, vports);
6563
6564 phba->sli4_hba.lnk_info.optic_state = status;
6565 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6566 "3176 Port Name %c %s\n", port_name, message);
6567 break;
6568 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6569 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6570 "3192 Remote DPort Test Initiated - "
6571 "Event Data1:x%08x Event Data2: x%08x\n",
6572 acqe_sli->event_data1, acqe_sli->event_data2);
6573 break;
6574 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6575 /* Call FW to obtain active parms */
6576 lpfc_sli4_cgn_parm_chg_evt(phba);
6577 break;
6578 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6579 /* Misconfigured WWN. Reports that the SLI Port is configured
6580 * to use FA-WWN, but the attached device doesn’t support it.
6581 * Event Data1 - N.A, Event Data2 - N.A
6582 * This event only happens on the physical port.
6583 */
6584 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6585 "2699 Misconfigured FA-PWWN - Attached device "
6586 "does not support FA-PWWN\n");
6587 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6588 memset(phba->pport->fc_portname.u.wwn, 0,
6589 sizeof(struct lpfc_name));
6590 break;
6591 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6592 /* EEPROM failure. No driver action is required */
6593 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6594 "2518 EEPROM failure - "
6595 "Event Data1: x%08x Event Data2: x%08x\n",
6596 acqe_sli->event_data1, acqe_sli->event_data2);
6597 break;
6598 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6599 if (phba->cmf_active_mode == LPFC_CFG_OFF)
6600 break;
6601 cgn_signal = (struct lpfc_acqe_cgn_signal *)
6602 &acqe_sli->event_data1;
6603 phba->cgn_acqe_cnt++;
6604
6605 cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6606 atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6607 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6608
6609 /* no threshold for CMF, even 1 signal will trigger an event */
6610
6611 /* Alarm overrides warning, so check that first */
6612 if (cgn_signal->alarm_cnt) {
6613 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6614 /* Keep track of alarm cnt for CMF_SYNC_WQE */
6615 atomic_add(cgn_signal->alarm_cnt,
6616 &phba->cgn_sync_alarm_cnt);
6617 }
6618 } else if (cnt) {
6619 /* signal action needs to be taken */
6620 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6621 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6622 /* Keep track of warning cnt for CMF_SYNC_WQE */
6623 atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6624 }
6625 }
6626 break;
6627 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6628 /* May be accompanied by a temperature event */
6629 lpfc_printf_log(phba, KERN_INFO,
6630 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6631 "2902 Remote Degrade Signaling: x%08x x%08x "
6632 "x%08x\n",
6633 acqe_sli->event_data1, acqe_sli->event_data2,
6634 acqe_sli->event_data3);
6635 break;
6636 case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS:
6637 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
6638 "2905 Reset CM statistics\n");
6639 lpfc_sli4_async_cmstat_evt(phba);
6640 break;
6641 default:
6642 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6643 "3193 Unrecognized SLI event, type: 0x%x",
6644 evt_type);
6645 break;
6646 }
6647 }
6648
6649 /**
6650 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6651 * @vport: pointer to vport data structure.
6652 *
6653 * This routine is to perform Clear Virtual Link (CVL) on a vport in
6654 * response to a CVL event.
6655 *
6656 * Return the pointer to the ndlp with the vport if successful, otherwise
6657 * return NULL.
6658 **/
6659 static struct lpfc_nodelist *
lpfc_sli4_perform_vport_cvl(struct lpfc_vport * vport)6660 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6661 {
6662 struct lpfc_nodelist *ndlp;
6663 struct Scsi_Host *shost;
6664 struct lpfc_hba *phba;
6665
6666 if (!vport)
6667 return NULL;
6668 phba = vport->phba;
6669 if (!phba)
6670 return NULL;
6671 ndlp = lpfc_findnode_did(vport, Fabric_DID);
6672 if (!ndlp) {
6673 /* Cannot find existing Fabric ndlp, so allocate a new one */
6674 ndlp = lpfc_nlp_init(vport, Fabric_DID);
6675 if (!ndlp)
6676 return NULL;
6677 /* Set the node type */
6678 ndlp->nlp_type |= NLP_FABRIC;
6679 /* Put ndlp onto node list */
6680 lpfc_enqueue_node(vport, ndlp);
6681 }
6682 if ((phba->pport->port_state < LPFC_FLOGI) &&
6683 (phba->pport->port_state != LPFC_VPORT_FAILED))
6684 return NULL;
6685 /* If virtual link is not yet instantiated ignore CVL */
6686 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6687 && (vport->port_state != LPFC_VPORT_FAILED))
6688 return NULL;
6689 shost = lpfc_shost_from_vport(vport);
6690 if (!shost)
6691 return NULL;
6692 lpfc_linkdown_port(vport);
6693 lpfc_cleanup_pending_mbox(vport);
6694 set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag);
6695
6696 return ndlp;
6697 }
6698
6699 /**
6700 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6701 * @phba: pointer to lpfc hba data structure.
6702 *
6703 * This routine is to perform Clear Virtual Link (CVL) on all vports in
6704 * response to a FCF dead event.
6705 **/
6706 static void
lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba * phba)6707 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6708 {
6709 struct lpfc_vport **vports;
6710 int i;
6711
6712 vports = lpfc_create_vport_work_array(phba);
6713 if (vports)
6714 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6715 lpfc_sli4_perform_vport_cvl(vports[i]);
6716 lpfc_destroy_vport_work_array(phba, vports);
6717 }
6718
6719 /**
6720 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6721 * @phba: pointer to lpfc hba data structure.
6722 * @acqe_fip: pointer to the async fcoe completion queue entry.
6723 *
6724 * This routine is to handle the SLI4 asynchronous fcoe event.
6725 **/
6726 static void
lpfc_sli4_async_fip_evt(struct lpfc_hba * phba,struct lpfc_acqe_fip * acqe_fip)6727 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6728 struct lpfc_acqe_fip *acqe_fip)
6729 {
6730 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6731 int rc;
6732 struct lpfc_vport *vport;
6733 struct lpfc_nodelist *ndlp;
6734 int active_vlink_present;
6735 struct lpfc_vport **vports;
6736 int i;
6737
6738 phba->fc_eventTag = acqe_fip->event_tag;
6739 phba->fcoe_eventtag = acqe_fip->event_tag;
6740 switch (event_type) {
6741 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6742 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6743 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6744 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6745 "2546 New FCF event, evt_tag:x%x, "
6746 "index:x%x\n",
6747 acqe_fip->event_tag,
6748 acqe_fip->index);
6749 else
6750 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6751 LOG_DISCOVERY,
6752 "2788 FCF param modified event, "
6753 "evt_tag:x%x, index:x%x\n",
6754 acqe_fip->event_tag,
6755 acqe_fip->index);
6756 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6757 /*
6758 * During period of FCF discovery, read the FCF
6759 * table record indexed by the event to update
6760 * FCF roundrobin failover eligible FCF bmask.
6761 */
6762 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6763 LOG_DISCOVERY,
6764 "2779 Read FCF (x%x) for updating "
6765 "roundrobin FCF failover bmask\n",
6766 acqe_fip->index);
6767 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6768 }
6769
6770 /* If the FCF discovery is in progress, do nothing. */
6771 if (test_bit(FCF_TS_INPROG, &phba->hba_flag))
6772 break;
6773 spin_lock_irq(&phba->hbalock);
6774 /* If fast FCF failover rescan event is pending, do nothing */
6775 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6776 spin_unlock_irq(&phba->hbalock);
6777 break;
6778 }
6779
6780 /* If the FCF has been in discovered state, do nothing. */
6781 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6782 spin_unlock_irq(&phba->hbalock);
6783 break;
6784 }
6785 spin_unlock_irq(&phba->hbalock);
6786
6787 /* Otherwise, scan the entire FCF table and re-discover SAN */
6788 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6789 "2770 Start FCF table scan per async FCF "
6790 "event, evt_tag:x%x, index:x%x\n",
6791 acqe_fip->event_tag, acqe_fip->index);
6792 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6793 LPFC_FCOE_FCF_GET_FIRST);
6794 if (rc)
6795 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6796 "2547 Issue FCF scan read FCF mailbox "
6797 "command failed (x%x)\n", rc);
6798 break;
6799
6800 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6801 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6802 "2548 FCF Table full count 0x%x tag 0x%x\n",
6803 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6804 acqe_fip->event_tag);
6805 break;
6806
6807 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6808 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6809 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6810 "2549 FCF (x%x) disconnected from network, "
6811 "tag:x%x\n", acqe_fip->index,
6812 acqe_fip->event_tag);
6813 /*
6814 * If we are in the middle of FCF failover process, clear
6815 * the corresponding FCF bit in the roundrobin bitmap.
6816 */
6817 spin_lock_irq(&phba->hbalock);
6818 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6819 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6820 spin_unlock_irq(&phba->hbalock);
6821 /* Update FLOGI FCF failover eligible FCF bmask */
6822 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6823 break;
6824 }
6825 spin_unlock_irq(&phba->hbalock);
6826
6827 /* If the event is not for currently used fcf do nothing */
6828 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6829 break;
6830
6831 /*
6832 * Otherwise, request the port to rediscover the entire FCF
6833 * table for a fast recovery from case that the current FCF
6834 * is no longer valid as we are not in the middle of FCF
6835 * failover process already.
6836 */
6837 spin_lock_irq(&phba->hbalock);
6838 /* Mark the fast failover process in progress */
6839 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6840 spin_unlock_irq(&phba->hbalock);
6841
6842 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6843 "2771 Start FCF fast failover process due to "
6844 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6845 "\n", acqe_fip->event_tag, acqe_fip->index);
6846 rc = lpfc_sli4_redisc_fcf_table(phba);
6847 if (rc) {
6848 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6849 LOG_TRACE_EVENT,
6850 "2772 Issue FCF rediscover mailbox "
6851 "command failed, fail through to FCF "
6852 "dead event\n");
6853 spin_lock_irq(&phba->hbalock);
6854 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6855 spin_unlock_irq(&phba->hbalock);
6856 /*
6857 * Last resort will fail over by treating this
6858 * as a link down to FCF registration.
6859 */
6860 lpfc_sli4_fcf_dead_failthrough(phba);
6861 } else {
6862 /* Reset FCF roundrobin bmask for new discovery */
6863 lpfc_sli4_clear_fcf_rr_bmask(phba);
6864 /*
6865 * Handling fast FCF failover to a DEAD FCF event is
6866 * considered equalivant to receiving CVL to all vports.
6867 */
6868 lpfc_sli4_perform_all_vport_cvl(phba);
6869 }
6870 break;
6871 case LPFC_FIP_EVENT_TYPE_CVL:
6872 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6873 lpfc_printf_log(phba, KERN_ERR,
6874 LOG_TRACE_EVENT,
6875 "2718 Clear Virtual Link Received for VPI 0x%x"
6876 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6877
6878 vport = lpfc_find_vport_by_vpid(phba,
6879 acqe_fip->index);
6880 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6881 if (!ndlp)
6882 break;
6883 active_vlink_present = 0;
6884
6885 vports = lpfc_create_vport_work_array(phba);
6886 if (vports) {
6887 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6888 i++) {
6889 if (!test_bit(FC_VPORT_CVL_RCVD,
6890 &vports[i]->fc_flag) &&
6891 vports[i]->port_state > LPFC_FDISC) {
6892 active_vlink_present = 1;
6893 break;
6894 }
6895 }
6896 lpfc_destroy_vport_work_array(phba, vports);
6897 }
6898
6899 /*
6900 * Don't re-instantiate if vport is marked for deletion.
6901 * If we are here first then vport_delete is going to wait
6902 * for discovery to complete.
6903 */
6904 if (!test_bit(FC_UNLOADING, &vport->load_flag) &&
6905 active_vlink_present) {
6906 /*
6907 * If there are other active VLinks present,
6908 * re-instantiate the Vlink using FDISC.
6909 */
6910 mod_timer(&ndlp->nlp_delayfunc,
6911 jiffies + msecs_to_jiffies(1000));
6912 set_bit(NLP_DELAY_TMO, &ndlp->nlp_flag);
6913 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6914 vport->port_state = LPFC_FDISC;
6915 } else {
6916 /*
6917 * Otherwise, we request port to rediscover
6918 * the entire FCF table for a fast recovery
6919 * from possible case that the current FCF
6920 * is no longer valid if we are not already
6921 * in the FCF failover process.
6922 */
6923 spin_lock_irq(&phba->hbalock);
6924 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6925 spin_unlock_irq(&phba->hbalock);
6926 break;
6927 }
6928 /* Mark the fast failover process in progress */
6929 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6930 spin_unlock_irq(&phba->hbalock);
6931 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6932 LOG_DISCOVERY,
6933 "2773 Start FCF failover per CVL, "
6934 "evt_tag:x%x\n", acqe_fip->event_tag);
6935 rc = lpfc_sli4_redisc_fcf_table(phba);
6936 if (rc) {
6937 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6938 LOG_TRACE_EVENT,
6939 "2774 Issue FCF rediscover "
6940 "mailbox command failed, "
6941 "through to CVL event\n");
6942 spin_lock_irq(&phba->hbalock);
6943 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6944 spin_unlock_irq(&phba->hbalock);
6945 /*
6946 * Last resort will be re-try on the
6947 * the current registered FCF entry.
6948 */
6949 lpfc_retry_pport_discovery(phba);
6950 } else
6951 /*
6952 * Reset FCF roundrobin bmask for new
6953 * discovery.
6954 */
6955 lpfc_sli4_clear_fcf_rr_bmask(phba);
6956 }
6957 break;
6958 default:
6959 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6960 "0288 Unknown FCoE event type 0x%x event tag "
6961 "0x%x\n", event_type, acqe_fip->event_tag);
6962 break;
6963 }
6964 }
6965
6966 /**
6967 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6968 * @phba: pointer to lpfc hba data structure.
6969 * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6970 *
6971 * This routine is to handle the SLI4 asynchronous dcbx event.
6972 **/
6973 static void
lpfc_sli4_async_dcbx_evt(struct lpfc_hba * phba,struct lpfc_acqe_dcbx * acqe_dcbx)6974 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6975 struct lpfc_acqe_dcbx *acqe_dcbx)
6976 {
6977 phba->fc_eventTag = acqe_dcbx->event_tag;
6978 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6979 "0290 The SLI4 DCBX asynchronous event is not "
6980 "handled yet\n");
6981 }
6982
6983 /**
6984 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
6985 * @phba: pointer to lpfc hba data structure.
6986 * @acqe_grp5: pointer to the async grp5 completion queue entry.
6987 *
6988 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
6989 * is an asynchronous notified of a logical link speed change. The Port
6990 * reports the logical link speed in units of 10Mbps.
6991 **/
6992 static void
lpfc_sli4_async_grp5_evt(struct lpfc_hba * phba,struct lpfc_acqe_grp5 * acqe_grp5)6993 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
6994 struct lpfc_acqe_grp5 *acqe_grp5)
6995 {
6996 uint16_t prev_ll_spd;
6997
6998 phba->fc_eventTag = acqe_grp5->event_tag;
6999 phba->fcoe_eventtag = acqe_grp5->event_tag;
7000 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7001 phba->sli4_hba.link_state.logical_speed =
7002 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7003 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7004 "2789 GRP5 Async Event: Updating logical link speed "
7005 "from %dMbps to %dMbps\n", prev_ll_spd,
7006 phba->sli4_hba.link_state.logical_speed);
7007 }
7008
7009 /**
7010 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7011 * @phba: pointer to lpfc hba data structure.
7012 *
7013 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7014 * is an asynchronous notification of a request to reset CM stats.
7015 **/
7016 static void
lpfc_sli4_async_cmstat_evt(struct lpfc_hba * phba)7017 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7018 {
7019 if (!phba->cgn_i)
7020 return;
7021 lpfc_init_congestion_stat(phba);
7022 }
7023
7024 /**
7025 * lpfc_cgn_params_val - Validate FW congestion parameters.
7026 * @phba: pointer to lpfc hba data structure.
7027 * @p_cfg_param: pointer to FW provided congestion parameters.
7028 *
7029 * This routine validates the congestion parameters passed
7030 * by the FW to the driver via an ACQE event.
7031 **/
7032 static void
lpfc_cgn_params_val(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cfg_param)7033 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7034 {
7035 spin_lock_irq(&phba->hbalock);
7036
7037 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7038 LPFC_CFG_MONITOR)) {
7039 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7040 "6225 CMF mode param out of range: %d\n",
7041 p_cfg_param->cgn_param_mode);
7042 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7043 }
7044
7045 spin_unlock_irq(&phba->hbalock);
7046 }
7047
7048 static const char * const lpfc_cmf_mode_to_str[] = {
7049 "OFF",
7050 "MANAGED",
7051 "MONITOR",
7052 };
7053
7054 /**
7055 * lpfc_cgn_params_parse - Process a FW cong parm change event
7056 * @phba: pointer to lpfc hba data structure.
7057 * @p_cgn_param: pointer to a data buffer with the FW cong params.
7058 * @len: the size of pdata in bytes.
7059 *
7060 * This routine validates the congestion management buffer signature
7061 * from the FW, validates the contents and makes corrections for
7062 * valid, in-range values. If the signature magic is correct and
7063 * after parameter validation, the contents are copied to the driver's
7064 * @phba structure. If the magic is incorrect, an error message is
7065 * logged.
7066 **/
7067 static void
lpfc_cgn_params_parse(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cgn_param,uint32_t len)7068 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7069 struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7070 {
7071 struct lpfc_cgn_info *cp;
7072 uint32_t crc, oldmode;
7073 char acr_string[4] = {0};
7074
7075 /* Make sure the FW has encoded the correct magic number to
7076 * validate the congestion parameter in FW memory.
7077 */
7078 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7079 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7080 "4668 FW cgn parm buffer data: "
7081 "magic 0x%x version %d mode %d "
7082 "level0 %d level1 %d "
7083 "level2 %d byte13 %d "
7084 "byte14 %d byte15 %d "
7085 "byte11 %d byte12 %d activeMode %d\n",
7086 p_cgn_param->cgn_param_magic,
7087 p_cgn_param->cgn_param_version,
7088 p_cgn_param->cgn_param_mode,
7089 p_cgn_param->cgn_param_level0,
7090 p_cgn_param->cgn_param_level1,
7091 p_cgn_param->cgn_param_level2,
7092 p_cgn_param->byte13,
7093 p_cgn_param->byte14,
7094 p_cgn_param->byte15,
7095 p_cgn_param->byte11,
7096 p_cgn_param->byte12,
7097 phba->cmf_active_mode);
7098
7099 oldmode = phba->cmf_active_mode;
7100
7101 /* Any parameters out of range are corrected to defaults
7102 * by this routine. No need to fail.
7103 */
7104 lpfc_cgn_params_val(phba, p_cgn_param);
7105
7106 /* Parameters are verified, move them into driver storage */
7107 spin_lock_irq(&phba->hbalock);
7108 memcpy(&phba->cgn_p, p_cgn_param,
7109 sizeof(struct lpfc_cgn_param));
7110
7111 /* Update parameters in congestion info buffer now */
7112 if (phba->cgn_i) {
7113 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7114 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7115 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7116 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7117 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7118 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7119 LPFC_CGN_CRC32_SEED);
7120 cp->cgn_info_crc = cpu_to_le32(crc);
7121 }
7122 spin_unlock_irq(&phba->hbalock);
7123
7124 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7125
7126 switch (oldmode) {
7127 case LPFC_CFG_OFF:
7128 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7129 /* Turning CMF on */
7130 lpfc_cmf_start(phba);
7131
7132 if (phba->link_state >= LPFC_LINK_UP) {
7133 phba->cgn_reg_fpin =
7134 phba->cgn_init_reg_fpin;
7135 phba->cgn_reg_signal =
7136 phba->cgn_init_reg_signal;
7137 lpfc_issue_els_edc(phba->pport, 0);
7138 }
7139 }
7140 break;
7141 case LPFC_CFG_MANAGED:
7142 switch (phba->cgn_p.cgn_param_mode) {
7143 case LPFC_CFG_OFF:
7144 /* Turning CMF off */
7145 lpfc_cmf_stop(phba);
7146 if (phba->link_state >= LPFC_LINK_UP)
7147 lpfc_issue_els_edc(phba->pport, 0);
7148 break;
7149 case LPFC_CFG_MONITOR:
7150 phba->cmf_max_bytes_per_interval =
7151 phba->cmf_link_byte_count;
7152
7153 /* Resume blocked IO - unblock on workqueue */
7154 queue_work(phba->wq,
7155 &phba->unblock_request_work);
7156 break;
7157 }
7158 break;
7159 case LPFC_CFG_MONITOR:
7160 switch (phba->cgn_p.cgn_param_mode) {
7161 case LPFC_CFG_OFF:
7162 /* Turning CMF off */
7163 lpfc_cmf_stop(phba);
7164 if (phba->link_state >= LPFC_LINK_UP)
7165 lpfc_issue_els_edc(phba->pport, 0);
7166 break;
7167 case LPFC_CFG_MANAGED:
7168 lpfc_cmf_signal_init(phba);
7169 break;
7170 }
7171 break;
7172 }
7173 if (oldmode != LPFC_CFG_OFF ||
7174 oldmode != phba->cgn_p.cgn_param_mode) {
7175 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7176 scnprintf(acr_string, sizeof(acr_string), "%u",
7177 phba->cgn_p.cgn_param_level0);
7178 else
7179 scnprintf(acr_string, sizeof(acr_string), "NA");
7180
7181 dev_info(&phba->pcidev->dev, "%d: "
7182 "4663 CMF: Mode %s acr %s\n",
7183 phba->brd_no,
7184 lpfc_cmf_mode_to_str
7185 [phba->cgn_p.cgn_param_mode],
7186 acr_string);
7187 }
7188 } else {
7189 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7190 "4669 FW cgn parm buf wrong magic 0x%x "
7191 "version %d\n", p_cgn_param->cgn_param_magic,
7192 p_cgn_param->cgn_param_version);
7193 }
7194 }
7195
7196 /**
7197 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7198 * @phba: pointer to lpfc hba data structure.
7199 *
7200 * This routine issues a read_object mailbox command to
7201 * get the congestion management parameters from the FW
7202 * parses it and updates the driver maintained values.
7203 *
7204 * Returns
7205 * 0 if the object was empty
7206 * -Eval if an error was encountered
7207 * Count if bytes were read from object
7208 **/
7209 int
lpfc_sli4_cgn_params_read(struct lpfc_hba * phba)7210 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7211 {
7212 int ret = 0;
7213 struct lpfc_cgn_param *p_cgn_param = NULL;
7214 u32 *pdata = NULL;
7215 u32 len = 0;
7216
7217 /* Find out if the FW has a new set of congestion parameters. */
7218 len = sizeof(struct lpfc_cgn_param);
7219 pdata = kzalloc(len, GFP_KERNEL);
7220 if (!pdata)
7221 return -ENOMEM;
7222 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7223 pdata, len);
7224
7225 /* 0 means no data. A negative means error. A positive means
7226 * bytes were copied.
7227 */
7228 if (!ret) {
7229 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7230 "4670 CGN RD OBJ returns no data\n");
7231 goto rd_obj_err;
7232 } else if (ret < 0) {
7233 /* Some error. Just exit and return it to the caller.*/
7234 goto rd_obj_err;
7235 }
7236
7237 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7238 "6234 READ CGN PARAMS Successful %d\n", len);
7239
7240 /* Parse data pointer over len and update the phba congestion
7241 * parameters with values passed back. The receive rate values
7242 * may have been altered in FW, but take no action here.
7243 */
7244 p_cgn_param = (struct lpfc_cgn_param *)pdata;
7245 lpfc_cgn_params_parse(phba, p_cgn_param, len);
7246
7247 rd_obj_err:
7248 kfree(pdata);
7249 return ret;
7250 }
7251
7252 /**
7253 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7254 * @phba: pointer to lpfc hba data structure.
7255 *
7256 * The FW generated Async ACQE SLI event calls this routine when
7257 * the event type is an SLI Internal Port Event and the Event Code
7258 * indicates a change to the FW maintained congestion parameters.
7259 *
7260 * This routine executes a Read_Object mailbox call to obtain the
7261 * current congestion parameters maintained in FW and corrects
7262 * the driver's active congestion parameters.
7263 *
7264 * The acqe event is not passed because there is no further data
7265 * required.
7266 *
7267 * Returns nonzero error if event processing encountered an error.
7268 * Zero otherwise for success.
7269 **/
7270 static int
lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba * phba)7271 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7272 {
7273 int ret = 0;
7274
7275 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7276 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7277 "4664 Cgn Evt when E2E off. Drop event\n");
7278 return -EACCES;
7279 }
7280
7281 /* If the event is claiming an empty object, it's ok. A write
7282 * could have cleared it. Only error is a negative return
7283 * status.
7284 */
7285 ret = lpfc_sli4_cgn_params_read(phba);
7286 if (ret < 0) {
7287 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7288 "4667 Error reading Cgn Params (%d)\n",
7289 ret);
7290 } else if (!ret) {
7291 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7292 "4673 CGN Event empty object.\n");
7293 }
7294 return ret;
7295 }
7296
7297 /**
7298 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7299 * @phba: pointer to lpfc hba data structure.
7300 *
7301 * This routine is invoked by the worker thread to process all the pending
7302 * SLI4 asynchronous events.
7303 **/
lpfc_sli4_async_event_proc(struct lpfc_hba * phba)7304 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7305 {
7306 struct lpfc_cq_event *cq_event;
7307 unsigned long iflags;
7308
7309 /* First, declare the async event has been handled */
7310 clear_bit(ASYNC_EVENT, &phba->hba_flag);
7311
7312 /* Now, handle all the async events */
7313 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7314 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7315 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7316 cq_event, struct lpfc_cq_event, list);
7317 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7318 iflags);
7319
7320 /* Process the asynchronous event */
7321 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7322 case LPFC_TRAILER_CODE_LINK:
7323 lpfc_sli4_async_link_evt(phba,
7324 &cq_event->cqe.acqe_link);
7325 break;
7326 case LPFC_TRAILER_CODE_FCOE:
7327 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7328 break;
7329 case LPFC_TRAILER_CODE_DCBX:
7330 lpfc_sli4_async_dcbx_evt(phba,
7331 &cq_event->cqe.acqe_dcbx);
7332 break;
7333 case LPFC_TRAILER_CODE_GRP5:
7334 lpfc_sli4_async_grp5_evt(phba,
7335 &cq_event->cqe.acqe_grp5);
7336 break;
7337 case LPFC_TRAILER_CODE_FC:
7338 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7339 break;
7340 case LPFC_TRAILER_CODE_SLI:
7341 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7342 break;
7343 default:
7344 lpfc_printf_log(phba, KERN_ERR,
7345 LOG_TRACE_EVENT,
7346 "1804 Invalid asynchronous event code: "
7347 "x%x\n", bf_get(lpfc_trailer_code,
7348 &cq_event->cqe.mcqe_cmpl));
7349 break;
7350 }
7351
7352 /* Free the completion event processed to the free pool */
7353 lpfc_sli4_cq_event_release(phba, cq_event);
7354 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7355 }
7356 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7357 }
7358
7359 /**
7360 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7361 * @phba: pointer to lpfc hba data structure.
7362 *
7363 * This routine is invoked by the worker thread to process FCF table
7364 * rediscovery pending completion event.
7365 **/
lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba * phba)7366 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7367 {
7368 int rc;
7369
7370 spin_lock_irq(&phba->hbalock);
7371 /* Clear FCF rediscovery timeout event */
7372 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7373 /* Clear driver fast failover FCF record flag */
7374 phba->fcf.failover_rec.flag = 0;
7375 /* Set state for FCF fast failover */
7376 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7377 spin_unlock_irq(&phba->hbalock);
7378
7379 /* Scan FCF table from the first entry to re-discover SAN */
7380 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7381 "2777 Start post-quiescent FCF table scan\n");
7382 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7383 if (rc)
7384 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7385 "2747 Issue FCF scan read FCF mailbox "
7386 "command failed 0x%x\n", rc);
7387 }
7388
7389 /**
7390 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7391 * @phba: pointer to lpfc hba data structure.
7392 * @dev_grp: The HBA PCI-Device group number.
7393 *
7394 * This routine is invoked to set up the per HBA PCI-Device group function
7395 * API jump table entries.
7396 *
7397 * Return: 0 if success, otherwise -ENODEV
7398 **/
7399 int
lpfc_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)7400 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7401 {
7402 int rc;
7403
7404 /* Set up lpfc PCI-device group */
7405 phba->pci_dev_grp = dev_grp;
7406
7407 /* The LPFC_PCI_DEV_OC uses SLI4 */
7408 if (dev_grp == LPFC_PCI_DEV_OC)
7409 phba->sli_rev = LPFC_SLI_REV4;
7410
7411 /* Set up device INIT API function jump table */
7412 rc = lpfc_init_api_table_setup(phba, dev_grp);
7413 if (rc)
7414 return -ENODEV;
7415 /* Set up SCSI API function jump table */
7416 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7417 if (rc)
7418 return -ENODEV;
7419 /* Set up SLI API function jump table */
7420 rc = lpfc_sli_api_table_setup(phba, dev_grp);
7421 if (rc)
7422 return -ENODEV;
7423 /* Set up MBOX API function jump table */
7424 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7425 if (rc)
7426 return -ENODEV;
7427
7428 return 0;
7429 }
7430
7431 /**
7432 * lpfc_log_intr_mode - Log the active interrupt mode
7433 * @phba: pointer to lpfc hba data structure.
7434 * @intr_mode: active interrupt mode adopted.
7435 *
7436 * This routine it invoked to log the currently used active interrupt mode
7437 * to the device.
7438 **/
lpfc_log_intr_mode(struct lpfc_hba * phba,uint32_t intr_mode)7439 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7440 {
7441 switch (intr_mode) {
7442 case 0:
7443 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7444 "0470 Enable INTx interrupt mode.\n");
7445 break;
7446 case 1:
7447 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7448 "0481 Enabled MSI interrupt mode.\n");
7449 break;
7450 case 2:
7451 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7452 "0480 Enabled MSI-X interrupt mode.\n");
7453 break;
7454 default:
7455 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7456 "0482 Illegal interrupt mode.\n");
7457 break;
7458 }
7459 return;
7460 }
7461
7462 /**
7463 * lpfc_enable_pci_dev - Enable a generic PCI device.
7464 * @phba: pointer to lpfc hba data structure.
7465 *
7466 * This routine is invoked to enable the PCI device that is common to all
7467 * PCI devices.
7468 *
7469 * Return codes
7470 * 0 - successful
7471 * other values - error
7472 **/
7473 static int
lpfc_enable_pci_dev(struct lpfc_hba * phba)7474 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7475 {
7476 struct pci_dev *pdev;
7477
7478 /* Obtain PCI device reference */
7479 if (!phba->pcidev)
7480 goto out_error;
7481 else
7482 pdev = phba->pcidev;
7483 /* Enable PCI device */
7484 if (pci_enable_device_mem(pdev))
7485 goto out_error;
7486 /* Request PCI resource for the device */
7487 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7488 goto out_disable_device;
7489 /* Set up device as PCI master and save state for EEH */
7490 pci_set_master(pdev);
7491 pci_try_set_mwi(pdev);
7492 pci_save_state(pdev);
7493
7494 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7495 if (pci_is_pcie(pdev))
7496 pdev->needs_freset = 1;
7497
7498 return 0;
7499
7500 out_disable_device:
7501 pci_disable_device(pdev);
7502 out_error:
7503 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7504 "1401 Failed to enable pci device\n");
7505 return -ENODEV;
7506 }
7507
7508 /**
7509 * lpfc_disable_pci_dev - Disable a generic PCI device.
7510 * @phba: pointer to lpfc hba data structure.
7511 *
7512 * This routine is invoked to disable the PCI device that is common to all
7513 * PCI devices.
7514 **/
7515 static void
lpfc_disable_pci_dev(struct lpfc_hba * phba)7516 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7517 {
7518 struct pci_dev *pdev;
7519
7520 /* Obtain PCI device reference */
7521 if (!phba->pcidev)
7522 return;
7523 else
7524 pdev = phba->pcidev;
7525 /* Release PCI resource and disable PCI device */
7526 pci_release_mem_regions(pdev);
7527 pci_disable_device(pdev);
7528
7529 return;
7530 }
7531
7532 /**
7533 * lpfc_reset_hba - Reset a hba
7534 * @phba: pointer to lpfc hba data structure.
7535 *
7536 * This routine is invoked to reset a hba device. It brings the HBA
7537 * offline, performs a board restart, and then brings the board back
7538 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7539 * on outstanding mailbox commands.
7540 **/
7541 void
lpfc_reset_hba(struct lpfc_hba * phba)7542 lpfc_reset_hba(struct lpfc_hba *phba)
7543 {
7544 int rc = 0;
7545
7546 /* If resets are disabled then set error state and return. */
7547 if (!phba->cfg_enable_hba_reset) {
7548 phba->link_state = LPFC_HBA_ERROR;
7549 return;
7550 }
7551
7552 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7553 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7554 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7555 } else {
7556 if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) {
7557 /* Perform a PCI function reset to start from clean */
7558 rc = lpfc_pci_function_reset(phba);
7559 lpfc_els_flush_all_cmd(phba);
7560 }
7561 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7562 lpfc_sli_flush_io_rings(phba);
7563 }
7564 lpfc_offline(phba);
7565 clear_bit(MBX_TMO_ERR, &phba->bit_flags);
7566 if (unlikely(rc)) {
7567 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7568 "8888 PCI function reset failed rc %x\n",
7569 rc);
7570 } else {
7571 lpfc_sli_brdrestart(phba);
7572 lpfc_online(phba);
7573 lpfc_unblock_mgmt_io(phba);
7574 }
7575 }
7576
7577 /**
7578 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7579 * @phba: pointer to lpfc hba data structure.
7580 *
7581 * This function enables the PCI SR-IOV virtual functions to a physical
7582 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7583 * enable the number of virtual functions to the physical function. As
7584 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7585 * API call does not considered as an error condition for most of the device.
7586 **/
7587 uint16_t
lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba * phba)7588 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7589 {
7590 struct pci_dev *pdev = phba->pcidev;
7591 uint16_t nr_virtfn;
7592 int pos;
7593
7594 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7595 if (pos == 0)
7596 return 0;
7597
7598 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7599 return nr_virtfn;
7600 }
7601
7602 /**
7603 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7604 * @phba: pointer to lpfc hba data structure.
7605 * @nr_vfn: number of virtual functions to be enabled.
7606 *
7607 * This function enables the PCI SR-IOV virtual functions to a physical
7608 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7609 * enable the number of virtual functions to the physical function. As
7610 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7611 * API call does not considered as an error condition for most of the device.
7612 **/
7613 int
lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba * phba,int nr_vfn)7614 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7615 {
7616 struct pci_dev *pdev = phba->pcidev;
7617 uint16_t max_nr_vfn;
7618 int rc;
7619
7620 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7621 if (nr_vfn > max_nr_vfn) {
7622 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7623 "3057 Requested vfs (%d) greater than "
7624 "supported vfs (%d)", nr_vfn, max_nr_vfn);
7625 return -EINVAL;
7626 }
7627
7628 rc = pci_enable_sriov(pdev, nr_vfn);
7629 if (rc) {
7630 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7631 "2806 Failed to enable sriov on this device "
7632 "with vfn number nr_vf:%d, rc:%d\n",
7633 nr_vfn, rc);
7634 } else
7635 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7636 "2807 Successful enable sriov on this device "
7637 "with vfn number nr_vf:%d\n", nr_vfn);
7638 return rc;
7639 }
7640
7641 static void
lpfc_unblock_requests_work(struct work_struct * work)7642 lpfc_unblock_requests_work(struct work_struct *work)
7643 {
7644 struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7645 unblock_request_work);
7646
7647 lpfc_unblock_requests(phba);
7648 }
7649
7650 /**
7651 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7652 * @phba: pointer to lpfc hba data structure.
7653 *
7654 * This routine is invoked to set up the driver internal resources before the
7655 * device specific resource setup to support the HBA device it attached to.
7656 *
7657 * Return codes
7658 * 0 - successful
7659 * other values - error
7660 **/
7661 static int
lpfc_setup_driver_resource_phase1(struct lpfc_hba * phba)7662 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7663 {
7664 struct lpfc_sli *psli = &phba->sli;
7665
7666 /*
7667 * Driver resources common to all SLI revisions
7668 */
7669 atomic_set(&phba->fast_event_count, 0);
7670 atomic_set(&phba->dbg_log_idx, 0);
7671 atomic_set(&phba->dbg_log_cnt, 0);
7672 atomic_set(&phba->dbg_log_dmping, 0);
7673 spin_lock_init(&phba->hbalock);
7674
7675 /* Initialize port_list spinlock */
7676 spin_lock_init(&phba->port_list_lock);
7677 INIT_LIST_HEAD(&phba->port_list);
7678
7679 INIT_LIST_HEAD(&phba->work_list);
7680
7681 /* Initialize the wait queue head for the kernel thread */
7682 init_waitqueue_head(&phba->work_waitq);
7683
7684 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7685 "1403 Protocols supported %s %s %s\n",
7686 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7687 "SCSI" : " "),
7688 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7689 "NVME" : " "),
7690 (phba->nvmet_support ? "NVMET" : " "));
7691
7692 /* ras_fwlog state */
7693 spin_lock_init(&phba->ras_fwlog_lock);
7694
7695 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
7696 spin_lock_init(&phba->scsi_buf_list_get_lock);
7697 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7698 spin_lock_init(&phba->scsi_buf_list_put_lock);
7699 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7700
7701 /* Initialize the fabric iocb list */
7702 INIT_LIST_HEAD(&phba->fabric_iocb_list);
7703
7704 /* Initialize list to save ELS buffers */
7705 INIT_LIST_HEAD(&phba->elsbuf);
7706
7707 /* Initialize FCF connection rec list */
7708 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7709
7710 /* Initialize OAS configuration list */
7711 spin_lock_init(&phba->devicelock);
7712 INIT_LIST_HEAD(&phba->luns);
7713
7714 /* MBOX heartbeat timer */
7715 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7716 /* Fabric block timer */
7717 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7718 /* EA polling mode timer */
7719 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7720 /* Heartbeat timer */
7721 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7722
7723 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7724
7725 INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7726 lpfc_idle_stat_delay_work);
7727 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7728 return 0;
7729 }
7730
7731 /**
7732 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7733 * @phba: pointer to lpfc hba data structure.
7734 *
7735 * This routine is invoked to set up the driver internal resources specific to
7736 * support the SLI-3 HBA device it attached to.
7737 *
7738 * Return codes
7739 * 0 - successful
7740 * other values - error
7741 **/
7742 static int
lpfc_sli_driver_resource_setup(struct lpfc_hba * phba)7743 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7744 {
7745 int rc, entry_sz;
7746
7747 /*
7748 * Initialize timers used by driver
7749 */
7750
7751 /* FCP polling mode timer */
7752 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7753
7754 /* Host attention work mask setup */
7755 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7756 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7757
7758 /* Get all the module params for configuring this host */
7759 lpfc_get_cfgparam(phba);
7760 /* Set up phase-1 common device driver resources */
7761
7762 rc = lpfc_setup_driver_resource_phase1(phba);
7763 if (rc)
7764 return -ENODEV;
7765
7766 if (!phba->sli.sli3_ring)
7767 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
7768 sizeof(struct lpfc_sli_ring),
7769 GFP_KERNEL);
7770 if (!phba->sli.sli3_ring)
7771 return -ENOMEM;
7772
7773 /*
7774 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7775 * used to create the sg_dma_buf_pool must be dynamically calculated.
7776 */
7777
7778 if (phba->sli_rev == LPFC_SLI_REV4)
7779 entry_sz = sizeof(struct sli4_sge);
7780 else
7781 entry_sz = sizeof(struct ulp_bde64);
7782
7783 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7784 if (phba->cfg_enable_bg) {
7785 /*
7786 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7787 * the FCP rsp, and a BDE for each. Sice we have no control
7788 * over how many protection data segments the SCSI Layer
7789 * will hand us (ie: there could be one for every block
7790 * in the IO), we just allocate enough BDEs to accomidate
7791 * our max amount and we need to limit lpfc_sg_seg_cnt to
7792 * minimize the risk of running out.
7793 */
7794 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7795 sizeof(struct fcp_rsp) +
7796 (LPFC_MAX_SG_SEG_CNT * entry_sz);
7797
7798 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7799 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7800
7801 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7802 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7803 } else {
7804 /*
7805 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7806 * the FCP rsp, a BDE for each, and a BDE for up to
7807 * cfg_sg_seg_cnt data segments.
7808 */
7809 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7810 sizeof(struct fcp_rsp) +
7811 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7812
7813 /* Total BDEs in BPL for scsi_sg_list */
7814 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7815 }
7816
7817 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7818 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7819 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7820 phba->cfg_total_seg_cnt);
7821
7822 phba->max_vpi = LPFC_MAX_VPI;
7823 /* This will be set to correct value after config_port mbox */
7824 phba->max_vports = 0;
7825
7826 /*
7827 * Initialize the SLI Layer to run with lpfc HBAs.
7828 */
7829 lpfc_sli_setup(phba);
7830 lpfc_sli_queue_init(phba);
7831
7832 /* Allocate device driver memory */
7833 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7834 return -ENOMEM;
7835
7836 phba->lpfc_sg_dma_buf_pool =
7837 dma_pool_create("lpfc_sg_dma_buf_pool",
7838 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7839 BPL_ALIGN_SZ, 0);
7840
7841 if (!phba->lpfc_sg_dma_buf_pool)
7842 goto fail_free_mem;
7843
7844 phba->lpfc_cmd_rsp_buf_pool =
7845 dma_pool_create("lpfc_cmd_rsp_buf_pool",
7846 &phba->pcidev->dev,
7847 sizeof(struct fcp_cmnd) +
7848 sizeof(struct fcp_rsp),
7849 BPL_ALIGN_SZ, 0);
7850
7851 if (!phba->lpfc_cmd_rsp_buf_pool)
7852 goto fail_free_dma_buf_pool;
7853
7854 /*
7855 * Enable sr-iov virtual functions if supported and configured
7856 * through the module parameter.
7857 */
7858 if (phba->cfg_sriov_nr_virtfn > 0) {
7859 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7860 phba->cfg_sriov_nr_virtfn);
7861 if (rc) {
7862 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7863 "2808 Requested number of SR-IOV "
7864 "virtual functions (%d) is not "
7865 "supported\n",
7866 phba->cfg_sriov_nr_virtfn);
7867 phba->cfg_sriov_nr_virtfn = 0;
7868 }
7869 }
7870
7871 return 0;
7872
7873 fail_free_dma_buf_pool:
7874 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7875 phba->lpfc_sg_dma_buf_pool = NULL;
7876 fail_free_mem:
7877 lpfc_mem_free(phba);
7878 return -ENOMEM;
7879 }
7880
7881 /**
7882 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7883 * @phba: pointer to lpfc hba data structure.
7884 *
7885 * This routine is invoked to unset the driver internal resources set up
7886 * specific for supporting the SLI-3 HBA device it attached to.
7887 **/
7888 static void
lpfc_sli_driver_resource_unset(struct lpfc_hba * phba)7889 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7890 {
7891 /* Free device driver memory allocated */
7892 lpfc_mem_free_all(phba);
7893
7894 return;
7895 }
7896
7897 /**
7898 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7899 * @phba: pointer to lpfc hba data structure.
7900 *
7901 * This routine is invoked to set up the driver internal resources specific to
7902 * support the SLI-4 HBA device it attached to.
7903 *
7904 * Return codes
7905 * 0 - successful
7906 * other values - error
7907 **/
7908 static int
lpfc_sli4_driver_resource_setup(struct lpfc_hba * phba)7909 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7910 {
7911 LPFC_MBOXQ_t *mboxq;
7912 MAILBOX_t *mb;
7913 int rc, i, max_buf_size;
7914 int longs;
7915 int extra;
7916 uint64_t wwn;
7917 u32 if_type;
7918 u32 if_fam;
7919
7920 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7921 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7922 phba->sli4_hba.curr_disp_cpu = 0;
7923
7924 /* Get all the module params for configuring this host */
7925 lpfc_get_cfgparam(phba);
7926
7927 /* Set up phase-1 common device driver resources */
7928 rc = lpfc_setup_driver_resource_phase1(phba);
7929 if (rc)
7930 return -ENODEV;
7931
7932 /* Before proceed, wait for POST done and device ready */
7933 rc = lpfc_sli4_post_status_check(phba);
7934 if (rc)
7935 return -ENODEV;
7936
7937 /* Allocate all driver workqueues here */
7938
7939 /* The lpfc_wq workqueue for deferred irq use */
7940 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
7941 if (!phba->wq)
7942 return -ENOMEM;
7943
7944 /*
7945 * Initialize timers used by driver
7946 */
7947
7948 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7949
7950 /* FCF rediscover timer */
7951 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7952
7953 /* CMF congestion timer */
7954 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7955 phba->cmf_timer.function = lpfc_cmf_timer;
7956 /* CMF 1 minute stats collection timer */
7957 hrtimer_init(&phba->cmf_stats_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7958 phba->cmf_stats_timer.function = lpfc_cmf_stats_timer;
7959
7960 /*
7961 * Control structure for handling external multi-buffer mailbox
7962 * command pass-through.
7963 */
7964 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7965 sizeof(struct lpfc_mbox_ext_buf_ctx));
7966 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7967
7968 phba->max_vpi = LPFC_MAX_VPI;
7969
7970 /* This will be set to correct value after the read_config mbox */
7971 phba->max_vports = 0;
7972
7973 /* Program the default value of vlan_id and fc_map */
7974 phba->valid_vlan = 0;
7975 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7976 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7977 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7978
7979 /*
7980 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7981 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7982 * The WQ create will allocate the ring.
7983 */
7984
7985 /* Initialize buffer queue management fields */
7986 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7987 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7988 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7989
7990 /* for VMID idle timeout if VMID is enabled */
7991 if (lpfc_is_vmid_enabled(phba))
7992 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7993
7994 /*
7995 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
7996 */
7997 /* Initialize the Abort buffer list used by driver */
7998 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
7999 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8000
8001 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8002 /* Initialize the Abort nvme buffer list used by driver */
8003 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8004 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8005 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8006 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8007 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8008 }
8009
8010 /* This abort list used by worker thread */
8011 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8012 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8013 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8014 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8015
8016 /*
8017 * Initialize driver internal slow-path work queues
8018 */
8019
8020 /* Driver internel slow-path CQ Event pool */
8021 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8022 /* Response IOCB work queue list */
8023 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8024 /* Asynchronous event CQ Event work queue list */
8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8026 /* Slow-path XRI aborted CQ Event work queue list */
8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8028 /* Receive queue CQ Event work queue list */
8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8030
8031 /* Initialize extent block lists. */
8032 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8033 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8035 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8036
8037 /* Initialize mboxq lists. If the early init routines fail
8038 * these lists need to be correctly initialized.
8039 */
8040 INIT_LIST_HEAD(&phba->sli.mboxq);
8041 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8042
8043 /* initialize optic_state to 0xFF */
8044 phba->sli4_hba.lnk_info.optic_state = 0xff;
8045
8046 /* Allocate device driver memory */
8047 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8048 if (rc)
8049 goto out_destroy_workqueue;
8050
8051 /* IF Type 2 ports get initialized now. */
8052 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8053 LPFC_SLI_INTF_IF_TYPE_2) {
8054 rc = lpfc_pci_function_reset(phba);
8055 if (unlikely(rc)) {
8056 rc = -ENODEV;
8057 goto out_free_mem;
8058 }
8059 phba->temp_sensor_support = 1;
8060 }
8061
8062 /* Create the bootstrap mailbox command */
8063 rc = lpfc_create_bootstrap_mbox(phba);
8064 if (unlikely(rc))
8065 goto out_free_mem;
8066
8067 /* Set up the host's endian order with the device. */
8068 rc = lpfc_setup_endian_order(phba);
8069 if (unlikely(rc))
8070 goto out_free_bsmbx;
8071
8072 /* Set up the hba's configuration parameters. */
8073 rc = lpfc_sli4_read_config(phba);
8074 if (unlikely(rc))
8075 goto out_free_bsmbx;
8076
8077 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8078 /* Right now the link is down, if FA-PWWN is configured the
8079 * firmware will try FLOGI before the driver gets a link up.
8080 * If it fails, the driver should get a MISCONFIGURED async
8081 * event which will clear this flag. The only notification
8082 * the driver gets is if it fails, if it succeeds there is no
8083 * notification given. Assume success.
8084 */
8085 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8086 }
8087
8088 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8089 if (unlikely(rc))
8090 goto out_free_bsmbx;
8091
8092 /* IF Type 0 ports get initialized now. */
8093 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8094 LPFC_SLI_INTF_IF_TYPE_0) {
8095 rc = lpfc_pci_function_reset(phba);
8096 if (unlikely(rc))
8097 goto out_free_bsmbx;
8098 }
8099
8100 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8101 GFP_KERNEL);
8102 if (!mboxq) {
8103 rc = -ENOMEM;
8104 goto out_free_bsmbx;
8105 }
8106
8107 /* Check for NVMET being configured */
8108 phba->nvmet_support = 0;
8109 if (lpfc_enable_nvmet_cnt) {
8110
8111 /* First get WWN of HBA instance */
8112 lpfc_read_nv(phba, mboxq);
8113 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8114 if (rc != MBX_SUCCESS) {
8115 lpfc_printf_log(phba, KERN_ERR,
8116 LOG_TRACE_EVENT,
8117 "6016 Mailbox failed , mbxCmd x%x "
8118 "READ_NV, mbxStatus x%x\n",
8119 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8120 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8121 mempool_free(mboxq, phba->mbox_mem_pool);
8122 rc = -EIO;
8123 goto out_free_bsmbx;
8124 }
8125 mb = &mboxq->u.mb;
8126 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8127 sizeof(uint64_t));
8128 wwn = cpu_to_be64(wwn);
8129 phba->sli4_hba.wwnn.u.name = wwn;
8130 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8131 sizeof(uint64_t));
8132 /* wwn is WWPN of HBA instance */
8133 wwn = cpu_to_be64(wwn);
8134 phba->sli4_hba.wwpn.u.name = wwn;
8135
8136 /* Check to see if it matches any module parameter */
8137 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8138 if (wwn == lpfc_enable_nvmet[i]) {
8139 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8140 if (lpfc_nvmet_mem_alloc(phba))
8141 break;
8142
8143 phba->nvmet_support = 1; /* a match */
8144
8145 lpfc_printf_log(phba, KERN_ERR,
8146 LOG_TRACE_EVENT,
8147 "6017 NVME Target %016llx\n",
8148 wwn);
8149 #else
8150 lpfc_printf_log(phba, KERN_ERR,
8151 LOG_TRACE_EVENT,
8152 "6021 Can't enable NVME Target."
8153 " NVME_TARGET_FC infrastructure"
8154 " is not in kernel\n");
8155 #endif
8156 /* Not supported for NVMET */
8157 phba->cfg_xri_rebalancing = 0;
8158 if (phba->irq_chann_mode == NHT_MODE) {
8159 phba->cfg_irq_chann =
8160 phba->sli4_hba.num_present_cpu;
8161 phba->cfg_hdw_queue =
8162 phba->sli4_hba.num_present_cpu;
8163 phba->irq_chann_mode = NORMAL_MODE;
8164 }
8165 break;
8166 }
8167 }
8168 }
8169
8170 lpfc_nvme_mod_param_dep(phba);
8171
8172 /*
8173 * Get sli4 parameters that override parameters from Port capabilities.
8174 * If this call fails, it isn't critical unless the SLI4 parameters come
8175 * back in conflict.
8176 */
8177 rc = lpfc_get_sli4_parameters(phba, mboxq);
8178 if (rc) {
8179 if_type = bf_get(lpfc_sli_intf_if_type,
8180 &phba->sli4_hba.sli_intf);
8181 if_fam = bf_get(lpfc_sli_intf_sli_family,
8182 &phba->sli4_hba.sli_intf);
8183 if (phba->sli4_hba.extents_in_use &&
8184 phba->sli4_hba.rpi_hdrs_in_use) {
8185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8186 "2999 Unsupported SLI4 Parameters "
8187 "Extents and RPI headers enabled.\n");
8188 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8189 if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
8190 mempool_free(mboxq, phba->mbox_mem_pool);
8191 rc = -EIO;
8192 goto out_free_bsmbx;
8193 }
8194 }
8195 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
8196 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
8197 mempool_free(mboxq, phba->mbox_mem_pool);
8198 rc = -EIO;
8199 goto out_free_bsmbx;
8200 }
8201 }
8202
8203 /*
8204 * 1 for cmd, 1 for rsp, NVME adds an extra one
8205 * for boundary conditions in its max_sgl_segment template.
8206 */
8207 extra = 2;
8208 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8209 extra++;
8210
8211 /*
8212 * It doesn't matter what family our adapter is in, we are
8213 * limited to 2 Pages, 512 SGEs, for our SGL.
8214 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8215 */
8216 max_buf_size = (2 * SLI4_PAGE_SIZE);
8217
8218 /*
8219 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8220 * used to create the sg_dma_buf_pool must be calculated.
8221 */
8222 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8223 /* Both cfg_enable_bg and cfg_external_dif code paths */
8224
8225 /*
8226 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8227 * the FCP rsp, and a SGE. Sice we have no control
8228 * over how many protection segments the SCSI Layer
8229 * will hand us (ie: there could be one for every block
8230 * in the IO), just allocate enough SGEs to accomidate
8231 * our max amount and we need to limit lpfc_sg_seg_cnt
8232 * to minimize the risk of running out.
8233 */
8234 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8235 sizeof(struct fcp_rsp) + max_buf_size;
8236
8237 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8238 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8239
8240 /*
8241 * If supporting DIF, reduce the seg count for scsi to
8242 * allow room for the DIF sges.
8243 */
8244 if (phba->cfg_enable_bg &&
8245 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8246 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8247 else
8248 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8249
8250 } else {
8251 /*
8252 * The scsi_buf for a regular I/O holds the FCP cmnd,
8253 * the FCP rsp, a SGE for each, and a SGE for up to
8254 * cfg_sg_seg_cnt data segments.
8255 */
8256 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8257 sizeof(struct fcp_rsp) +
8258 ((phba->cfg_sg_seg_cnt + extra) *
8259 sizeof(struct sli4_sge));
8260
8261 /* Total SGEs for scsi_sg_list */
8262 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8263 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8264
8265 /*
8266 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8267 * need to post 1 page for the SGL.
8268 */
8269 }
8270
8271 if (phba->cfg_xpsgl && !phba->nvmet_support)
8272 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8273 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
8274 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8275 else
8276 phba->cfg_sg_dma_buf_size =
8277 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8278
8279 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8280 sizeof(struct sli4_sge);
8281
8282 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8284 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8285 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8286 "6300 Reducing NVME sg segment "
8287 "cnt to %d\n",
8288 LPFC_MAX_NVME_SEG_CNT);
8289 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8290 } else
8291 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8292 }
8293
8294 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8295 "9087 sg_seg_cnt:%d dmabuf_size:%d "
8296 "total:%d scsi:%d nvme:%d\n",
8297 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8298 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
8299 phba->cfg_nvme_seg_cnt);
8300
8301 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE)
8302 i = phba->cfg_sg_dma_buf_size;
8303 else
8304 i = SLI4_PAGE_SIZE;
8305
8306 phba->lpfc_sg_dma_buf_pool =
8307 dma_pool_create("lpfc_sg_dma_buf_pool",
8308 &phba->pcidev->dev,
8309 phba->cfg_sg_dma_buf_size,
8310 i, 0);
8311 if (!phba->lpfc_sg_dma_buf_pool) {
8312 rc = -ENOMEM;
8313 goto out_free_bsmbx;
8314 }
8315
8316 phba->lpfc_cmd_rsp_buf_pool =
8317 dma_pool_create("lpfc_cmd_rsp_buf_pool",
8318 &phba->pcidev->dev,
8319 sizeof(struct fcp_cmnd32) +
8320 sizeof(struct fcp_rsp),
8321 i, 0);
8322 if (!phba->lpfc_cmd_rsp_buf_pool) {
8323 rc = -ENOMEM;
8324 goto out_free_sg_dma_buf;
8325 }
8326
8327 mempool_free(mboxq, phba->mbox_mem_pool);
8328
8329 /* Verify OAS is supported */
8330 lpfc_sli4_oas_verify(phba);
8331
8332 /* Verify RAS support on adapter */
8333 lpfc_sli4_ras_init(phba);
8334
8335 /* Verify all the SLI4 queues */
8336 rc = lpfc_sli4_queue_verify(phba);
8337 if (rc)
8338 goto out_free_cmd_rsp_buf;
8339
8340 /* Create driver internal CQE event pool */
8341 rc = lpfc_sli4_cq_event_pool_create(phba);
8342 if (rc)
8343 goto out_free_cmd_rsp_buf;
8344
8345 /* Initialize sgl lists per host */
8346 lpfc_init_sgl_list(phba);
8347
8348 /* Allocate and initialize active sgl array */
8349 rc = lpfc_init_active_sgl_array(phba);
8350 if (rc) {
8351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8352 "1430 Failed to initialize sgl list.\n");
8353 goto out_destroy_cq_event_pool;
8354 }
8355 rc = lpfc_sli4_init_rpi_hdrs(phba);
8356 if (rc) {
8357 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8358 "1432 Failed to initialize rpi headers.\n");
8359 goto out_free_active_sgl;
8360 }
8361
8362 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8363 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8364 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8365 GFP_KERNEL);
8366 if (!phba->fcf.fcf_rr_bmask) {
8367 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8368 "2759 Failed allocate memory for FCF round "
8369 "robin failover bmask\n");
8370 rc = -ENOMEM;
8371 goto out_remove_rpi_hdrs;
8372 }
8373
8374 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
8375 sizeof(struct lpfc_hba_eq_hdl),
8376 GFP_KERNEL);
8377 if (!phba->sli4_hba.hba_eq_hdl) {
8378 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8379 "2572 Failed allocate memory for "
8380 "fast-path per-EQ handle array\n");
8381 rc = -ENOMEM;
8382 goto out_free_fcf_rr_bmask;
8383 }
8384
8385 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
8386 sizeof(struct lpfc_vector_map_info),
8387 GFP_KERNEL);
8388 if (!phba->sli4_hba.cpu_map) {
8389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8390 "3327 Failed allocate memory for msi-x "
8391 "interrupt vector mapping\n");
8392 rc = -ENOMEM;
8393 goto out_free_hba_eq_hdl;
8394 }
8395
8396 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8397 if (!phba->sli4_hba.eq_info) {
8398 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8399 "3321 Failed allocation for per_cpu stats\n");
8400 rc = -ENOMEM;
8401 goto out_free_hba_cpu_map;
8402 }
8403
8404 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
8405 sizeof(*phba->sli4_hba.idle_stat),
8406 GFP_KERNEL);
8407 if (!phba->sli4_hba.idle_stat) {
8408 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8409 "3390 Failed allocation for idle_stat\n");
8410 rc = -ENOMEM;
8411 goto out_free_hba_eq_info;
8412 }
8413
8414 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8415 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8416 if (!phba->sli4_hba.c_stat) {
8417 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8418 "3332 Failed allocating per cpu hdwq stats\n");
8419 rc = -ENOMEM;
8420 goto out_free_hba_idle_stat;
8421 }
8422 #endif
8423
8424 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8425 if (!phba->cmf_stat) {
8426 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8427 "3331 Failed allocating per cpu cgn stats\n");
8428 rc = -ENOMEM;
8429 goto out_free_hba_hdwq_info;
8430 }
8431
8432 /*
8433 * Enable sr-iov virtual functions if supported and configured
8434 * through the module parameter.
8435 */
8436 if (phba->cfg_sriov_nr_virtfn > 0) {
8437 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8438 phba->cfg_sriov_nr_virtfn);
8439 if (rc) {
8440 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8441 "3020 Requested number of SR-IOV "
8442 "virtual functions (%d) is not "
8443 "supported\n",
8444 phba->cfg_sriov_nr_virtfn);
8445 phba->cfg_sriov_nr_virtfn = 0;
8446 }
8447 }
8448
8449 return 0;
8450
8451 out_free_hba_hdwq_info:
8452 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8453 free_percpu(phba->sli4_hba.c_stat);
8454 out_free_hba_idle_stat:
8455 #endif
8456 kfree(phba->sli4_hba.idle_stat);
8457 out_free_hba_eq_info:
8458 free_percpu(phba->sli4_hba.eq_info);
8459 out_free_hba_cpu_map:
8460 kfree(phba->sli4_hba.cpu_map);
8461 out_free_hba_eq_hdl:
8462 kfree(phba->sli4_hba.hba_eq_hdl);
8463 out_free_fcf_rr_bmask:
8464 kfree(phba->fcf.fcf_rr_bmask);
8465 out_remove_rpi_hdrs:
8466 lpfc_sli4_remove_rpi_hdrs(phba);
8467 out_free_active_sgl:
8468 lpfc_free_active_sgl(phba);
8469 out_destroy_cq_event_pool:
8470 lpfc_sli4_cq_event_pool_destroy(phba);
8471 out_free_cmd_rsp_buf:
8472 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8473 phba->lpfc_cmd_rsp_buf_pool = NULL;
8474 out_free_sg_dma_buf:
8475 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8476 phba->lpfc_sg_dma_buf_pool = NULL;
8477 out_free_bsmbx:
8478 lpfc_destroy_bootstrap_mbox(phba);
8479 out_free_mem:
8480 lpfc_mem_free(phba);
8481 out_destroy_workqueue:
8482 destroy_workqueue(phba->wq);
8483 phba->wq = NULL;
8484 return rc;
8485 }
8486
8487 /**
8488 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8489 * @phba: pointer to lpfc hba data structure.
8490 *
8491 * This routine is invoked to unset the driver internal resources set up
8492 * specific for supporting the SLI-4 HBA device it attached to.
8493 **/
8494 static void
lpfc_sli4_driver_resource_unset(struct lpfc_hba * phba)8495 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8496 {
8497 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8498
8499 free_percpu(phba->sli4_hba.eq_info);
8500 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8501 free_percpu(phba->sli4_hba.c_stat);
8502 #endif
8503 free_percpu(phba->cmf_stat);
8504 kfree(phba->sli4_hba.idle_stat);
8505
8506 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
8507 kfree(phba->sli4_hba.cpu_map);
8508 phba->sli4_hba.num_possible_cpu = 0;
8509 phba->sli4_hba.num_present_cpu = 0;
8510 phba->sli4_hba.curr_disp_cpu = 0;
8511 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8512
8513 /* Free memory allocated for fast-path work queue handles */
8514 kfree(phba->sli4_hba.hba_eq_hdl);
8515
8516 /* Free the allocated rpi headers. */
8517 lpfc_sli4_remove_rpi_hdrs(phba);
8518 lpfc_sli4_remove_rpis(phba);
8519
8520 /* Free eligible FCF index bmask */
8521 kfree(phba->fcf.fcf_rr_bmask);
8522
8523 /* Free the ELS sgl list */
8524 lpfc_free_active_sgl(phba);
8525 lpfc_free_els_sgl_list(phba);
8526 lpfc_free_nvmet_sgl_list(phba);
8527
8528 /* Free the completion queue EQ event pool */
8529 lpfc_sli4_cq_event_release_all(phba);
8530 lpfc_sli4_cq_event_pool_destroy(phba);
8531
8532 /* Release resource identifiers. */
8533 lpfc_sli4_dealloc_resource_identifiers(phba);
8534
8535 /* Free the bsmbx region. */
8536 lpfc_destroy_bootstrap_mbox(phba);
8537
8538 /* Free the SLI Layer memory with SLI4 HBAs */
8539 lpfc_mem_free_all(phba);
8540
8541 /* Free the current connect table */
8542 list_for_each_entry_safe(conn_entry, next_conn_entry,
8543 &phba->fcf_conn_rec_list, list) {
8544 list_del_init(&conn_entry->list);
8545 kfree(conn_entry);
8546 }
8547
8548 return;
8549 }
8550
8551 /**
8552 * lpfc_init_api_table_setup - Set up init api function jump table
8553 * @phba: The hba struct for which this call is being executed.
8554 * @dev_grp: The HBA PCI-Device group number.
8555 *
8556 * This routine sets up the device INIT interface API function jump table
8557 * in @phba struct.
8558 *
8559 * Returns: 0 - success, -ENODEV - failure.
8560 **/
8561 int
lpfc_init_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)8562 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8563 {
8564 phba->lpfc_hba_init_link = lpfc_hba_init_link;
8565 phba->lpfc_hba_down_link = lpfc_hba_down_link;
8566 phba->lpfc_selective_reset = lpfc_selective_reset;
8567 switch (dev_grp) {
8568 case LPFC_PCI_DEV_LP:
8569 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8570 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8571 phba->lpfc_stop_port = lpfc_stop_port_s3;
8572 break;
8573 case LPFC_PCI_DEV_OC:
8574 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8575 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8576 phba->lpfc_stop_port = lpfc_stop_port_s4;
8577 break;
8578 default:
8579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8580 "1431 Invalid HBA PCI-device group: 0x%x\n",
8581 dev_grp);
8582 return -ENODEV;
8583 }
8584 return 0;
8585 }
8586
8587 /**
8588 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8589 * @phba: pointer to lpfc hba data structure.
8590 *
8591 * This routine is invoked to set up the driver internal resources after the
8592 * device specific resource setup to support the HBA device it attached to.
8593 *
8594 * Return codes
8595 * 0 - successful
8596 * other values - error
8597 **/
8598 static int
lpfc_setup_driver_resource_phase2(struct lpfc_hba * phba)8599 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8600 {
8601 int error;
8602
8603 /* Startup the kernel thread for this host adapter. */
8604 phba->worker_thread = kthread_run(lpfc_do_work, phba,
8605 "lpfc_worker_%d", phba->brd_no);
8606 if (IS_ERR(phba->worker_thread)) {
8607 error = PTR_ERR(phba->worker_thread);
8608 return error;
8609 }
8610
8611 return 0;
8612 }
8613
8614 /**
8615 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8616 * @phba: pointer to lpfc hba data structure.
8617 *
8618 * This routine is invoked to unset the driver internal resources set up after
8619 * the device specific resource setup for supporting the HBA device it
8620 * attached to.
8621 **/
8622 static void
lpfc_unset_driver_resource_phase2(struct lpfc_hba * phba)8623 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8624 {
8625 if (phba->wq) {
8626 destroy_workqueue(phba->wq);
8627 phba->wq = NULL;
8628 }
8629
8630 /* Stop kernel worker thread */
8631 if (phba->worker_thread)
8632 kthread_stop(phba->worker_thread);
8633 }
8634
8635 /**
8636 * lpfc_free_iocb_list - Free iocb list.
8637 * @phba: pointer to lpfc hba data structure.
8638 *
8639 * This routine is invoked to free the driver's IOCB list and memory.
8640 **/
8641 void
lpfc_free_iocb_list(struct lpfc_hba * phba)8642 lpfc_free_iocb_list(struct lpfc_hba *phba)
8643 {
8644 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8645
8646 spin_lock_irq(&phba->hbalock);
8647 list_for_each_entry_safe(iocbq_entry, iocbq_next,
8648 &phba->lpfc_iocb_list, list) {
8649 list_del(&iocbq_entry->list);
8650 kfree(iocbq_entry);
8651 phba->total_iocbq_bufs--;
8652 }
8653 spin_unlock_irq(&phba->hbalock);
8654
8655 return;
8656 }
8657
8658 /**
8659 * lpfc_init_iocb_list - Allocate and initialize iocb list.
8660 * @phba: pointer to lpfc hba data structure.
8661 * @iocb_count: number of requested iocbs
8662 *
8663 * This routine is invoked to allocate and initizlize the driver's IOCB
8664 * list and set up the IOCB tag array accordingly.
8665 *
8666 * Return codes
8667 * 0 - successful
8668 * other values - error
8669 **/
8670 int
lpfc_init_iocb_list(struct lpfc_hba * phba,int iocb_count)8671 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8672 {
8673 struct lpfc_iocbq *iocbq_entry = NULL;
8674 uint16_t iotag;
8675 int i;
8676
8677 /* Initialize and populate the iocb list per host. */
8678 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8679 for (i = 0; i < iocb_count; i++) {
8680 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
8681 if (iocbq_entry == NULL) {
8682 printk(KERN_ERR "%s: only allocated %d iocbs of "
8683 "expected %d count. Unloading driver.\n",
8684 __func__, i, iocb_count);
8685 goto out_free_iocbq;
8686 }
8687
8688 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8689 if (iotag == 0) {
8690 kfree(iocbq_entry);
8691 printk(KERN_ERR "%s: failed to allocate IOTAG. "
8692 "Unloading driver.\n", __func__);
8693 goto out_free_iocbq;
8694 }
8695 iocbq_entry->sli4_lxritag = NO_XRI;
8696 iocbq_entry->sli4_xritag = NO_XRI;
8697
8698 spin_lock_irq(&phba->hbalock);
8699 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8700 phba->total_iocbq_bufs++;
8701 spin_unlock_irq(&phba->hbalock);
8702 }
8703
8704 return 0;
8705
8706 out_free_iocbq:
8707 lpfc_free_iocb_list(phba);
8708
8709 return -ENOMEM;
8710 }
8711
8712 /**
8713 * lpfc_free_sgl_list - Free a given sgl list.
8714 * @phba: pointer to lpfc hba data structure.
8715 * @sglq_list: pointer to the head of sgl list.
8716 *
8717 * This routine is invoked to free a give sgl list and memory.
8718 **/
8719 void
lpfc_free_sgl_list(struct lpfc_hba * phba,struct list_head * sglq_list)8720 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8721 {
8722 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8723
8724 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8725 list_del(&sglq_entry->list);
8726 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8727 kfree(sglq_entry);
8728 }
8729 }
8730
8731 /**
8732 * lpfc_free_els_sgl_list - Free els sgl list.
8733 * @phba: pointer to lpfc hba data structure.
8734 *
8735 * This routine is invoked to free the driver's els sgl list and memory.
8736 **/
8737 static void
lpfc_free_els_sgl_list(struct lpfc_hba * phba)8738 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8739 {
8740 LIST_HEAD(sglq_list);
8741
8742 /* Retrieve all els sgls from driver list */
8743 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8744 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8745 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8746
8747 /* Now free the sgl list */
8748 lpfc_free_sgl_list(phba, &sglq_list);
8749 }
8750
8751 /**
8752 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8753 * @phba: pointer to lpfc hba data structure.
8754 *
8755 * This routine is invoked to free the driver's nvmet sgl list and memory.
8756 **/
8757 static void
lpfc_free_nvmet_sgl_list(struct lpfc_hba * phba)8758 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8759 {
8760 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8761 LIST_HEAD(sglq_list);
8762
8763 /* Retrieve all nvmet sgls from driver list */
8764 spin_lock_irq(&phba->hbalock);
8765 spin_lock(&phba->sli4_hba.sgl_list_lock);
8766 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8767 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8768 spin_unlock_irq(&phba->hbalock);
8769
8770 /* Now free the sgl list */
8771 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8772 list_del(&sglq_entry->list);
8773 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8774 kfree(sglq_entry);
8775 }
8776
8777 /* Update the nvmet_xri_cnt to reflect no current sgls.
8778 * The next initialization cycle sets the count and allocates
8779 * the sgls over again.
8780 */
8781 phba->sli4_hba.nvmet_xri_cnt = 0;
8782 }
8783
8784 /**
8785 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8786 * @phba: pointer to lpfc hba data structure.
8787 *
8788 * This routine is invoked to allocate the driver's active sgl memory.
8789 * This array will hold the sglq_entry's for active IOs.
8790 **/
8791 static int
lpfc_init_active_sgl_array(struct lpfc_hba * phba)8792 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8793 {
8794 int size;
8795 size = sizeof(struct lpfc_sglq *);
8796 size *= phba->sli4_hba.max_cfg_param.max_xri;
8797
8798 phba->sli4_hba.lpfc_sglq_active_list =
8799 kzalloc(size, GFP_KERNEL);
8800 if (!phba->sli4_hba.lpfc_sglq_active_list)
8801 return -ENOMEM;
8802 return 0;
8803 }
8804
8805 /**
8806 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8807 * @phba: pointer to lpfc hba data structure.
8808 *
8809 * This routine is invoked to walk through the array of active sglq entries
8810 * and free all of the resources.
8811 * This is just a place holder for now.
8812 **/
8813 static void
lpfc_free_active_sgl(struct lpfc_hba * phba)8814 lpfc_free_active_sgl(struct lpfc_hba *phba)
8815 {
8816 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8817 }
8818
8819 /**
8820 * lpfc_init_sgl_list - Allocate and initialize sgl list.
8821 * @phba: pointer to lpfc hba data structure.
8822 *
8823 * This routine is invoked to allocate and initizlize the driver's sgl
8824 * list and set up the sgl xritag tag array accordingly.
8825 *
8826 **/
8827 static void
lpfc_init_sgl_list(struct lpfc_hba * phba)8828 lpfc_init_sgl_list(struct lpfc_hba *phba)
8829 {
8830 /* Initialize and populate the sglq list per host/VF. */
8831 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8832 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8833 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8834 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8835
8836 /* els xri-sgl book keeping */
8837 phba->sli4_hba.els_xri_cnt = 0;
8838
8839 /* nvme xri-buffer book keeping */
8840 phba->sli4_hba.io_xri_cnt = 0;
8841 }
8842
8843 /**
8844 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8845 * @phba: pointer to lpfc hba data structure.
8846 *
8847 * This routine is invoked to post rpi header templates to the
8848 * port for those SLI4 ports that do not support extents. This routine
8849 * posts a PAGE_SIZE memory region to the port to hold up to
8850 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
8851 * and should be called only when interrupts are disabled.
8852 *
8853 * Return codes
8854 * 0 - successful
8855 * -ERROR - otherwise.
8856 **/
8857 int
lpfc_sli4_init_rpi_hdrs(struct lpfc_hba * phba)8858 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8859 {
8860 int rc = 0;
8861 struct lpfc_rpi_hdr *rpi_hdr;
8862
8863 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8864 if (!phba->sli4_hba.rpi_hdrs_in_use)
8865 return rc;
8866 if (phba->sli4_hba.extents_in_use)
8867 return -EIO;
8868
8869 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8870 if (!rpi_hdr) {
8871 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8872 "0391 Error during rpi post operation\n");
8873 lpfc_sli4_remove_rpis(phba);
8874 rc = -ENODEV;
8875 }
8876
8877 return rc;
8878 }
8879
8880 /**
8881 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8882 * @phba: pointer to lpfc hba data structure.
8883 *
8884 * This routine is invoked to allocate a single 4KB memory region to
8885 * support rpis and stores them in the phba. This single region
8886 * provides support for up to 64 rpis. The region is used globally
8887 * by the device.
8888 *
8889 * Returns:
8890 * A valid rpi hdr on success.
8891 * A NULL pointer on any failure.
8892 **/
8893 struct lpfc_rpi_hdr *
lpfc_sli4_create_rpi_hdr(struct lpfc_hba * phba)8894 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8895 {
8896 uint16_t rpi_limit, curr_rpi_range;
8897 struct lpfc_dmabuf *dmabuf;
8898 struct lpfc_rpi_hdr *rpi_hdr;
8899
8900 /*
8901 * If the SLI4 port supports extents, posting the rpi header isn't
8902 * required. Set the expected maximum count and let the actual value
8903 * get set when extents are fully allocated.
8904 */
8905 if (!phba->sli4_hba.rpi_hdrs_in_use)
8906 return NULL;
8907 if (phba->sli4_hba.extents_in_use)
8908 return NULL;
8909
8910 /* The limit on the logical index is just the max_rpi count. */
8911 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8912
8913 spin_lock_irq(&phba->hbalock);
8914 /*
8915 * Establish the starting RPI in this header block. The starting
8916 * rpi is normalized to a zero base because the physical rpi is
8917 * port based.
8918 */
8919 curr_rpi_range = phba->sli4_hba.next_rpi;
8920 spin_unlock_irq(&phba->hbalock);
8921
8922 /* Reached full RPI range */
8923 if (curr_rpi_range == rpi_limit)
8924 return NULL;
8925
8926 /*
8927 * First allocate the protocol header region for the port. The
8928 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8929 */
8930 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8931 if (!dmabuf)
8932 return NULL;
8933
8934 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8935 LPFC_HDR_TEMPLATE_SIZE,
8936 &dmabuf->phys, GFP_KERNEL);
8937 if (!dmabuf->virt) {
8938 rpi_hdr = NULL;
8939 goto err_free_dmabuf;
8940 }
8941
8942 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8943 rpi_hdr = NULL;
8944 goto err_free_coherent;
8945 }
8946
8947 /* Save the rpi header data for cleanup later. */
8948 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
8949 if (!rpi_hdr)
8950 goto err_free_coherent;
8951
8952 rpi_hdr->dmabuf = dmabuf;
8953 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8954 rpi_hdr->page_count = 1;
8955 spin_lock_irq(&phba->hbalock);
8956
8957 /* The rpi_hdr stores the logical index only. */
8958 rpi_hdr->start_rpi = curr_rpi_range;
8959 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8960 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8961
8962 spin_unlock_irq(&phba->hbalock);
8963 return rpi_hdr;
8964
8965 err_free_coherent:
8966 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8967 dmabuf->virt, dmabuf->phys);
8968 err_free_dmabuf:
8969 kfree(dmabuf);
8970 return NULL;
8971 }
8972
8973 /**
8974 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8975 * @phba: pointer to lpfc hba data structure.
8976 *
8977 * This routine is invoked to remove all memory resources allocated
8978 * to support rpis for SLI4 ports not supporting extents. This routine
8979 * presumes the caller has released all rpis consumed by fabric or port
8980 * logins and is prepared to have the header pages removed.
8981 **/
8982 void
lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba * phba)8983 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8984 {
8985 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8986
8987 if (!phba->sli4_hba.rpi_hdrs_in_use)
8988 goto exit;
8989
8990 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8991 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8992 list_del(&rpi_hdr->list);
8993 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8994 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8995 kfree(rpi_hdr->dmabuf);
8996 kfree(rpi_hdr);
8997 }
8998 exit:
8999 /* There are no rpis available to the port now. */
9000 phba->sli4_hba.next_rpi = 0;
9001 }
9002
9003 /**
9004 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
9005 * @pdev: pointer to pci device data structure.
9006 *
9007 * This routine is invoked to allocate the driver hba data structure for an
9008 * HBA device. If the allocation is successful, the phba reference to the
9009 * PCI device data structure is set.
9010 *
9011 * Return codes
9012 * pointer to @phba - successful
9013 * NULL - error
9014 **/
9015 static struct lpfc_hba *
lpfc_hba_alloc(struct pci_dev * pdev)9016 lpfc_hba_alloc(struct pci_dev *pdev)
9017 {
9018 struct lpfc_hba *phba;
9019
9020 /* Allocate memory for HBA structure */
9021 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
9022 if (!phba) {
9023 dev_err(&pdev->dev, "failed to allocate hba struct\n");
9024 return NULL;
9025 }
9026
9027 /* Set reference to PCI device in HBA structure */
9028 phba->pcidev = pdev;
9029
9030 /* Assign an unused board number */
9031 phba->brd_no = lpfc_get_instance();
9032 if (phba->brd_no < 0) {
9033 kfree(phba);
9034 return NULL;
9035 }
9036 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9037
9038 spin_lock_init(&phba->ct_ev_lock);
9039 INIT_LIST_HEAD(&phba->ct_ev_waiters);
9040
9041 return phba;
9042 }
9043
9044 /**
9045 * lpfc_hba_free - Free driver hba data structure with a device.
9046 * @phba: pointer to lpfc hba data structure.
9047 *
9048 * This routine is invoked to free the driver hba data structure with an
9049 * HBA device.
9050 **/
9051 static void
lpfc_hba_free(struct lpfc_hba * phba)9052 lpfc_hba_free(struct lpfc_hba *phba)
9053 {
9054 if (phba->sli_rev == LPFC_SLI_REV4)
9055 kfree(phba->sli4_hba.hdwq);
9056
9057 /* Release the driver assigned board number */
9058 idr_remove(&lpfc_hba_index, phba->brd_no);
9059
9060 /* Free memory allocated with sli3 rings */
9061 kfree(phba->sli.sli3_ring);
9062 phba->sli.sli3_ring = NULL;
9063
9064 kfree(phba);
9065 return;
9066 }
9067
9068 /**
9069 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9070 * @vport: pointer to lpfc vport data structure.
9071 *
9072 * This routine is will setup initial FDMI attribute masks for
9073 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9074 * to get these attributes first before falling back, the attribute
9075 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9076 **/
9077 void
lpfc_setup_fdmi_mask(struct lpfc_vport * vport)9078 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9079 {
9080 struct lpfc_hba *phba = vport->phba;
9081
9082 set_bit(FC_ALLOW_FDMI, &vport->load_flag);
9083 if (phba->cfg_enable_SmartSAN ||
9084 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9085 /* Setup appropriate attribute masks */
9086 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9087 if (phba->cfg_enable_SmartSAN)
9088 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9089 else
9090 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9091 }
9092
9093 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY,
9094 "6077 Setup FDMI mask: hba x%x port x%x\n",
9095 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9096 }
9097
9098 /**
9099 * lpfc_create_shost - Create hba physical port with associated scsi host.
9100 * @phba: pointer to lpfc hba data structure.
9101 *
9102 * This routine is invoked to create HBA physical port and associate a SCSI
9103 * host with it.
9104 *
9105 * Return codes
9106 * 0 - successful
9107 * other values - error
9108 **/
9109 static int
lpfc_create_shost(struct lpfc_hba * phba)9110 lpfc_create_shost(struct lpfc_hba *phba)
9111 {
9112 struct lpfc_vport *vport;
9113 struct Scsi_Host *shost;
9114
9115 /* Initialize HBA FC structure */
9116 phba->fc_edtov = FF_DEF_EDTOV;
9117 phba->fc_ratov = FF_DEF_RATOV;
9118 phba->fc_altov = FF_DEF_ALTOV;
9119 phba->fc_arbtov = FF_DEF_ARBTOV;
9120
9121 atomic_set(&phba->sdev_cnt, 0);
9122 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9123 if (!vport)
9124 return -ENODEV;
9125
9126 shost = lpfc_shost_from_vport(vport);
9127 phba->pport = vport;
9128
9129 if (phba->nvmet_support) {
9130 /* Only 1 vport (pport) will support NVME target */
9131 phba->targetport = NULL;
9132 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9133 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9134 "6076 NVME Target Found\n");
9135 }
9136
9137 lpfc_debugfs_initialize(vport);
9138 /* Put reference to SCSI host to driver's device private data */
9139 pci_set_drvdata(phba->pcidev, shost);
9140
9141 lpfc_setup_fdmi_mask(vport);
9142
9143 /*
9144 * At this point we are fully registered with PSA. In addition,
9145 * any initial discovery should be completed.
9146 */
9147 return 0;
9148 }
9149
9150 /**
9151 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9152 * @phba: pointer to lpfc hba data structure.
9153 *
9154 * This routine is invoked to destroy HBA physical port and the associated
9155 * SCSI host.
9156 **/
9157 static void
lpfc_destroy_shost(struct lpfc_hba * phba)9158 lpfc_destroy_shost(struct lpfc_hba *phba)
9159 {
9160 struct lpfc_vport *vport = phba->pport;
9161
9162 /* Destroy physical port that associated with the SCSI host */
9163 destroy_port(vport);
9164
9165 return;
9166 }
9167
9168 /**
9169 * lpfc_setup_bg - Setup Block guard structures and debug areas.
9170 * @phba: pointer to lpfc hba data structure.
9171 * @shost: the shost to be used to detect Block guard settings.
9172 *
9173 * This routine sets up the local Block guard protocol settings for @shost.
9174 * This routine also allocates memory for debugging bg buffers.
9175 **/
9176 static void
lpfc_setup_bg(struct lpfc_hba * phba,struct Scsi_Host * shost)9177 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9178 {
9179 uint32_t old_mask;
9180 uint32_t old_guard;
9181
9182 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9184 "1478 Registering BlockGuard with the "
9185 "SCSI layer\n");
9186
9187 old_mask = phba->cfg_prot_mask;
9188 old_guard = phba->cfg_prot_guard;
9189
9190 /* Only allow supported values */
9191 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9192 SHOST_DIX_TYPE0_PROTECTION |
9193 SHOST_DIX_TYPE1_PROTECTION);
9194 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9195 SHOST_DIX_GUARD_CRC);
9196
9197 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
9198 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9199 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9200
9201 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9202 if ((old_mask != phba->cfg_prot_mask) ||
9203 (old_guard != phba->cfg_prot_guard))
9204 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9205 "1475 Registering BlockGuard with the "
9206 "SCSI layer: mask %d guard %d\n",
9207 phba->cfg_prot_mask,
9208 phba->cfg_prot_guard);
9209
9210 scsi_host_set_prot(shost, phba->cfg_prot_mask);
9211 scsi_host_set_guard(shost, phba->cfg_prot_guard);
9212 } else
9213 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9214 "1479 Not Registering BlockGuard with the SCSI "
9215 "layer, Bad protection parameters: %d %d\n",
9216 old_mask, old_guard);
9217 }
9218 }
9219
9220 /**
9221 * lpfc_post_init_setup - Perform necessary device post initialization setup.
9222 * @phba: pointer to lpfc hba data structure.
9223 *
9224 * This routine is invoked to perform all the necessary post initialization
9225 * setup for the device.
9226 **/
9227 static void
lpfc_post_init_setup(struct lpfc_hba * phba)9228 lpfc_post_init_setup(struct lpfc_hba *phba)
9229 {
9230 struct Scsi_Host *shost;
9231 struct lpfc_adapter_event_header adapter_event;
9232
9233 /* Get the default values for Model Name and Description */
9234 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9235
9236 /*
9237 * hba setup may have changed the hba_queue_depth so we need to
9238 * adjust the value of can_queue.
9239 */
9240 shost = pci_get_drvdata(phba->pcidev);
9241 shost->can_queue = phba->cfg_hba_queue_depth - 10;
9242
9243 lpfc_host_attrib_init(shost);
9244
9245 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9246 spin_lock_irq(shost->host_lock);
9247 lpfc_poll_start_timer(phba);
9248 spin_unlock_irq(shost->host_lock);
9249 }
9250
9251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9252 "0428 Perform SCSI scan\n");
9253 /* Send board arrival event to upper layer */
9254 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9255 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9256 fc_host_post_vendor_event(shost, fc_get_event_number(),
9257 sizeof(adapter_event),
9258 (char *) &adapter_event,
9259 LPFC_NL_VENDOR_ID);
9260 return;
9261 }
9262
9263 /**
9264 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9265 * @phba: pointer to lpfc hba data structure.
9266 *
9267 * This routine is invoked to set up the PCI device memory space for device
9268 * with SLI-3 interface spec.
9269 *
9270 * Return codes
9271 * 0 - successful
9272 * other values - error
9273 **/
9274 static int
lpfc_sli_pci_mem_setup(struct lpfc_hba * phba)9275 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9276 {
9277 struct pci_dev *pdev = phba->pcidev;
9278 unsigned long bar0map_len, bar2map_len;
9279 int i, hbq_count;
9280 void *ptr;
9281 int error;
9282
9283 if (!pdev)
9284 return -ENODEV;
9285
9286 /* Set the device DMA mask size */
9287 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9288 if (error)
9289 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9290 if (error)
9291 return error;
9292 error = -ENODEV;
9293
9294 /* Get the bus address of Bar0 and Bar2 and the number of bytes
9295 * required by each mapping.
9296 */
9297 phba->pci_bar0_map = pci_resource_start(pdev, 0);
9298 bar0map_len = pci_resource_len(pdev, 0);
9299
9300 phba->pci_bar2_map = pci_resource_start(pdev, 2);
9301 bar2map_len = pci_resource_len(pdev, 2);
9302
9303 /* Map HBA SLIM to a kernel virtual address. */
9304 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9305 if (!phba->slim_memmap_p) {
9306 dev_printk(KERN_ERR, &pdev->dev,
9307 "ioremap failed for SLIM memory.\n");
9308 goto out;
9309 }
9310
9311 /* Map HBA Control Registers to a kernel virtual address. */
9312 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9313 if (!phba->ctrl_regs_memmap_p) {
9314 dev_printk(KERN_ERR, &pdev->dev,
9315 "ioremap failed for HBA control registers.\n");
9316 goto out_iounmap_slim;
9317 }
9318
9319 /* Allocate memory for SLI-2 structures */
9320 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9321 &phba->slim2p.phys, GFP_KERNEL);
9322 if (!phba->slim2p.virt)
9323 goto out_iounmap;
9324
9325 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9326 phba->mbox_ext = (phba->slim2p.virt +
9327 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9328 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9329 phba->IOCBs = (phba->slim2p.virt +
9330 offsetof(struct lpfc_sli2_slim, IOCBs));
9331
9332 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9333 lpfc_sli_hbq_size(),
9334 &phba->hbqslimp.phys,
9335 GFP_KERNEL);
9336 if (!phba->hbqslimp.virt)
9337 goto out_free_slim;
9338
9339 hbq_count = lpfc_sli_hbq_count();
9340 ptr = phba->hbqslimp.virt;
9341 for (i = 0; i < hbq_count; ++i) {
9342 phba->hbqs[i].hbq_virt = ptr;
9343 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9344 ptr += (lpfc_hbq_defs[i]->entry_count *
9345 sizeof(struct lpfc_hbq_entry));
9346 }
9347 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9348 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9349
9350 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9351
9352 phba->MBslimaddr = phba->slim_memmap_p;
9353 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9354 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9355 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9356 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9357
9358 return 0;
9359
9360 out_free_slim:
9361 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9362 phba->slim2p.virt, phba->slim2p.phys);
9363 out_iounmap:
9364 iounmap(phba->ctrl_regs_memmap_p);
9365 out_iounmap_slim:
9366 iounmap(phba->slim_memmap_p);
9367 out:
9368 return error;
9369 }
9370
9371 /**
9372 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9373 * @phba: pointer to lpfc hba data structure.
9374 *
9375 * This routine is invoked to unset the PCI device memory space for device
9376 * with SLI-3 interface spec.
9377 **/
9378 static void
lpfc_sli_pci_mem_unset(struct lpfc_hba * phba)9379 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9380 {
9381 struct pci_dev *pdev;
9382
9383 /* Obtain PCI device reference */
9384 if (!phba->pcidev)
9385 return;
9386 else
9387 pdev = phba->pcidev;
9388
9389 /* Free coherent DMA memory allocated */
9390 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9391 phba->hbqslimp.virt, phba->hbqslimp.phys);
9392 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9393 phba->slim2p.virt, phba->slim2p.phys);
9394
9395 /* I/O memory unmap */
9396 iounmap(phba->ctrl_regs_memmap_p);
9397 iounmap(phba->slim_memmap_p);
9398
9399 return;
9400 }
9401
9402 /**
9403 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9404 * @phba: pointer to lpfc hba data structure.
9405 *
9406 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9407 * done and check status.
9408 *
9409 * Return 0 if successful, otherwise -ENODEV.
9410 **/
9411 int
lpfc_sli4_post_status_check(struct lpfc_hba * phba)9412 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9413 {
9414 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9415 struct lpfc_register reg_data;
9416 int i, port_error = 0;
9417 uint32_t if_type;
9418
9419 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9420 memset(®_data, 0, sizeof(reg_data));
9421 if (!phba->sli4_hba.PSMPHRregaddr)
9422 return -ENODEV;
9423
9424 /* Wait up to 30 seconds for the SLI Port POST done and ready */
9425 for (i = 0; i < 3000; i++) {
9426 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9427 &portsmphr_reg.word0) ||
9428 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9429 /* Port has a fatal POST error, break out */
9430 port_error = -ENODEV;
9431 break;
9432 }
9433 if (LPFC_POST_STAGE_PORT_READY ==
9434 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9435 break;
9436 msleep(10);
9437 }
9438
9439 /*
9440 * If there was a port error during POST, then don't proceed with
9441 * other register reads as the data may not be valid. Just exit.
9442 */
9443 if (port_error) {
9444 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9445 "1408 Port Failed POST - portsmphr=0x%x, "
9446 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9447 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9448 portsmphr_reg.word0,
9449 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9450 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9451 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9452 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9453 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9454 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9455 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9456 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9457 } else {
9458 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9459 "2534 Device Info: SLIFamily=0x%x, "
9460 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9461 "SLIHint_2=0x%x, FT=0x%x\n",
9462 bf_get(lpfc_sli_intf_sli_family,
9463 &phba->sli4_hba.sli_intf),
9464 bf_get(lpfc_sli_intf_slirev,
9465 &phba->sli4_hba.sli_intf),
9466 bf_get(lpfc_sli_intf_if_type,
9467 &phba->sli4_hba.sli_intf),
9468 bf_get(lpfc_sli_intf_sli_hint1,
9469 &phba->sli4_hba.sli_intf),
9470 bf_get(lpfc_sli_intf_sli_hint2,
9471 &phba->sli4_hba.sli_intf),
9472 bf_get(lpfc_sli_intf_func_type,
9473 &phba->sli4_hba.sli_intf));
9474 /*
9475 * Check for other Port errors during the initialization
9476 * process. Fail the load if the port did not come up
9477 * correctly.
9478 */
9479 if_type = bf_get(lpfc_sli_intf_if_type,
9480 &phba->sli4_hba.sli_intf);
9481 switch (if_type) {
9482 case LPFC_SLI_INTF_IF_TYPE_0:
9483 phba->sli4_hba.ue_mask_lo =
9484 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9485 phba->sli4_hba.ue_mask_hi =
9486 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9487 uerrlo_reg.word0 =
9488 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9489 uerrhi_reg.word0 =
9490 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9491 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9492 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9493 lpfc_printf_log(phba, KERN_ERR,
9494 LOG_TRACE_EVENT,
9495 "1422 Unrecoverable Error "
9496 "Detected during POST "
9497 "uerr_lo_reg=0x%x, "
9498 "uerr_hi_reg=0x%x, "
9499 "ue_mask_lo_reg=0x%x, "
9500 "ue_mask_hi_reg=0x%x\n",
9501 uerrlo_reg.word0,
9502 uerrhi_reg.word0,
9503 phba->sli4_hba.ue_mask_lo,
9504 phba->sli4_hba.ue_mask_hi);
9505 port_error = -ENODEV;
9506 }
9507 break;
9508 case LPFC_SLI_INTF_IF_TYPE_2:
9509 case LPFC_SLI_INTF_IF_TYPE_6:
9510 /* Final checks. The port status should be clean. */
9511 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9512 ®_data.word0) ||
9513 lpfc_sli4_unrecoverable_port(®_data)) {
9514 phba->work_status[0] =
9515 readl(phba->sli4_hba.u.if_type2.
9516 ERR1regaddr);
9517 phba->work_status[1] =
9518 readl(phba->sli4_hba.u.if_type2.
9519 ERR2regaddr);
9520 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9521 "2888 Unrecoverable port error "
9522 "following POST: port status reg "
9523 "0x%x, port_smphr reg 0x%x, "
9524 "error 1=0x%x, error 2=0x%x\n",
9525 reg_data.word0,
9526 portsmphr_reg.word0,
9527 phba->work_status[0],
9528 phba->work_status[1]);
9529 port_error = -ENODEV;
9530 break;
9531 }
9532
9533 if (lpfc_pldv_detect &&
9534 bf_get(lpfc_sli_intf_sli_family,
9535 &phba->sli4_hba.sli_intf) ==
9536 LPFC_SLI_INTF_FAMILY_G6)
9537 pci_write_config_byte(phba->pcidev,
9538 LPFC_SLI_INTF, CFG_PLD);
9539 break;
9540 case LPFC_SLI_INTF_IF_TYPE_1:
9541 default:
9542 break;
9543 }
9544 }
9545 return port_error;
9546 }
9547
9548 /**
9549 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9550 * @phba: pointer to lpfc hba data structure.
9551 * @if_type: The SLI4 interface type getting configured.
9552 *
9553 * This routine is invoked to set up SLI4 BAR0 PCI config space register
9554 * memory map.
9555 **/
9556 static void
lpfc_sli4_bar0_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9557 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9558 {
9559 switch (if_type) {
9560 case LPFC_SLI_INTF_IF_TYPE_0:
9561 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9562 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9563 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9564 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9565 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9566 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9567 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9568 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9569 phba->sli4_hba.SLIINTFregaddr =
9570 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9571 break;
9572 case LPFC_SLI_INTF_IF_TYPE_2:
9573 phba->sli4_hba.u.if_type2.EQDregaddr =
9574 phba->sli4_hba.conf_regs_memmap_p +
9575 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9576 phba->sli4_hba.u.if_type2.ERR1regaddr =
9577 phba->sli4_hba.conf_regs_memmap_p +
9578 LPFC_CTL_PORT_ER1_OFFSET;
9579 phba->sli4_hba.u.if_type2.ERR2regaddr =
9580 phba->sli4_hba.conf_regs_memmap_p +
9581 LPFC_CTL_PORT_ER2_OFFSET;
9582 phba->sli4_hba.u.if_type2.CTRLregaddr =
9583 phba->sli4_hba.conf_regs_memmap_p +
9584 LPFC_CTL_PORT_CTL_OFFSET;
9585 phba->sli4_hba.u.if_type2.STATUSregaddr =
9586 phba->sli4_hba.conf_regs_memmap_p +
9587 LPFC_CTL_PORT_STA_OFFSET;
9588 phba->sli4_hba.SLIINTFregaddr =
9589 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9590 phba->sli4_hba.PSMPHRregaddr =
9591 phba->sli4_hba.conf_regs_memmap_p +
9592 LPFC_CTL_PORT_SEM_OFFSET;
9593 phba->sli4_hba.RQDBregaddr =
9594 phba->sli4_hba.conf_regs_memmap_p +
9595 LPFC_ULP0_RQ_DOORBELL;
9596 phba->sli4_hba.WQDBregaddr =
9597 phba->sli4_hba.conf_regs_memmap_p +
9598 LPFC_ULP0_WQ_DOORBELL;
9599 phba->sli4_hba.CQDBregaddr =
9600 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9601 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9602 phba->sli4_hba.MQDBregaddr =
9603 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9604 phba->sli4_hba.BMBXregaddr =
9605 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9606 break;
9607 case LPFC_SLI_INTF_IF_TYPE_6:
9608 phba->sli4_hba.u.if_type2.EQDregaddr =
9609 phba->sli4_hba.conf_regs_memmap_p +
9610 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9611 phba->sli4_hba.u.if_type2.ERR1regaddr =
9612 phba->sli4_hba.conf_regs_memmap_p +
9613 LPFC_CTL_PORT_ER1_OFFSET;
9614 phba->sli4_hba.u.if_type2.ERR2regaddr =
9615 phba->sli4_hba.conf_regs_memmap_p +
9616 LPFC_CTL_PORT_ER2_OFFSET;
9617 phba->sli4_hba.u.if_type2.CTRLregaddr =
9618 phba->sli4_hba.conf_regs_memmap_p +
9619 LPFC_CTL_PORT_CTL_OFFSET;
9620 phba->sli4_hba.u.if_type2.STATUSregaddr =
9621 phba->sli4_hba.conf_regs_memmap_p +
9622 LPFC_CTL_PORT_STA_OFFSET;
9623 phba->sli4_hba.PSMPHRregaddr =
9624 phba->sli4_hba.conf_regs_memmap_p +
9625 LPFC_CTL_PORT_SEM_OFFSET;
9626 phba->sli4_hba.BMBXregaddr =
9627 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9628 break;
9629 case LPFC_SLI_INTF_IF_TYPE_1:
9630 default:
9631 dev_printk(KERN_ERR, &phba->pcidev->dev,
9632 "FATAL - unsupported SLI4 interface type - %d\n",
9633 if_type);
9634 break;
9635 }
9636 }
9637
9638 /**
9639 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9640 * @phba: pointer to lpfc hba data structure.
9641 * @if_type: sli if type to operate on.
9642 *
9643 * This routine is invoked to set up SLI4 BAR1 register memory map.
9644 **/
9645 static void
lpfc_sli4_bar1_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9646 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9647 {
9648 switch (if_type) {
9649 case LPFC_SLI_INTF_IF_TYPE_0:
9650 phba->sli4_hba.PSMPHRregaddr =
9651 phba->sli4_hba.ctrl_regs_memmap_p +
9652 LPFC_SLIPORT_IF0_SMPHR;
9653 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9654 LPFC_HST_ISR0;
9655 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9656 LPFC_HST_IMR0;
9657 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9658 LPFC_HST_ISCR0;
9659 break;
9660 case LPFC_SLI_INTF_IF_TYPE_6:
9661 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9662 LPFC_IF6_RQ_DOORBELL;
9663 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9664 LPFC_IF6_WQ_DOORBELL;
9665 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9666 LPFC_IF6_CQ_DOORBELL;
9667 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9668 LPFC_IF6_EQ_DOORBELL;
9669 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9670 LPFC_IF6_MQ_DOORBELL;
9671 break;
9672 case LPFC_SLI_INTF_IF_TYPE_2:
9673 case LPFC_SLI_INTF_IF_TYPE_1:
9674 default:
9675 dev_err(&phba->pcidev->dev,
9676 "FATAL - unsupported SLI4 interface type - %d\n",
9677 if_type);
9678 break;
9679 }
9680 }
9681
9682 /**
9683 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9684 * @phba: pointer to lpfc hba data structure.
9685 * @vf: virtual function number
9686 *
9687 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9688 * based on the given viftual function number, @vf.
9689 *
9690 * Return 0 if successful, otherwise -ENODEV.
9691 **/
9692 static int
lpfc_sli4_bar2_register_memmap(struct lpfc_hba * phba,uint32_t vf)9693 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9694 {
9695 if (vf > LPFC_VIR_FUNC_MAX)
9696 return -ENODEV;
9697
9698 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9699 vf * LPFC_VFR_PAGE_SIZE +
9700 LPFC_ULP0_RQ_DOORBELL);
9701 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9702 vf * LPFC_VFR_PAGE_SIZE +
9703 LPFC_ULP0_WQ_DOORBELL);
9704 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9705 vf * LPFC_VFR_PAGE_SIZE +
9706 LPFC_EQCQ_DOORBELL);
9707 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9708 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9709 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9710 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9711 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9712 return 0;
9713 }
9714
9715 /**
9716 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9717 * @phba: pointer to lpfc hba data structure.
9718 *
9719 * This routine is invoked to create the bootstrap mailbox
9720 * region consistent with the SLI-4 interface spec. This
9721 * routine allocates all memory necessary to communicate
9722 * mailbox commands to the port and sets up all alignment
9723 * needs. No locks are expected to be held when calling
9724 * this routine.
9725 *
9726 * Return codes
9727 * 0 - successful
9728 * -ENOMEM - could not allocated memory.
9729 **/
9730 static int
lpfc_create_bootstrap_mbox(struct lpfc_hba * phba)9731 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9732 {
9733 uint32_t bmbx_size;
9734 struct lpfc_dmabuf *dmabuf;
9735 struct dma_address *dma_address;
9736 uint32_t pa_addr;
9737 uint64_t phys_addr;
9738
9739 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
9740 if (!dmabuf)
9741 return -ENOMEM;
9742
9743 /*
9744 * The bootstrap mailbox region is comprised of 2 parts
9745 * plus an alignment restriction of 16 bytes.
9746 */
9747 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9748 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9749 &dmabuf->phys, GFP_KERNEL);
9750 if (!dmabuf->virt) {
9751 kfree(dmabuf);
9752 return -ENOMEM;
9753 }
9754
9755 /*
9756 * Initialize the bootstrap mailbox pointers now so that the register
9757 * operations are simple later. The mailbox dma address is required
9758 * to be 16-byte aligned. Also align the virtual memory as each
9759 * maibox is copied into the bmbx mailbox region before issuing the
9760 * command to the port.
9761 */
9762 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9763 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9764
9765 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9766 LPFC_ALIGN_16_BYTE);
9767 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9768 LPFC_ALIGN_16_BYTE);
9769
9770 /*
9771 * Set the high and low physical addresses now. The SLI4 alignment
9772 * requirement is 16 bytes and the mailbox is posted to the port
9773 * as two 30-bit addresses. The other data is a bit marking whether
9774 * the 30-bit address is the high or low address.
9775 * Upcast bmbx aphys to 64bits so shift instruction compiles
9776 * clean on 32 bit machines.
9777 */
9778 dma_address = &phba->sli4_hba.bmbx.dma_address;
9779 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9780 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9781 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9782 LPFC_BMBX_BIT1_ADDR_HI);
9783
9784 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9785 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9786 LPFC_BMBX_BIT1_ADDR_LO);
9787 return 0;
9788 }
9789
9790 /**
9791 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9792 * @phba: pointer to lpfc hba data structure.
9793 *
9794 * This routine is invoked to teardown the bootstrap mailbox
9795 * region and release all host resources. This routine requires
9796 * the caller to ensure all mailbox commands recovered, no
9797 * additional mailbox comands are sent, and interrupts are disabled
9798 * before calling this routine.
9799 *
9800 **/
9801 static void
lpfc_destroy_bootstrap_mbox(struct lpfc_hba * phba)9802 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9803 {
9804 dma_free_coherent(&phba->pcidev->dev,
9805 phba->sli4_hba.bmbx.bmbx_size,
9806 phba->sli4_hba.bmbx.dmabuf->virt,
9807 phba->sli4_hba.bmbx.dmabuf->phys);
9808
9809 kfree(phba->sli4_hba.bmbx.dmabuf);
9810 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9811 }
9812
9813 static const char * const lpfc_topo_to_str[] = {
9814 "Loop then P2P",
9815 "Loopback",
9816 "P2P Only",
9817 "Unsupported",
9818 "Loop Only",
9819 "Unsupported",
9820 "P2P then Loop",
9821 };
9822
9823 #define LINK_FLAGS_DEF 0x0
9824 #define LINK_FLAGS_P2P 0x1
9825 #define LINK_FLAGS_LOOP 0x2
9826 /**
9827 * lpfc_map_topology - Map the topology read from READ_CONFIG
9828 * @phba: pointer to lpfc hba data structure.
9829 * @rd_config: pointer to read config data
9830 *
9831 * This routine is invoked to map the topology values as read
9832 * from the read config mailbox command. If the persistent
9833 * topology feature is supported, the firmware will provide the
9834 * saved topology information to be used in INIT_LINK
9835 **/
9836 static void
lpfc_map_topology(struct lpfc_hba * phba,struct lpfc_mbx_read_config * rd_config)9837 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9838 {
9839 u8 ptv, tf, pt;
9840
9841 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9842 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9843 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9844
9845 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9846 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9847 ptv, tf, pt);
9848 if (!ptv) {
9849 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9850 "2019 FW does not support persistent topology "
9851 "Using driver parameter defined value [%s]",
9852 lpfc_topo_to_str[phba->cfg_topology]);
9853 return;
9854 }
9855 /* FW supports persistent topology - override module parameter value */
9856 set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9857
9858 /* if ASIC_GEN_NUM >= 0xC) */
9859 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9860 LPFC_SLI_INTF_IF_TYPE_6) ||
9861 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9862 LPFC_SLI_INTF_FAMILY_G6)) {
9863 if (!tf)
9864 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9865 ? FLAGS_TOPOLOGY_MODE_LOOP
9866 : FLAGS_TOPOLOGY_MODE_PT_PT);
9867 else
9868 clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9869 } else { /* G5 */
9870 if (tf)
9871 /* If topology failover set - pt is '0' or '1' */
9872 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9873 FLAGS_TOPOLOGY_MODE_LOOP_PT);
9874 else
9875 phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9876 ? FLAGS_TOPOLOGY_MODE_PT_PT
9877 : FLAGS_TOPOLOGY_MODE_LOOP);
9878 }
9879 if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag))
9880 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9881 "2020 Using persistent topology value [%s]",
9882 lpfc_topo_to_str[phba->cfg_topology]);
9883 else
9884 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9885 "2021 Invalid topology values from FW "
9886 "Using driver parameter defined value [%s]",
9887 lpfc_topo_to_str[phba->cfg_topology]);
9888 }
9889
9890 /**
9891 * lpfc_sli4_read_config - Get the config parameters.
9892 * @phba: pointer to lpfc hba data structure.
9893 *
9894 * This routine is invoked to read the configuration parameters from the HBA.
9895 * The configuration parameters are used to set the base and maximum values
9896 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9897 * allocation for the port.
9898 *
9899 * Return codes
9900 * 0 - successful
9901 * -ENOMEM - No available memory
9902 * -EIO - The mailbox failed to complete successfully.
9903 **/
9904 int
lpfc_sli4_read_config(struct lpfc_hba * phba)9905 lpfc_sli4_read_config(struct lpfc_hba *phba)
9906 {
9907 LPFC_MBOXQ_t *pmb;
9908 struct lpfc_mbx_read_config *rd_config;
9909 union lpfc_sli4_cfg_shdr *shdr;
9910 uint32_t shdr_status, shdr_add_status;
9911 struct lpfc_mbx_get_func_cfg *get_func_cfg;
9912 struct lpfc_rsrc_desc_fcfcoe *desc;
9913 char *pdesc_0;
9914 uint16_t forced_link_speed;
9915 uint32_t if_type, qmin, fawwpn;
9916 int length, i, rc = 0, rc2;
9917
9918 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9919 if (!pmb) {
9920 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9921 "2011 Unable to allocate memory for issuing "
9922 "SLI_CONFIG_SPECIAL mailbox command\n");
9923 return -ENOMEM;
9924 }
9925
9926 lpfc_read_config(phba, pmb);
9927
9928 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9929 if (rc != MBX_SUCCESS) {
9930 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9931 "2012 Mailbox failed , mbxCmd x%x "
9932 "READ_CONFIG, mbxStatus x%x\n",
9933 bf_get(lpfc_mqe_command, &pmb->u.mqe),
9934 bf_get(lpfc_mqe_status, &pmb->u.mqe));
9935 rc = -EIO;
9936 } else {
9937 rd_config = &pmb->u.mqe.un.rd_config;
9938 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9939 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9940 phba->sli4_hba.lnk_info.lnk_tp =
9941 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9942 phba->sli4_hba.lnk_info.lnk_no =
9943 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9944 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9945 "3081 lnk_type:%d, lnk_numb:%d\n",
9946 phba->sli4_hba.lnk_info.lnk_tp,
9947 phba->sli4_hba.lnk_info.lnk_no);
9948 } else
9949 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9950 "3082 Mailbox (x%x) returned ldv:x0\n",
9951 bf_get(lpfc_mqe_command, &pmb->u.mqe));
9952 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9953 phba->bbcredit_support = 1;
9954 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9955 }
9956
9957 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9958
9959 if (fawwpn) {
9960 lpfc_printf_log(phba, KERN_INFO,
9961 LOG_INIT | LOG_DISCOVERY,
9962 "2702 READ_CONFIG: FA-PWWN is "
9963 "configured on\n");
9964 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9965 } else {
9966 /* Clear FW configured flag, preserve driver flag */
9967 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9968 }
9969
9970 phba->sli4_hba.conf_trunk =
9971 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9972 phba->sli4_hba.extents_in_use =
9973 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9974
9975 phba->sli4_hba.max_cfg_param.max_xri =
9976 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9977 /* Reduce resource usage in kdump environment */
9978 if (is_kdump_kernel() &&
9979 phba->sli4_hba.max_cfg_param.max_xri > 512)
9980 phba->sli4_hba.max_cfg_param.max_xri = 512;
9981 phba->sli4_hba.max_cfg_param.xri_base =
9982 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9983 phba->sli4_hba.max_cfg_param.max_vpi =
9984 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9985 /* Limit the max we support */
9986 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9987 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9988 phba->sli4_hba.max_cfg_param.vpi_base =
9989 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9990 phba->sli4_hba.max_cfg_param.max_rpi =
9991 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9992 phba->sli4_hba.max_cfg_param.rpi_base =
9993 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9994 phba->sli4_hba.max_cfg_param.max_vfi =
9995 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
9996 phba->sli4_hba.max_cfg_param.vfi_base =
9997 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
9998 phba->sli4_hba.max_cfg_param.max_fcfi =
9999 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
10000 phba->sli4_hba.max_cfg_param.max_eq =
10001 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
10002 phba->sli4_hba.max_cfg_param.max_rq =
10003 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
10004 phba->sli4_hba.max_cfg_param.max_wq =
10005 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
10006 phba->sli4_hba.max_cfg_param.max_cq =
10007 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
10008 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
10009 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
10010 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
10011 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
10012 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
10013 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
10014 phba->max_vports = phba->max_vpi;
10015
10016 /* Next decide on FPIN or Signal E2E CGN support
10017 * For congestion alarms and warnings valid combination are:
10018 * 1. FPIN alarms / FPIN warnings
10019 * 2. Signal alarms / Signal warnings
10020 * 3. FPIN alarms / Signal warnings
10021 * 4. Signal alarms / FPIN warnings
10022 *
10023 * Initialize the adapter frequency to 100 mSecs
10024 */
10025 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10026 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10027 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10028
10029 if (lpfc_use_cgn_signal) {
10030 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10031 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10032 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10033 }
10034 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10035 /* MUST support both alarm and warning
10036 * because EDC does not support alarm alone.
10037 */
10038 if (phba->cgn_reg_signal !=
10039 EDC_CG_SIG_WARN_ONLY) {
10040 /* Must support both or none */
10041 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10042 phba->cgn_reg_signal =
10043 EDC_CG_SIG_NOTSUPPORTED;
10044 } else {
10045 phba->cgn_reg_signal =
10046 EDC_CG_SIG_WARN_ALARM;
10047 phba->cgn_reg_fpin =
10048 LPFC_CGN_FPIN_NONE;
10049 }
10050 }
10051 }
10052
10053 /* Set the congestion initial signal and fpin values. */
10054 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10055 phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10056
10057 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10058 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10059 phba->cgn_reg_signal, phba->cgn_reg_fpin);
10060
10061 lpfc_map_topology(phba, rd_config);
10062 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10063 "2003 cfg params Extents? %d "
10064 "XRI(B:%d M:%d), "
10065 "VPI(B:%d M:%d) "
10066 "VFI(B:%d M:%d) "
10067 "RPI(B:%d M:%d) "
10068 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10069 phba->sli4_hba.extents_in_use,
10070 phba->sli4_hba.max_cfg_param.xri_base,
10071 phba->sli4_hba.max_cfg_param.max_xri,
10072 phba->sli4_hba.max_cfg_param.vpi_base,
10073 phba->sli4_hba.max_cfg_param.max_vpi,
10074 phba->sli4_hba.max_cfg_param.vfi_base,
10075 phba->sli4_hba.max_cfg_param.max_vfi,
10076 phba->sli4_hba.max_cfg_param.rpi_base,
10077 phba->sli4_hba.max_cfg_param.max_rpi,
10078 phba->sli4_hba.max_cfg_param.max_fcfi,
10079 phba->sli4_hba.max_cfg_param.max_eq,
10080 phba->sli4_hba.max_cfg_param.max_cq,
10081 phba->sli4_hba.max_cfg_param.max_wq,
10082 phba->sli4_hba.max_cfg_param.max_rq,
10083 phba->lmt);
10084
10085 /*
10086 * Calculate queue resources based on how
10087 * many WQ/CQ/EQs are available.
10088 */
10089 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10090 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10091 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10092 /*
10093 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and
10094 * the remainder can be used for NVME / FCP.
10095 */
10096 qmin -= 4;
10097 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10098 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10099
10100 /* Check to see if there is enough for default cfg */
10101 if ((phba->cfg_irq_chann > qmin) ||
10102 (phba->cfg_hdw_queue > qmin)) {
10103 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10104 "2005 Reducing Queues - "
10105 "FW resource limitation: "
10106 "WQ %d CQ %d EQ %d: min %d: "
10107 "IRQ %d HDWQ %d\n",
10108 phba->sli4_hba.max_cfg_param.max_wq,
10109 phba->sli4_hba.max_cfg_param.max_cq,
10110 phba->sli4_hba.max_cfg_param.max_eq,
10111 qmin, phba->cfg_irq_chann,
10112 phba->cfg_hdw_queue);
10113
10114 if (phba->cfg_irq_chann > qmin)
10115 phba->cfg_irq_chann = qmin;
10116 if (phba->cfg_hdw_queue > qmin)
10117 phba->cfg_hdw_queue = qmin;
10118 }
10119 }
10120
10121 if (rc)
10122 goto read_cfg_out;
10123
10124 /* Update link speed if forced link speed is supported */
10125 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10126 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10127 forced_link_speed =
10128 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10129 if (forced_link_speed) {
10130 set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag);
10131
10132 switch (forced_link_speed) {
10133 case LINK_SPEED_1G:
10134 phba->cfg_link_speed =
10135 LPFC_USER_LINK_SPEED_1G;
10136 break;
10137 case LINK_SPEED_2G:
10138 phba->cfg_link_speed =
10139 LPFC_USER_LINK_SPEED_2G;
10140 break;
10141 case LINK_SPEED_4G:
10142 phba->cfg_link_speed =
10143 LPFC_USER_LINK_SPEED_4G;
10144 break;
10145 case LINK_SPEED_8G:
10146 phba->cfg_link_speed =
10147 LPFC_USER_LINK_SPEED_8G;
10148 break;
10149 case LINK_SPEED_10G:
10150 phba->cfg_link_speed =
10151 LPFC_USER_LINK_SPEED_10G;
10152 break;
10153 case LINK_SPEED_16G:
10154 phba->cfg_link_speed =
10155 LPFC_USER_LINK_SPEED_16G;
10156 break;
10157 case LINK_SPEED_32G:
10158 phba->cfg_link_speed =
10159 LPFC_USER_LINK_SPEED_32G;
10160 break;
10161 case LINK_SPEED_64G:
10162 phba->cfg_link_speed =
10163 LPFC_USER_LINK_SPEED_64G;
10164 break;
10165 case 0xffff:
10166 phba->cfg_link_speed =
10167 LPFC_USER_LINK_SPEED_AUTO;
10168 break;
10169 default:
10170 lpfc_printf_log(phba, KERN_ERR,
10171 LOG_TRACE_EVENT,
10172 "0047 Unrecognized link "
10173 "speed : %d\n",
10174 forced_link_speed);
10175 phba->cfg_link_speed =
10176 LPFC_USER_LINK_SPEED_AUTO;
10177 }
10178 }
10179 }
10180
10181 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
10182 length = phba->sli4_hba.max_cfg_param.max_xri -
10183 lpfc_sli4_get_els_iocb_cnt(phba);
10184 if (phba->cfg_hba_queue_depth > length) {
10185 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10186 "3361 HBA queue depth changed from %d to %d\n",
10187 phba->cfg_hba_queue_depth, length);
10188 phba->cfg_hba_queue_depth = length;
10189 }
10190
10191 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10192 LPFC_SLI_INTF_IF_TYPE_2)
10193 goto read_cfg_out;
10194
10195 /* get the pf# and vf# for SLI4 if_type 2 port */
10196 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10197 sizeof(struct lpfc_sli4_cfg_mhdr));
10198 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10199 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10200 length, LPFC_SLI4_MBX_EMBED);
10201
10202 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10203 shdr = (union lpfc_sli4_cfg_shdr *)
10204 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10205 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10206 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10207 if (rc2 || shdr_status || shdr_add_status) {
10208 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10209 "3026 Mailbox failed , mbxCmd x%x "
10210 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10211 bf_get(lpfc_mqe_command, &pmb->u.mqe),
10212 bf_get(lpfc_mqe_status, &pmb->u.mqe));
10213 goto read_cfg_out;
10214 }
10215
10216 /* search for fc_fcoe resrouce descriptor */
10217 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10218
10219 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10220 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10221 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10222 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10223 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10224 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10225 goto read_cfg_out;
10226
10227 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10228 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10229 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10230 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10231 phba->sli4_hba.iov.pf_number =
10232 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10233 phba->sli4_hba.iov.vf_number =
10234 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10235 break;
10236 }
10237 }
10238
10239 if (i < LPFC_RSRC_DESC_MAX_NUM)
10240 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10241 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10242 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10243 phba->sli4_hba.iov.vf_number);
10244 else
10245 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10246 "3028 GET_FUNCTION_CONFIG: failed to find "
10247 "Resource Descriptor:x%x\n",
10248 LPFC_RSRC_DESC_TYPE_FCFCOE);
10249
10250 read_cfg_out:
10251 mempool_free(pmb, phba->mbox_mem_pool);
10252 return rc;
10253 }
10254
10255 /**
10256 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10257 * @phba: pointer to lpfc hba data structure.
10258 *
10259 * This routine is invoked to setup the port-side endian order when
10260 * the port if_type is 0. This routine has no function for other
10261 * if_types.
10262 *
10263 * Return codes
10264 * 0 - successful
10265 * -ENOMEM - No available memory
10266 * -EIO - The mailbox failed to complete successfully.
10267 **/
10268 static int
lpfc_setup_endian_order(struct lpfc_hba * phba)10269 lpfc_setup_endian_order(struct lpfc_hba *phba)
10270 {
10271 LPFC_MBOXQ_t *mboxq;
10272 uint32_t if_type, rc = 0;
10273 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10274 HOST_ENDIAN_HIGH_WORD1};
10275
10276 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10277 switch (if_type) {
10278 case LPFC_SLI_INTF_IF_TYPE_0:
10279 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10280 GFP_KERNEL);
10281 if (!mboxq) {
10282 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10283 "0492 Unable to allocate memory for "
10284 "issuing SLI_CONFIG_SPECIAL mailbox "
10285 "command\n");
10286 return -ENOMEM;
10287 }
10288
10289 /*
10290 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10291 * two words to contain special data values and no other data.
10292 */
10293 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10294 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10295 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10296 if (rc != MBX_SUCCESS) {
10297 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10298 "0493 SLI_CONFIG_SPECIAL mailbox "
10299 "failed with status x%x\n",
10300 rc);
10301 rc = -EIO;
10302 }
10303 mempool_free(mboxq, phba->mbox_mem_pool);
10304 break;
10305 case LPFC_SLI_INTF_IF_TYPE_6:
10306 case LPFC_SLI_INTF_IF_TYPE_2:
10307 case LPFC_SLI_INTF_IF_TYPE_1:
10308 default:
10309 break;
10310 }
10311 return rc;
10312 }
10313
10314 /**
10315 * lpfc_sli4_queue_verify - Verify and update EQ counts
10316 * @phba: pointer to lpfc hba data structure.
10317 *
10318 * This routine is invoked to check the user settable queue counts for EQs.
10319 * After this routine is called the counts will be set to valid values that
10320 * adhere to the constraints of the system's interrupt vectors and the port's
10321 * queue resources.
10322 *
10323 * Return codes
10324 * 0 - successful
10325 * -ENOMEM - No available memory
10326 **/
10327 static int
lpfc_sli4_queue_verify(struct lpfc_hba * phba)10328 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10329 {
10330 /*
10331 * Sanity check for configured queue parameters against the run-time
10332 * device parameters
10333 */
10334
10335 if (phba->nvmet_support) {
10336 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10337 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10338 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10339 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10340 }
10341
10342 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10343 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10344 phba->cfg_hdw_queue, phba->cfg_irq_chann,
10345 phba->cfg_nvmet_mrq);
10346
10347 /* Get EQ depth from module parameter, fake the default for now */
10348 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10349 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10350
10351 /* Get CQ depth from module parameter, fake the default for now */
10352 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10353 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10354 return 0;
10355 }
10356
10357 static int
lpfc_alloc_io_wq_cq(struct lpfc_hba * phba,int idx)10358 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10359 {
10360 struct lpfc_queue *qdesc;
10361 u32 wqesize;
10362 int cpu;
10363
10364 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10365 /* Create Fast Path IO CQs */
10366 if (phba->enab_exp_wqcq_pages)
10367 /* Increase the CQ size when WQEs contain an embedded cdb */
10368 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10369 phba->sli4_hba.cq_esize,
10370 LPFC_CQE_EXP_COUNT, cpu);
10371
10372 else
10373 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10374 phba->sli4_hba.cq_esize,
10375 phba->sli4_hba.cq_ecount, cpu);
10376 if (!qdesc) {
10377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10378 "0499 Failed allocate fast-path IO CQ (%d)\n",
10379 idx);
10380 return 1;
10381 }
10382 qdesc->qe_valid = 1;
10383 qdesc->hdwq = idx;
10384 qdesc->chann = cpu;
10385 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10386
10387 /* Create Fast Path IO WQs */
10388 if (phba->enab_exp_wqcq_pages) {
10389 /* Increase the WQ size when WQEs contain an embedded cdb */
10390 wqesize = (phba->fcp_embed_io) ?
10391 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10392 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10393 wqesize,
10394 LPFC_WQE_EXP_COUNT, cpu);
10395 } else
10396 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10397 phba->sli4_hba.wq_esize,
10398 phba->sli4_hba.wq_ecount, cpu);
10399
10400 if (!qdesc) {
10401 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10402 "0503 Failed allocate fast-path IO WQ (%d)\n",
10403 idx);
10404 return 1;
10405 }
10406 qdesc->hdwq = idx;
10407 qdesc->chann = cpu;
10408 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10409 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10410 return 0;
10411 }
10412
10413 /**
10414 * lpfc_sli4_queue_create - Create all the SLI4 queues
10415 * @phba: pointer to lpfc hba data structure.
10416 *
10417 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10418 * operation. For each SLI4 queue type, the parameters such as queue entry
10419 * count (queue depth) shall be taken from the module parameter. For now,
10420 * we just use some constant number as place holder.
10421 *
10422 * Return codes
10423 * 0 - successful
10424 * -ENOMEM - No availble memory
10425 * -EIO - The mailbox failed to complete successfully.
10426 **/
10427 int
lpfc_sli4_queue_create(struct lpfc_hba * phba)10428 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10429 {
10430 struct lpfc_queue *qdesc;
10431 int idx, cpu, eqcpu;
10432 struct lpfc_sli4_hdw_queue *qp;
10433 struct lpfc_vector_map_info *cpup;
10434 struct lpfc_vector_map_info *eqcpup;
10435 struct lpfc_eq_intr_info *eqi;
10436 u32 wqesize;
10437
10438 /*
10439 * Create HBA Record arrays.
10440 * Both NVME and FCP will share that same vectors / EQs
10441 */
10442 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10443 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10444 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10445 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10446 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10447 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10448 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10449 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10450 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10451 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10452
10453 if (!phba->sli4_hba.hdwq) {
10454 phba->sli4_hba.hdwq = kcalloc(
10455 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
10456 GFP_KERNEL);
10457 if (!phba->sli4_hba.hdwq) {
10458 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10459 "6427 Failed allocate memory for "
10460 "fast-path Hardware Queue array\n");
10461 goto out_error;
10462 }
10463 /* Prepare hardware queues to take IO buffers */
10464 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10465 qp = &phba->sli4_hba.hdwq[idx];
10466 spin_lock_init(&qp->io_buf_list_get_lock);
10467 spin_lock_init(&qp->io_buf_list_put_lock);
10468 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10469 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10470 qp->get_io_bufs = 0;
10471 qp->put_io_bufs = 0;
10472 qp->total_io_bufs = 0;
10473 spin_lock_init(&qp->abts_io_buf_list_lock);
10474 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10475 qp->abts_scsi_io_bufs = 0;
10476 qp->abts_nvme_io_bufs = 0;
10477 INIT_LIST_HEAD(&qp->sgl_list);
10478 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10479 spin_lock_init(&qp->hdwq_lock);
10480 }
10481 }
10482
10483 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10484 if (phba->nvmet_support) {
10485 phba->sli4_hba.nvmet_cqset = kcalloc(
10486 phba->cfg_nvmet_mrq,
10487 sizeof(struct lpfc_queue *),
10488 GFP_KERNEL);
10489 if (!phba->sli4_hba.nvmet_cqset) {
10490 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10491 "3121 Fail allocate memory for "
10492 "fast-path CQ set array\n");
10493 goto out_error;
10494 }
10495 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
10496 phba->cfg_nvmet_mrq,
10497 sizeof(struct lpfc_queue *),
10498 GFP_KERNEL);
10499 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10500 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10501 "3122 Fail allocate memory for "
10502 "fast-path RQ set hdr array\n");
10503 goto out_error;
10504 }
10505 phba->sli4_hba.nvmet_mrq_data = kcalloc(
10506 phba->cfg_nvmet_mrq,
10507 sizeof(struct lpfc_queue *),
10508 GFP_KERNEL);
10509 if (!phba->sli4_hba.nvmet_mrq_data) {
10510 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10511 "3124 Fail allocate memory for "
10512 "fast-path RQ set data array\n");
10513 goto out_error;
10514 }
10515 }
10516 }
10517
10518 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10519
10520 /* Create HBA Event Queues (EQs) */
10521 for_each_present_cpu(cpu) {
10522 /* We only want to create 1 EQ per vector, even though
10523 * multiple CPUs might be using that vector. so only
10524 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10525 */
10526 cpup = &phba->sli4_hba.cpu_map[cpu];
10527 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10528 continue;
10529
10530 /* Get a ptr to the Hardware Queue associated with this CPU */
10531 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10532
10533 /* Allocate an EQ */
10534 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10535 phba->sli4_hba.eq_esize,
10536 phba->sli4_hba.eq_ecount, cpu);
10537 if (!qdesc) {
10538 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10539 "0497 Failed allocate EQ (%d)\n",
10540 cpup->hdwq);
10541 goto out_error;
10542 }
10543 qdesc->qe_valid = 1;
10544 qdesc->hdwq = cpup->hdwq;
10545 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10546 qdesc->last_cpu = qdesc->chann;
10547
10548 /* Save the allocated EQ in the Hardware Queue */
10549 qp->hba_eq = qdesc;
10550
10551 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10552 list_add(&qdesc->cpu_list, &eqi->list);
10553 }
10554
10555 /* Now we need to populate the other Hardware Queues, that share
10556 * an IRQ vector, with the associated EQ ptr.
10557 */
10558 for_each_present_cpu(cpu) {
10559 cpup = &phba->sli4_hba.cpu_map[cpu];
10560
10561 /* Check for EQ already allocated in previous loop */
10562 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10563 continue;
10564
10565 /* Check for multiple CPUs per hdwq */
10566 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10567 if (qp->hba_eq)
10568 continue;
10569
10570 /* We need to share an EQ for this hdwq */
10571 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10572 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10573 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10574 }
10575
10576 /* Allocate IO Path SLI4 CQ/WQs */
10577 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10578 if (lpfc_alloc_io_wq_cq(phba, idx))
10579 goto out_error;
10580 }
10581
10582 if (phba->nvmet_support) {
10583 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10584 cpu = lpfc_find_cpu_handle(phba, idx,
10585 LPFC_FIND_BY_HDWQ);
10586 qdesc = lpfc_sli4_queue_alloc(phba,
10587 LPFC_DEFAULT_PAGE_SIZE,
10588 phba->sli4_hba.cq_esize,
10589 phba->sli4_hba.cq_ecount,
10590 cpu);
10591 if (!qdesc) {
10592 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10593 "3142 Failed allocate NVME "
10594 "CQ Set (%d)\n", idx);
10595 goto out_error;
10596 }
10597 qdesc->qe_valid = 1;
10598 qdesc->hdwq = idx;
10599 qdesc->chann = cpu;
10600 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10601 }
10602 }
10603
10604 /*
10605 * Create Slow Path Completion Queues (CQs)
10606 */
10607
10608 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10609 /* Create slow-path Mailbox Command Complete Queue */
10610 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10611 phba->sli4_hba.cq_esize,
10612 phba->sli4_hba.cq_ecount, cpu);
10613 if (!qdesc) {
10614 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10615 "0500 Failed allocate slow-path mailbox CQ\n");
10616 goto out_error;
10617 }
10618 qdesc->qe_valid = 1;
10619 phba->sli4_hba.mbx_cq = qdesc;
10620
10621 /* Create slow-path ELS Complete Queue */
10622 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10623 phba->sli4_hba.cq_esize,
10624 phba->sli4_hba.cq_ecount, cpu);
10625 if (!qdesc) {
10626 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10627 "0501 Failed allocate slow-path ELS CQ\n");
10628 goto out_error;
10629 }
10630 qdesc->qe_valid = 1;
10631 qdesc->chann = cpu;
10632 phba->sli4_hba.els_cq = qdesc;
10633
10634
10635 /*
10636 * Create Slow Path Work Queues (WQs)
10637 */
10638
10639 /* Create Mailbox Command Queue */
10640
10641 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10642 phba->sli4_hba.mq_esize,
10643 phba->sli4_hba.mq_ecount, cpu);
10644 if (!qdesc) {
10645 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10646 "0505 Failed allocate slow-path MQ\n");
10647 goto out_error;
10648 }
10649 qdesc->chann = cpu;
10650 phba->sli4_hba.mbx_wq = qdesc;
10651
10652 /*
10653 * Create ELS Work Queues
10654 */
10655
10656 /*
10657 * Create slow-path ELS Work Queue.
10658 * Increase the ELS WQ size when WQEs contain an embedded cdb
10659 */
10660 wqesize = (phba->fcp_embed_io) ?
10661 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10662
10663 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10664 wqesize,
10665 phba->sli4_hba.wq_ecount, cpu);
10666 if (!qdesc) {
10667 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10668 "0504 Failed allocate slow-path ELS WQ\n");
10669 goto out_error;
10670 }
10671 qdesc->chann = cpu;
10672 phba->sli4_hba.els_wq = qdesc;
10673 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10674
10675 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10676 /* Create NVME LS Complete Queue */
10677 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10678 phba->sli4_hba.cq_esize,
10679 phba->sli4_hba.cq_ecount, cpu);
10680 if (!qdesc) {
10681 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10682 "6079 Failed allocate NVME LS CQ\n");
10683 goto out_error;
10684 }
10685 qdesc->chann = cpu;
10686 qdesc->qe_valid = 1;
10687 phba->sli4_hba.nvmels_cq = qdesc;
10688
10689 /* Create NVME LS Work Queue */
10690 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10691 phba->sli4_hba.wq_esize,
10692 phba->sli4_hba.wq_ecount, cpu);
10693 if (!qdesc) {
10694 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10695 "6080 Failed allocate NVME LS WQ\n");
10696 goto out_error;
10697 }
10698 qdesc->chann = cpu;
10699 phba->sli4_hba.nvmels_wq = qdesc;
10700 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10701 }
10702
10703 /*
10704 * Create Receive Queue (RQ)
10705 */
10706
10707 /* Create Receive Queue for header */
10708 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10709 phba->sli4_hba.rq_esize,
10710 phba->sli4_hba.rq_ecount, cpu);
10711 if (!qdesc) {
10712 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10713 "0506 Failed allocate receive HRQ\n");
10714 goto out_error;
10715 }
10716 phba->sli4_hba.hdr_rq = qdesc;
10717
10718 /* Create Receive Queue for data */
10719 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10720 phba->sli4_hba.rq_esize,
10721 phba->sli4_hba.rq_ecount, cpu);
10722 if (!qdesc) {
10723 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10724 "0507 Failed allocate receive DRQ\n");
10725 goto out_error;
10726 }
10727 phba->sli4_hba.dat_rq = qdesc;
10728
10729 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10730 phba->nvmet_support) {
10731 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10732 cpu = lpfc_find_cpu_handle(phba, idx,
10733 LPFC_FIND_BY_HDWQ);
10734 /* Create NVMET Receive Queue for header */
10735 qdesc = lpfc_sli4_queue_alloc(phba,
10736 LPFC_DEFAULT_PAGE_SIZE,
10737 phba->sli4_hba.rq_esize,
10738 LPFC_NVMET_RQE_DEF_COUNT,
10739 cpu);
10740 if (!qdesc) {
10741 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10742 "3146 Failed allocate "
10743 "receive HRQ\n");
10744 goto out_error;
10745 }
10746 qdesc->hdwq = idx;
10747 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10748
10749 /* Only needed for header of RQ pair */
10750 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10751 GFP_KERNEL,
10752 cpu_to_node(cpu));
10753 if (qdesc->rqbp == NULL) {
10754 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10755 "6131 Failed allocate "
10756 "Header RQBP\n");
10757 goto out_error;
10758 }
10759
10760 /* Put list in known state in case driver load fails. */
10761 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10762
10763 /* Create NVMET Receive Queue for data */
10764 qdesc = lpfc_sli4_queue_alloc(phba,
10765 LPFC_DEFAULT_PAGE_SIZE,
10766 phba->sli4_hba.rq_esize,
10767 LPFC_NVMET_RQE_DEF_COUNT,
10768 cpu);
10769 if (!qdesc) {
10770 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10771 "3156 Failed allocate "
10772 "receive DRQ\n");
10773 goto out_error;
10774 }
10775 qdesc->hdwq = idx;
10776 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10777 }
10778 }
10779
10780 /* Clear NVME stats */
10781 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10782 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10783 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10784 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10785 }
10786 }
10787
10788 /* Clear SCSI stats */
10789 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10790 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10791 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10792 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10793 }
10794 }
10795
10796 return 0;
10797
10798 out_error:
10799 lpfc_sli4_queue_destroy(phba);
10800 return -ENOMEM;
10801 }
10802
10803 static inline void
__lpfc_sli4_release_queue(struct lpfc_queue ** qp)10804 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10805 {
10806 if (*qp != NULL) {
10807 lpfc_sli4_queue_free(*qp);
10808 *qp = NULL;
10809 }
10810 }
10811
10812 static inline void
lpfc_sli4_release_queues(struct lpfc_queue *** qs,int max)10813 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10814 {
10815 int idx;
10816
10817 if (*qs == NULL)
10818 return;
10819
10820 for (idx = 0; idx < max; idx++)
10821 __lpfc_sli4_release_queue(&(*qs)[idx]);
10822
10823 kfree(*qs);
10824 *qs = NULL;
10825 }
10826
10827 static inline void
lpfc_sli4_release_hdwq(struct lpfc_hba * phba)10828 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10829 {
10830 struct lpfc_sli4_hdw_queue *hdwq;
10831 struct lpfc_queue *eq;
10832 uint32_t idx;
10833
10834 hdwq = phba->sli4_hba.hdwq;
10835
10836 /* Loop thru all Hardware Queues */
10837 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10838 /* Free the CQ/WQ corresponding to the Hardware Queue */
10839 lpfc_sli4_queue_free(hdwq[idx].io_cq);
10840 lpfc_sli4_queue_free(hdwq[idx].io_wq);
10841 hdwq[idx].hba_eq = NULL;
10842 hdwq[idx].io_cq = NULL;
10843 hdwq[idx].io_wq = NULL;
10844 if (phba->cfg_xpsgl && !phba->nvmet_support)
10845 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10846 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10847 }
10848 /* Loop thru all IRQ vectors */
10849 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10850 /* Free the EQ corresponding to the IRQ vector */
10851 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10852 lpfc_sli4_queue_free(eq);
10853 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10854 }
10855 }
10856
10857 /**
10858 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10859 * @phba: pointer to lpfc hba data structure.
10860 *
10861 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10862 * operation.
10863 *
10864 * Return codes
10865 * 0 - successful
10866 * -ENOMEM - No available memory
10867 * -EIO - The mailbox failed to complete successfully.
10868 **/
10869 void
lpfc_sli4_queue_destroy(struct lpfc_hba * phba)10870 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10871 {
10872 /*
10873 * Set FREE_INIT before beginning to free the queues.
10874 * Wait until the users of queues to acknowledge to
10875 * release queues by clearing FREE_WAIT.
10876 */
10877 spin_lock_irq(&phba->hbalock);
10878 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10879 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10880 spin_unlock_irq(&phba->hbalock);
10881 msleep(20);
10882 spin_lock_irq(&phba->hbalock);
10883 }
10884 spin_unlock_irq(&phba->hbalock);
10885
10886 lpfc_sli4_cleanup_poll_list(phba);
10887
10888 /* Release HBA eqs */
10889 if (phba->sli4_hba.hdwq)
10890 lpfc_sli4_release_hdwq(phba);
10891
10892 if (phba->nvmet_support) {
10893 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10894 phba->cfg_nvmet_mrq);
10895
10896 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10897 phba->cfg_nvmet_mrq);
10898 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10899 phba->cfg_nvmet_mrq);
10900 }
10901
10902 /* Release mailbox command work queue */
10903 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10904
10905 /* Release ELS work queue */
10906 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10907
10908 /* Release ELS work queue */
10909 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10910
10911 /* Release unsolicited receive queue */
10912 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10913 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10914
10915 /* Release ELS complete queue */
10916 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10917
10918 /* Release NVME LS complete queue */
10919 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10920
10921 /* Release mailbox command complete queue */
10922 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10923
10924 /* Everything on this list has been freed */
10925 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10926
10927 /* Done with freeing the queues */
10928 spin_lock_irq(&phba->hbalock);
10929 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10930 spin_unlock_irq(&phba->hbalock);
10931 }
10932
10933 int
lpfc_free_rq_buffer(struct lpfc_hba * phba,struct lpfc_queue * rq)10934 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10935 {
10936 struct lpfc_rqb *rqbp;
10937 struct lpfc_dmabuf *h_buf;
10938 struct rqb_dmabuf *rqb_buffer;
10939
10940 rqbp = rq->rqbp;
10941 while (!list_empty(&rqbp->rqb_buffer_list)) {
10942 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10943 struct lpfc_dmabuf, list);
10944
10945 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10946 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
10947 rqbp->buffer_count--;
10948 }
10949 return 1;
10950 }
10951
10952 static int
lpfc_create_wq_cq(struct lpfc_hba * phba,struct lpfc_queue * eq,struct lpfc_queue * cq,struct lpfc_queue * wq,uint16_t * cq_map,int qidx,uint32_t qtype)10953 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10954 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10955 int qidx, uint32_t qtype)
10956 {
10957 struct lpfc_sli_ring *pring;
10958 int rc;
10959
10960 if (!eq || !cq || !wq) {
10961 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10962 "6085 Fast-path %s (%d) not allocated\n",
10963 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10964 return -ENOMEM;
10965 }
10966
10967 /* create the Cq first */
10968 rc = lpfc_cq_create(phba, cq, eq,
10969 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10970 if (rc) {
10971 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10972 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
10973 qidx, (uint32_t)rc);
10974 return rc;
10975 }
10976
10977 if (qtype != LPFC_MBOX) {
10978 /* Setup cq_map for fast lookup */
10979 if (cq_map)
10980 *cq_map = cq->queue_id;
10981
10982 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10983 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10984 qidx, cq->queue_id, qidx, eq->queue_id);
10985
10986 /* create the wq */
10987 rc = lpfc_wq_create(phba, wq, cq, qtype);
10988 if (rc) {
10989 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10990 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10991 qidx, (uint32_t)rc);
10992 /* no need to tear down cq - caller will do so */
10993 return rc;
10994 }
10995
10996 /* Bind this CQ/WQ to the NVME ring */
10997 pring = wq->pring;
10998 pring->sli.sli4.wqp = (void *)wq;
10999 cq->pring = pring;
11000
11001 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11002 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
11003 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
11004 } else {
11005 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
11006 if (rc) {
11007 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11008 "0539 Failed setup of slow-path MQ: "
11009 "rc = 0x%x\n", rc);
11010 /* no need to tear down cq - caller will do so */
11011 return rc;
11012 }
11013
11014 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11015 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
11016 phba->sli4_hba.mbx_wq->queue_id,
11017 phba->sli4_hba.mbx_cq->queue_id);
11018 }
11019
11020 return 0;
11021 }
11022
11023 /**
11024 * lpfc_setup_cq_lookup - Setup the CQ lookup table
11025 * @phba: pointer to lpfc hba data structure.
11026 *
11027 * This routine will populate the cq_lookup table by all
11028 * available CQ queue_id's.
11029 **/
11030 static void
lpfc_setup_cq_lookup(struct lpfc_hba * phba)11031 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11032 {
11033 struct lpfc_queue *eq, *childq;
11034 int qidx;
11035
11036 memset(phba->sli4_hba.cq_lookup, 0,
11037 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11038 /* Loop thru all IRQ vectors */
11039 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11040 /* Get the EQ corresponding to the IRQ vector */
11041 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11042 if (!eq)
11043 continue;
11044 /* Loop through all CQs associated with that EQ */
11045 list_for_each_entry(childq, &eq->child_list, list) {
11046 if (childq->queue_id > phba->sli4_hba.cq_max)
11047 continue;
11048 if (childq->subtype == LPFC_IO)
11049 phba->sli4_hba.cq_lookup[childq->queue_id] =
11050 childq;
11051 }
11052 }
11053 }
11054
11055 /**
11056 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11057 * @phba: pointer to lpfc hba data structure.
11058 *
11059 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11060 * operation.
11061 *
11062 * Return codes
11063 * 0 - successful
11064 * -ENOMEM - No available memory
11065 * -EIO - The mailbox failed to complete successfully.
11066 **/
11067 int
lpfc_sli4_queue_setup(struct lpfc_hba * phba)11068 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11069 {
11070 uint32_t shdr_status, shdr_add_status;
11071 union lpfc_sli4_cfg_shdr *shdr;
11072 struct lpfc_vector_map_info *cpup;
11073 struct lpfc_sli4_hdw_queue *qp;
11074 LPFC_MBOXQ_t *mboxq;
11075 int qidx, cpu;
11076 uint32_t length, usdelay;
11077 int rc = -ENOMEM;
11078
11079 /* Check for dual-ULP support */
11080 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11081 if (!mboxq) {
11082 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11083 "3249 Unable to allocate memory for "
11084 "QUERY_FW_CFG mailbox command\n");
11085 return -ENOMEM;
11086 }
11087 length = (sizeof(struct lpfc_mbx_query_fw_config) -
11088 sizeof(struct lpfc_sli4_cfg_mhdr));
11089 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11090 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11091 length, LPFC_SLI4_MBX_EMBED);
11092
11093 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11094
11095 shdr = (union lpfc_sli4_cfg_shdr *)
11096 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11097 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11098 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11099 if (shdr_status || shdr_add_status || rc) {
11100 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11101 "3250 QUERY_FW_CFG mailbox failed with status "
11102 "x%x add_status x%x, mbx status x%x\n",
11103 shdr_status, shdr_add_status, rc);
11104 mempool_free(mboxq, phba->mbox_mem_pool);
11105 rc = -ENXIO;
11106 goto out_error;
11107 }
11108
11109 phba->sli4_hba.fw_func_mode =
11110 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11111 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
11112 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
11113 phba->sli4_hba.physical_port =
11114 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11115 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11116 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
11117 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
11118 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
11119
11120 mempool_free(mboxq, phba->mbox_mem_pool);
11121
11122 /*
11123 * Set up HBA Event Queues (EQs)
11124 */
11125 qp = phba->sli4_hba.hdwq;
11126
11127 /* Set up HBA event queue */
11128 if (!qp) {
11129 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11130 "3147 Fast-path EQs not allocated\n");
11131 rc = -ENOMEM;
11132 goto out_error;
11133 }
11134
11135 /* Loop thru all IRQ vectors */
11136 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11137 /* Create HBA Event Queues (EQs) in order */
11138 for_each_present_cpu(cpu) {
11139 cpup = &phba->sli4_hba.cpu_map[cpu];
11140
11141 /* Look for the CPU thats using that vector with
11142 * LPFC_CPU_FIRST_IRQ set.
11143 */
11144 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11145 continue;
11146 if (qidx != cpup->eq)
11147 continue;
11148
11149 /* Create an EQ for that vector */
11150 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11151 phba->cfg_fcp_imax);
11152 if (rc) {
11153 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11154 "0523 Failed setup of fast-path"
11155 " EQ (%d), rc = 0x%x\n",
11156 cpup->eq, (uint32_t)rc);
11157 goto out_destroy;
11158 }
11159
11160 /* Save the EQ for that vector in the hba_eq_hdl */
11161 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11162 qp[cpup->hdwq].hba_eq;
11163
11164 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11165 "2584 HBA EQ setup: queue[%d]-id=%d\n",
11166 cpup->eq,
11167 qp[cpup->hdwq].hba_eq->queue_id);
11168 }
11169 }
11170
11171 /* Loop thru all Hardware Queues */
11172 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11173 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11174 cpup = &phba->sli4_hba.cpu_map[cpu];
11175
11176 /* Create the CQ/WQ corresponding to the Hardware Queue */
11177 rc = lpfc_create_wq_cq(phba,
11178 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11179 qp[qidx].io_cq,
11180 qp[qidx].io_wq,
11181 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11182 qidx,
11183 LPFC_IO);
11184 if (rc) {
11185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11186 "0535 Failed to setup fastpath "
11187 "IO WQ/CQ (%d), rc = 0x%x\n",
11188 qidx, (uint32_t)rc);
11189 goto out_destroy;
11190 }
11191 }
11192
11193 /*
11194 * Set up Slow Path Complete Queues (CQs)
11195 */
11196
11197 /* Set up slow-path MBOX CQ/MQ */
11198
11199 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11201 "0528 %s not allocated\n",
11202 phba->sli4_hba.mbx_cq ?
11203 "Mailbox WQ" : "Mailbox CQ");
11204 rc = -ENOMEM;
11205 goto out_destroy;
11206 }
11207
11208 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11209 phba->sli4_hba.mbx_cq,
11210 phba->sli4_hba.mbx_wq,
11211 NULL, 0, LPFC_MBOX);
11212 if (rc) {
11213 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11214 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11215 (uint32_t)rc);
11216 goto out_destroy;
11217 }
11218 if (phba->nvmet_support) {
11219 if (!phba->sli4_hba.nvmet_cqset) {
11220 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11221 "3165 Fast-path NVME CQ Set "
11222 "array not allocated\n");
11223 rc = -ENOMEM;
11224 goto out_destroy;
11225 }
11226 if (phba->cfg_nvmet_mrq > 1) {
11227 rc = lpfc_cq_create_set(phba,
11228 phba->sli4_hba.nvmet_cqset,
11229 qp,
11230 LPFC_WCQ, LPFC_NVMET);
11231 if (rc) {
11232 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11233 "3164 Failed setup of NVME CQ "
11234 "Set, rc = 0x%x\n",
11235 (uint32_t)rc);
11236 goto out_destroy;
11237 }
11238 } else {
11239 /* Set up NVMET Receive Complete Queue */
11240 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11241 qp[0].hba_eq,
11242 LPFC_WCQ, LPFC_NVMET);
11243 if (rc) {
11244 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11245 "6089 Failed setup NVMET CQ: "
11246 "rc = 0x%x\n", (uint32_t)rc);
11247 goto out_destroy;
11248 }
11249 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11250
11251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11252 "6090 NVMET CQ setup: cq-id=%d, "
11253 "parent eq-id=%d\n",
11254 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11255 qp[0].hba_eq->queue_id);
11256 }
11257 }
11258
11259 /* Set up slow-path ELS WQ/CQ */
11260 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11261 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11262 "0530 ELS %s not allocated\n",
11263 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11264 rc = -ENOMEM;
11265 goto out_destroy;
11266 }
11267 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11268 phba->sli4_hba.els_cq,
11269 phba->sli4_hba.els_wq,
11270 NULL, 0, LPFC_ELS);
11271 if (rc) {
11272 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11273 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11274 (uint32_t)rc);
11275 goto out_destroy;
11276 }
11277 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11278 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11279 phba->sli4_hba.els_wq->queue_id,
11280 phba->sli4_hba.els_cq->queue_id);
11281
11282 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11283 /* Set up NVME LS Complete Queue */
11284 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11285 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11286 "6091 LS %s not allocated\n",
11287 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11288 rc = -ENOMEM;
11289 goto out_destroy;
11290 }
11291 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11292 phba->sli4_hba.nvmels_cq,
11293 phba->sli4_hba.nvmels_wq,
11294 NULL, 0, LPFC_NVME_LS);
11295 if (rc) {
11296 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11297 "0526 Failed setup of NVVME LS WQ/CQ: "
11298 "rc = 0x%x\n", (uint32_t)rc);
11299 goto out_destroy;
11300 }
11301
11302 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11303 "6096 ELS WQ setup: wq-id=%d, "
11304 "parent cq-id=%d\n",
11305 phba->sli4_hba.nvmels_wq->queue_id,
11306 phba->sli4_hba.nvmels_cq->queue_id);
11307 }
11308
11309 /*
11310 * Create NVMET Receive Queue (RQ)
11311 */
11312 if (phba->nvmet_support) {
11313 if ((!phba->sli4_hba.nvmet_cqset) ||
11314 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11315 (!phba->sli4_hba.nvmet_mrq_data)) {
11316 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11317 "6130 MRQ CQ Queues not "
11318 "allocated\n");
11319 rc = -ENOMEM;
11320 goto out_destroy;
11321 }
11322 if (phba->cfg_nvmet_mrq > 1) {
11323 rc = lpfc_mrq_create(phba,
11324 phba->sli4_hba.nvmet_mrq_hdr,
11325 phba->sli4_hba.nvmet_mrq_data,
11326 phba->sli4_hba.nvmet_cqset,
11327 LPFC_NVMET);
11328 if (rc) {
11329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11330 "6098 Failed setup of NVMET "
11331 "MRQ: rc = 0x%x\n",
11332 (uint32_t)rc);
11333 goto out_destroy;
11334 }
11335
11336 } else {
11337 rc = lpfc_rq_create(phba,
11338 phba->sli4_hba.nvmet_mrq_hdr[0],
11339 phba->sli4_hba.nvmet_mrq_data[0],
11340 phba->sli4_hba.nvmet_cqset[0],
11341 LPFC_NVMET);
11342 if (rc) {
11343 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11344 "6057 Failed setup of NVMET "
11345 "Receive Queue: rc = 0x%x\n",
11346 (uint32_t)rc);
11347 goto out_destroy;
11348 }
11349
11350 lpfc_printf_log(
11351 phba, KERN_INFO, LOG_INIT,
11352 "6099 NVMET RQ setup: hdr-rq-id=%d, "
11353 "dat-rq-id=%d parent cq-id=%d\n",
11354 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11355 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11356 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11357
11358 }
11359 }
11360
11361 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11362 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11363 "0540 Receive Queue not allocated\n");
11364 rc = -ENOMEM;
11365 goto out_destroy;
11366 }
11367
11368 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11369 phba->sli4_hba.els_cq, LPFC_USOL);
11370 if (rc) {
11371 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11372 "0541 Failed setup of Receive Queue: "
11373 "rc = 0x%x\n", (uint32_t)rc);
11374 goto out_destroy;
11375 }
11376
11377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11378 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11379 "parent cq-id=%d\n",
11380 phba->sli4_hba.hdr_rq->queue_id,
11381 phba->sli4_hba.dat_rq->queue_id,
11382 phba->sli4_hba.els_cq->queue_id);
11383
11384 if (phba->cfg_fcp_imax)
11385 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11386 else
11387 usdelay = 0;
11388
11389 for (qidx = 0; qidx < phba->cfg_irq_chann;
11390 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11391 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11392 usdelay);
11393
11394 if (phba->sli4_hba.cq_max) {
11395 kfree(phba->sli4_hba.cq_lookup);
11396 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
11397 sizeof(struct lpfc_queue *), GFP_KERNEL);
11398 if (!phba->sli4_hba.cq_lookup) {
11399 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11400 "0549 Failed setup of CQ Lookup table: "
11401 "size 0x%x\n", phba->sli4_hba.cq_max);
11402 rc = -ENOMEM;
11403 goto out_destroy;
11404 }
11405 lpfc_setup_cq_lookup(phba);
11406 }
11407 return 0;
11408
11409 out_destroy:
11410 lpfc_sli4_queue_unset(phba);
11411 out_error:
11412 return rc;
11413 }
11414
11415 /**
11416 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11417 * @phba: pointer to lpfc hba data structure.
11418 *
11419 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11420 * operation.
11421 *
11422 * Return codes
11423 * 0 - successful
11424 * -ENOMEM - No available memory
11425 * -EIO - The mailbox failed to complete successfully.
11426 **/
11427 void
lpfc_sli4_queue_unset(struct lpfc_hba * phba)11428 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11429 {
11430 struct lpfc_sli4_hdw_queue *qp;
11431 struct lpfc_queue *eq;
11432 int qidx;
11433
11434 /* Unset mailbox command work queue */
11435 if (phba->sli4_hba.mbx_wq)
11436 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11437
11438 /* Unset NVME LS work queue */
11439 if (phba->sli4_hba.nvmels_wq)
11440 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11441
11442 /* Unset ELS work queue */
11443 if (phba->sli4_hba.els_wq)
11444 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11445
11446 /* Unset unsolicited receive queue */
11447 if (phba->sli4_hba.hdr_rq)
11448 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11449 phba->sli4_hba.dat_rq);
11450
11451 /* Unset mailbox command complete queue */
11452 if (phba->sli4_hba.mbx_cq)
11453 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11454
11455 /* Unset ELS complete queue */
11456 if (phba->sli4_hba.els_cq)
11457 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11458
11459 /* Unset NVME LS complete queue */
11460 if (phba->sli4_hba.nvmels_cq)
11461 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11462
11463 if (phba->nvmet_support) {
11464 /* Unset NVMET MRQ queue */
11465 if (phba->sli4_hba.nvmet_mrq_hdr) {
11466 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11467 lpfc_rq_destroy(
11468 phba,
11469 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11470 phba->sli4_hba.nvmet_mrq_data[qidx]);
11471 }
11472
11473 /* Unset NVMET CQ Set complete queue */
11474 if (phba->sli4_hba.nvmet_cqset) {
11475 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11476 lpfc_cq_destroy(
11477 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11478 }
11479 }
11480
11481 /* Unset fast-path SLI4 queues */
11482 if (phba->sli4_hba.hdwq) {
11483 /* Loop thru all Hardware Queues */
11484 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11485 /* Destroy the CQ/WQ corresponding to Hardware Queue */
11486 qp = &phba->sli4_hba.hdwq[qidx];
11487 lpfc_wq_destroy(phba, qp->io_wq);
11488 lpfc_cq_destroy(phba, qp->io_cq);
11489 }
11490 /* Loop thru all IRQ vectors */
11491 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11492 /* Destroy the EQ corresponding to the IRQ vector */
11493 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11494 lpfc_eq_destroy(phba, eq);
11495 }
11496 }
11497
11498 kfree(phba->sli4_hba.cq_lookup);
11499 phba->sli4_hba.cq_lookup = NULL;
11500 phba->sli4_hba.cq_max = 0;
11501 }
11502
11503 /**
11504 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11505 * @phba: pointer to lpfc hba data structure.
11506 *
11507 * This routine is invoked to allocate and set up a pool of completion queue
11508 * events. The body of the completion queue event is a completion queue entry
11509 * CQE. For now, this pool is used for the interrupt service routine to queue
11510 * the following HBA completion queue events for the worker thread to process:
11511 * - Mailbox asynchronous events
11512 * - Receive queue completion unsolicited events
11513 * Later, this can be used for all the slow-path events.
11514 *
11515 * Return codes
11516 * 0 - successful
11517 * -ENOMEM - No available memory
11518 **/
11519 static int
lpfc_sli4_cq_event_pool_create(struct lpfc_hba * phba)11520 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11521 {
11522 struct lpfc_cq_event *cq_event;
11523 int i;
11524
11525 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11526 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
11527 if (!cq_event)
11528 goto out_pool_create_fail;
11529 list_add_tail(&cq_event->list,
11530 &phba->sli4_hba.sp_cqe_event_pool);
11531 }
11532 return 0;
11533
11534 out_pool_create_fail:
11535 lpfc_sli4_cq_event_pool_destroy(phba);
11536 return -ENOMEM;
11537 }
11538
11539 /**
11540 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11541 * @phba: pointer to lpfc hba data structure.
11542 *
11543 * This routine is invoked to free the pool of completion queue events at
11544 * driver unload time. Note that, it is the responsibility of the driver
11545 * cleanup routine to free all the outstanding completion-queue events
11546 * allocated from this pool back into the pool before invoking this routine
11547 * to destroy the pool.
11548 **/
11549 static void
lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba * phba)11550 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11551 {
11552 struct lpfc_cq_event *cq_event, *next_cq_event;
11553
11554 list_for_each_entry_safe(cq_event, next_cq_event,
11555 &phba->sli4_hba.sp_cqe_event_pool, list) {
11556 list_del(&cq_event->list);
11557 kfree(cq_event);
11558 }
11559 }
11560
11561 /**
11562 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11563 * @phba: pointer to lpfc hba data structure.
11564 *
11565 * This routine is the lock free version of the API invoked to allocate a
11566 * completion-queue event from the free pool.
11567 *
11568 * Return: Pointer to the newly allocated completion-queue event if successful
11569 * NULL otherwise.
11570 **/
11571 struct lpfc_cq_event *
__lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11572 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11573 {
11574 struct lpfc_cq_event *cq_event = NULL;
11575
11576 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11577 struct lpfc_cq_event, list);
11578 return cq_event;
11579 }
11580
11581 /**
11582 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11583 * @phba: pointer to lpfc hba data structure.
11584 *
11585 * This routine is the lock version of the API invoked to allocate a
11586 * completion-queue event from the free pool.
11587 *
11588 * Return: Pointer to the newly allocated completion-queue event if successful
11589 * NULL otherwise.
11590 **/
11591 struct lpfc_cq_event *
lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11592 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11593 {
11594 struct lpfc_cq_event *cq_event;
11595 unsigned long iflags;
11596
11597 spin_lock_irqsave(&phba->hbalock, iflags);
11598 cq_event = __lpfc_sli4_cq_event_alloc(phba);
11599 spin_unlock_irqrestore(&phba->hbalock, iflags);
11600 return cq_event;
11601 }
11602
11603 /**
11604 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11605 * @phba: pointer to lpfc hba data structure.
11606 * @cq_event: pointer to the completion queue event to be freed.
11607 *
11608 * This routine is the lock free version of the API invoked to release a
11609 * completion-queue event back into the free pool.
11610 **/
11611 void
__lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11612 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11613 struct lpfc_cq_event *cq_event)
11614 {
11615 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11616 }
11617
11618 /**
11619 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11620 * @phba: pointer to lpfc hba data structure.
11621 * @cq_event: pointer to the completion queue event to be freed.
11622 *
11623 * This routine is the lock version of the API invoked to release a
11624 * completion-queue event back into the free pool.
11625 **/
11626 void
lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11627 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11628 struct lpfc_cq_event *cq_event)
11629 {
11630 unsigned long iflags;
11631 spin_lock_irqsave(&phba->hbalock, iflags);
11632 __lpfc_sli4_cq_event_release(phba, cq_event);
11633 spin_unlock_irqrestore(&phba->hbalock, iflags);
11634 }
11635
11636 /**
11637 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11638 * @phba: pointer to lpfc hba data structure.
11639 *
11640 * This routine is to free all the pending completion-queue events to the
11641 * back into the free pool for device reset.
11642 **/
11643 static void
lpfc_sli4_cq_event_release_all(struct lpfc_hba * phba)11644 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11645 {
11646 LIST_HEAD(cq_event_list);
11647 struct lpfc_cq_event *cq_event;
11648 unsigned long iflags;
11649
11650 /* Retrieve all the pending WCQEs from pending WCQE lists */
11651
11652 /* Pending ELS XRI abort events */
11653 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11654 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11655 &cq_event_list);
11656 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11657
11658 /* Pending asynnc events */
11659 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11660 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11661 &cq_event_list);
11662 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11663
11664 while (!list_empty(&cq_event_list)) {
11665 list_remove_head(&cq_event_list, cq_event,
11666 struct lpfc_cq_event, list);
11667 lpfc_sli4_cq_event_release(phba, cq_event);
11668 }
11669 }
11670
11671 /**
11672 * lpfc_pci_function_reset - Reset pci function.
11673 * @phba: pointer to lpfc hba data structure.
11674 *
11675 * This routine is invoked to request a PCI function reset. It will destroys
11676 * all resources assigned to the PCI function which originates this request.
11677 *
11678 * Return codes
11679 * 0 - successful
11680 * -ENOMEM - No available memory
11681 * -EIO - The mailbox failed to complete successfully.
11682 **/
11683 int
lpfc_pci_function_reset(struct lpfc_hba * phba)11684 lpfc_pci_function_reset(struct lpfc_hba *phba)
11685 {
11686 LPFC_MBOXQ_t *mboxq;
11687 uint32_t rc = 0, if_type;
11688 uint32_t shdr_status, shdr_add_status;
11689 uint32_t rdy_chk;
11690 uint32_t port_reset = 0;
11691 union lpfc_sli4_cfg_shdr *shdr;
11692 struct lpfc_register reg_data;
11693 uint16_t devid;
11694
11695 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11696 switch (if_type) {
11697 case LPFC_SLI_INTF_IF_TYPE_0:
11698 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11699 GFP_KERNEL);
11700 if (!mboxq) {
11701 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11702 "0494 Unable to allocate memory for "
11703 "issuing SLI_FUNCTION_RESET mailbox "
11704 "command\n");
11705 return -ENOMEM;
11706 }
11707
11708 /* Setup PCI function reset mailbox-ioctl command */
11709 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11710 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11711 LPFC_SLI4_MBX_EMBED);
11712 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11713 shdr = (union lpfc_sli4_cfg_shdr *)
11714 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11715 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11716 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11717 &shdr->response);
11718 mempool_free(mboxq, phba->mbox_mem_pool);
11719 if (shdr_status || shdr_add_status || rc) {
11720 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11721 "0495 SLI_FUNCTION_RESET mailbox "
11722 "failed with status x%x add_status x%x,"
11723 " mbx status x%x\n",
11724 shdr_status, shdr_add_status, rc);
11725 rc = -ENXIO;
11726 }
11727 break;
11728 case LPFC_SLI_INTF_IF_TYPE_2:
11729 case LPFC_SLI_INTF_IF_TYPE_6:
11730 wait:
11731 /*
11732 * Poll the Port Status Register and wait for RDY for
11733 * up to 30 seconds. If the port doesn't respond, treat
11734 * it as an error.
11735 */
11736 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11737 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11738 STATUSregaddr, ®_data.word0)) {
11739 rc = -ENODEV;
11740 goto out;
11741 }
11742 if (bf_get(lpfc_sliport_status_rdy, ®_data))
11743 break;
11744 msleep(20);
11745 }
11746
11747 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
11748 phba->work_status[0] = readl(
11749 phba->sli4_hba.u.if_type2.ERR1regaddr);
11750 phba->work_status[1] = readl(
11751 phba->sli4_hba.u.if_type2.ERR2regaddr);
11752 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11753 "2890 Port not ready, port status reg "
11754 "0x%x error 1=0x%x, error 2=0x%x\n",
11755 reg_data.word0,
11756 phba->work_status[0],
11757 phba->work_status[1]);
11758 rc = -ENODEV;
11759 goto out;
11760 }
11761
11762 if (bf_get(lpfc_sliport_status_pldv, ®_data))
11763 lpfc_pldv_detect = true;
11764
11765 if (!port_reset) {
11766 /*
11767 * Reset the port now
11768 */
11769 reg_data.word0 = 0;
11770 bf_set(lpfc_sliport_ctrl_end, ®_data,
11771 LPFC_SLIPORT_LITTLE_ENDIAN);
11772 bf_set(lpfc_sliport_ctrl_ip, ®_data,
11773 LPFC_SLIPORT_INIT_PORT);
11774 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11775 CTRLregaddr);
11776 /* flush */
11777 pci_read_config_word(phba->pcidev,
11778 PCI_DEVICE_ID, &devid);
11779
11780 port_reset = 1;
11781 msleep(20);
11782 goto wait;
11783 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
11784 rc = -ENODEV;
11785 goto out;
11786 }
11787 break;
11788
11789 case LPFC_SLI_INTF_IF_TYPE_1:
11790 default:
11791 break;
11792 }
11793
11794 out:
11795 /* Catch the not-ready port failure after a port reset. */
11796 if (rc) {
11797 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11798 "3317 HBA not functional: IP Reset Failed "
11799 "try: echo fw_reset > board_mode\n");
11800 rc = -ENODEV;
11801 }
11802
11803 return rc;
11804 }
11805
11806 /**
11807 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11808 * @phba: pointer to lpfc hba data structure.
11809 *
11810 * This routine is invoked to set up the PCI device memory space for device
11811 * with SLI-4 interface spec.
11812 *
11813 * Return codes
11814 * 0 - successful
11815 * other values - error
11816 **/
11817 static int
lpfc_sli4_pci_mem_setup(struct lpfc_hba * phba)11818 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11819 {
11820 struct pci_dev *pdev = phba->pcidev;
11821 unsigned long bar0map_len, bar1map_len, bar2map_len;
11822 int error;
11823 uint32_t if_type;
11824
11825 if (!pdev)
11826 return -ENODEV;
11827
11828 /* Set the device DMA mask size */
11829 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11830 if (error)
11831 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11832 if (error)
11833 return error;
11834
11835 /*
11836 * The BARs and register set definitions and offset locations are
11837 * dependent on the if_type.
11838 */
11839 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11840 &phba->sli4_hba.sli_intf.word0)) {
11841 return -ENODEV;
11842 }
11843
11844 /* There is no SLI3 failback for SLI4 devices. */
11845 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11846 LPFC_SLI_INTF_VALID) {
11847 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11848 "2894 SLI_INTF reg contents invalid "
11849 "sli_intf reg 0x%x\n",
11850 phba->sli4_hba.sli_intf.word0);
11851 return -ENODEV;
11852 }
11853
11854 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11855 /*
11856 * Get the bus address of SLI4 device Bar regions and the
11857 * number of bytes required by each mapping. The mapping of the
11858 * particular PCI BARs regions is dependent on the type of
11859 * SLI4 device.
11860 */
11861 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11862 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11863 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11864
11865 /*
11866 * Map SLI4 PCI Config Space Register base to a kernel virtual
11867 * addr
11868 */
11869 phba->sli4_hba.conf_regs_memmap_p =
11870 ioremap(phba->pci_bar0_map, bar0map_len);
11871 if (!phba->sli4_hba.conf_regs_memmap_p) {
11872 dev_printk(KERN_ERR, &pdev->dev,
11873 "ioremap failed for SLI4 PCI config "
11874 "registers.\n");
11875 return -ENODEV;
11876 }
11877 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11878 /* Set up BAR0 PCI config space register memory map */
11879 lpfc_sli4_bar0_register_memmap(phba, if_type);
11880 } else {
11881 phba->pci_bar0_map = pci_resource_start(pdev, 1);
11882 bar0map_len = pci_resource_len(pdev, 1);
11883 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11884 dev_printk(KERN_ERR, &pdev->dev,
11885 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11886 return -ENODEV;
11887 }
11888 phba->sli4_hba.conf_regs_memmap_p =
11889 ioremap(phba->pci_bar0_map, bar0map_len);
11890 if (!phba->sli4_hba.conf_regs_memmap_p) {
11891 dev_printk(KERN_ERR, &pdev->dev,
11892 "ioremap failed for SLI4 PCI config "
11893 "registers.\n");
11894 return -ENODEV;
11895 }
11896 lpfc_sli4_bar0_register_memmap(phba, if_type);
11897 }
11898
11899 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11900 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11901 /*
11902 * Map SLI4 if type 0 HBA Control Register base to a
11903 * kernel virtual address and setup the registers.
11904 */
11905 phba->pci_bar1_map = pci_resource_start(pdev,
11906 PCI_64BIT_BAR2);
11907 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11908 phba->sli4_hba.ctrl_regs_memmap_p =
11909 ioremap(phba->pci_bar1_map,
11910 bar1map_len);
11911 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11912 dev_err(&pdev->dev,
11913 "ioremap failed for SLI4 HBA "
11914 "control registers.\n");
11915 error = -ENOMEM;
11916 goto out_iounmap_conf;
11917 }
11918 phba->pci_bar2_memmap_p =
11919 phba->sli4_hba.ctrl_regs_memmap_p;
11920 lpfc_sli4_bar1_register_memmap(phba, if_type);
11921 } else {
11922 error = -ENOMEM;
11923 goto out_iounmap_conf;
11924 }
11925 }
11926
11927 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11928 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11929 /*
11930 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11931 * virtual address and setup the registers.
11932 */
11933 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11934 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11935 phba->sli4_hba.drbl_regs_memmap_p =
11936 ioremap(phba->pci_bar1_map, bar1map_len);
11937 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11938 dev_err(&pdev->dev,
11939 "ioremap failed for SLI4 HBA doorbell registers.\n");
11940 error = -ENOMEM;
11941 goto out_iounmap_conf;
11942 }
11943 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11944 lpfc_sli4_bar1_register_memmap(phba, if_type);
11945 }
11946
11947 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11948 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11949 /*
11950 * Map SLI4 if type 0 HBA Doorbell Register base to
11951 * a kernel virtual address and setup the registers.
11952 */
11953 phba->pci_bar2_map = pci_resource_start(pdev,
11954 PCI_64BIT_BAR4);
11955 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11956 phba->sli4_hba.drbl_regs_memmap_p =
11957 ioremap(phba->pci_bar2_map,
11958 bar2map_len);
11959 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11960 dev_err(&pdev->dev,
11961 "ioremap failed for SLI4 HBA"
11962 " doorbell registers.\n");
11963 error = -ENOMEM;
11964 goto out_iounmap_ctrl;
11965 }
11966 phba->pci_bar4_memmap_p =
11967 phba->sli4_hba.drbl_regs_memmap_p;
11968 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11969 if (error)
11970 goto out_iounmap_all;
11971 } else {
11972 error = -ENOMEM;
11973 goto out_iounmap_ctrl;
11974 }
11975 }
11976
11977 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11978 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11979 /*
11980 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11981 * virtual address and setup the registers.
11982 */
11983 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11984 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11985 phba->sli4_hba.dpp_regs_memmap_p =
11986 ioremap(phba->pci_bar2_map, bar2map_len);
11987 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11988 dev_err(&pdev->dev,
11989 "ioremap failed for SLI4 HBA dpp registers.\n");
11990 error = -ENOMEM;
11991 goto out_iounmap_all;
11992 }
11993 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11994 }
11995
11996 /* Set up the EQ/CQ register handeling functions now */
11997 switch (if_type) {
11998 case LPFC_SLI_INTF_IF_TYPE_0:
11999 case LPFC_SLI_INTF_IF_TYPE_2:
12000 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
12001 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
12002 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
12003 break;
12004 case LPFC_SLI_INTF_IF_TYPE_6:
12005 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
12006 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
12007 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
12008 break;
12009 default:
12010 break;
12011 }
12012
12013 return 0;
12014
12015 out_iounmap_all:
12016 if (phba->sli4_hba.drbl_regs_memmap_p)
12017 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12018 out_iounmap_ctrl:
12019 if (phba->sli4_hba.ctrl_regs_memmap_p)
12020 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12021 out_iounmap_conf:
12022 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12023
12024 return error;
12025 }
12026
12027 /**
12028 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12029 * @phba: pointer to lpfc hba data structure.
12030 *
12031 * This routine is invoked to unset the PCI device memory space for device
12032 * with SLI-4 interface spec.
12033 **/
12034 static void
lpfc_sli4_pci_mem_unset(struct lpfc_hba * phba)12035 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12036 {
12037 uint32_t if_type;
12038 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12039
12040 switch (if_type) {
12041 case LPFC_SLI_INTF_IF_TYPE_0:
12042 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12043 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12044 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12045 break;
12046 case LPFC_SLI_INTF_IF_TYPE_2:
12047 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12048 break;
12049 case LPFC_SLI_INTF_IF_TYPE_6:
12050 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12051 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12052 if (phba->sli4_hba.dpp_regs_memmap_p)
12053 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12054 break;
12055 case LPFC_SLI_INTF_IF_TYPE_1:
12056 break;
12057 default:
12058 dev_printk(KERN_ERR, &phba->pcidev->dev,
12059 "FATAL - unsupported SLI4 interface type - %d\n",
12060 if_type);
12061 break;
12062 }
12063 }
12064
12065 /**
12066 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12067 * @phba: pointer to lpfc hba data structure.
12068 *
12069 * This routine is invoked to enable the MSI-X interrupt vectors to device
12070 * with SLI-3 interface specs.
12071 *
12072 * Return codes
12073 * 0 - successful
12074 * other values - error
12075 **/
12076 static int
lpfc_sli_enable_msix(struct lpfc_hba * phba)12077 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12078 {
12079 int rc;
12080 LPFC_MBOXQ_t *pmb;
12081
12082 /* Set up MSI-X multi-message vectors */
12083 rc = pci_alloc_irq_vectors(phba->pcidev,
12084 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12085 if (rc < 0) {
12086 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12087 "0420 PCI enable MSI-X failed (%d)\n", rc);
12088 goto vec_fail_out;
12089 }
12090
12091 /*
12092 * Assign MSI-X vectors to interrupt handlers
12093 */
12094
12095 /* vector-0 is associated to slow-path handler */
12096 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12097 &lpfc_sli_sp_intr_handler, 0,
12098 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12099 if (rc) {
12100 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12101 "0421 MSI-X slow-path request_irq failed "
12102 "(%d)\n", rc);
12103 goto msi_fail_out;
12104 }
12105
12106 /* vector-1 is associated to fast-path handler */
12107 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12108 &lpfc_sli_fp_intr_handler, 0,
12109 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12110
12111 if (rc) {
12112 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12113 "0429 MSI-X fast-path request_irq failed "
12114 "(%d)\n", rc);
12115 goto irq_fail_out;
12116 }
12117
12118 /*
12119 * Configure HBA MSI-X attention conditions to messages
12120 */
12121 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12122
12123 if (!pmb) {
12124 rc = -ENOMEM;
12125 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12126 "0474 Unable to allocate memory for issuing "
12127 "MBOX_CONFIG_MSI command\n");
12128 goto mem_fail_out;
12129 }
12130 rc = lpfc_config_msi(phba, pmb);
12131 if (rc)
12132 goto mbx_fail_out;
12133 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12134 if (rc != MBX_SUCCESS) {
12135 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12136 "0351 Config MSI mailbox command failed, "
12137 "mbxCmd x%x, mbxStatus x%x\n",
12138 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12139 goto mbx_fail_out;
12140 }
12141
12142 /* Free memory allocated for mailbox command */
12143 mempool_free(pmb, phba->mbox_mem_pool);
12144 return rc;
12145
12146 mbx_fail_out:
12147 /* Free memory allocated for mailbox command */
12148 mempool_free(pmb, phba->mbox_mem_pool);
12149
12150 mem_fail_out:
12151 /* free the irq already requested */
12152 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12153
12154 irq_fail_out:
12155 /* free the irq already requested */
12156 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12157
12158 msi_fail_out:
12159 /* Unconfigure MSI-X capability structure */
12160 pci_free_irq_vectors(phba->pcidev);
12161
12162 vec_fail_out:
12163 return rc;
12164 }
12165
12166 /**
12167 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12168 * @phba: pointer to lpfc hba data structure.
12169 *
12170 * This routine is invoked to enable the MSI interrupt mode to device with
12171 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12172 * enable the MSI vector. The device driver is responsible for calling the
12173 * request_irq() to register MSI vector with a interrupt the handler, which
12174 * is done in this function.
12175 *
12176 * Return codes
12177 * 0 - successful
12178 * other values - error
12179 */
12180 static int
lpfc_sli_enable_msi(struct lpfc_hba * phba)12181 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12182 {
12183 int rc;
12184
12185 rc = pci_enable_msi(phba->pcidev);
12186 if (!rc)
12187 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12188 "0012 PCI enable MSI mode success.\n");
12189 else {
12190 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12191 "0471 PCI enable MSI mode failed (%d)\n", rc);
12192 return rc;
12193 }
12194
12195 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12196 0, LPFC_DRIVER_NAME, phba);
12197 if (rc) {
12198 pci_disable_msi(phba->pcidev);
12199 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12200 "0478 MSI request_irq failed (%d)\n", rc);
12201 }
12202 return rc;
12203 }
12204
12205 /**
12206 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12207 * @phba: pointer to lpfc hba data structure.
12208 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12209 *
12210 * This routine is invoked to enable device interrupt and associate driver's
12211 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12212 * spec. Depends on the interrupt mode configured to the driver, the driver
12213 * will try to fallback from the configured interrupt mode to an interrupt
12214 * mode which is supported by the platform, kernel, and device in the order
12215 * of:
12216 * MSI-X -> MSI -> IRQ.
12217 *
12218 * Return codes
12219 * 0 - successful
12220 * other values - error
12221 **/
12222 static uint32_t
lpfc_sli_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)12223 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12224 {
12225 uint32_t intr_mode = LPFC_INTR_ERROR;
12226 int retval;
12227
12228 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12229 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12230 if (retval)
12231 return intr_mode;
12232 clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag);
12233
12234 if (cfg_mode == 2) {
12235 /* Now, try to enable MSI-X interrupt mode */
12236 retval = lpfc_sli_enable_msix(phba);
12237 if (!retval) {
12238 /* Indicate initialization to MSI-X mode */
12239 phba->intr_type = MSIX;
12240 intr_mode = 2;
12241 }
12242 }
12243
12244 /* Fallback to MSI if MSI-X initialization failed */
12245 if (cfg_mode >= 1 && phba->intr_type == NONE) {
12246 retval = lpfc_sli_enable_msi(phba);
12247 if (!retval) {
12248 /* Indicate initialization to MSI mode */
12249 phba->intr_type = MSI;
12250 intr_mode = 1;
12251 }
12252 }
12253
12254 /* Fallback to INTx if both MSI-X/MSI initalization failed */
12255 if (phba->intr_type == NONE) {
12256 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12257 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12258 if (!retval) {
12259 /* Indicate initialization to INTx mode */
12260 phba->intr_type = INTx;
12261 intr_mode = 0;
12262 }
12263 }
12264 return intr_mode;
12265 }
12266
12267 /**
12268 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12269 * @phba: pointer to lpfc hba data structure.
12270 *
12271 * This routine is invoked to disable device interrupt and disassociate the
12272 * driver's interrupt handler(s) from interrupt vector(s) to device with
12273 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12274 * release the interrupt vector(s) for the message signaled interrupt.
12275 **/
12276 static void
lpfc_sli_disable_intr(struct lpfc_hba * phba)12277 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12278 {
12279 int nr_irqs, i;
12280
12281 if (phba->intr_type == MSIX)
12282 nr_irqs = LPFC_MSIX_VECTORS;
12283 else
12284 nr_irqs = 1;
12285
12286 for (i = 0; i < nr_irqs; i++)
12287 free_irq(pci_irq_vector(phba->pcidev, i), phba);
12288 pci_free_irq_vectors(phba->pcidev);
12289
12290 /* Reset interrupt management states */
12291 phba->intr_type = NONE;
12292 phba->sli.slistat.sli_intr = 0;
12293 }
12294
12295 /**
12296 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12297 * @phba: pointer to lpfc hba data structure.
12298 * @id: EQ vector index or Hardware Queue index
12299 * @match: LPFC_FIND_BY_EQ = match by EQ
12300 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
12301 * Return the CPU that matches the selection criteria
12302 */
12303 static uint16_t
lpfc_find_cpu_handle(struct lpfc_hba * phba,uint16_t id,int match)12304 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12305 {
12306 struct lpfc_vector_map_info *cpup;
12307 int cpu;
12308
12309 /* Loop through all CPUs */
12310 for_each_present_cpu(cpu) {
12311 cpup = &phba->sli4_hba.cpu_map[cpu];
12312
12313 /* If we are matching by EQ, there may be multiple CPUs using
12314 * using the same vector, so select the one with
12315 * LPFC_CPU_FIRST_IRQ set.
12316 */
12317 if ((match == LPFC_FIND_BY_EQ) &&
12318 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12319 (cpup->eq == id))
12320 return cpu;
12321
12322 /* If matching by HDWQ, select the first CPU that matches */
12323 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12324 return cpu;
12325 }
12326 return 0;
12327 }
12328
12329 #ifdef CONFIG_X86
12330 /**
12331 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12332 * @phba: pointer to lpfc hba data structure.
12333 * @cpu: CPU map index
12334 * @phys_id: CPU package physical id
12335 * @core_id: CPU core id
12336 */
12337 static int
lpfc_find_hyper(struct lpfc_hba * phba,int cpu,uint16_t phys_id,uint16_t core_id)12338 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12339 uint16_t phys_id, uint16_t core_id)
12340 {
12341 struct lpfc_vector_map_info *cpup;
12342 int idx;
12343
12344 for_each_present_cpu(idx) {
12345 cpup = &phba->sli4_hba.cpu_map[idx];
12346 /* Does the cpup match the one we are looking for */
12347 if ((cpup->phys_id == phys_id) &&
12348 (cpup->core_id == core_id) &&
12349 (cpu != idx))
12350 return 1;
12351 }
12352 return 0;
12353 }
12354 #endif
12355
12356 /*
12357 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12358 * @phba: pointer to lpfc hba data structure.
12359 * @eqidx: index for eq and irq vector
12360 * @flag: flags to set for vector_map structure
12361 * @cpu: cpu used to index vector_map structure
12362 *
12363 * The routine assigns eq info into vector_map structure
12364 */
12365 static inline void
lpfc_assign_eq_map_info(struct lpfc_hba * phba,uint16_t eqidx,uint16_t flag,unsigned int cpu)12366 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12367 unsigned int cpu)
12368 {
12369 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12370 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12371
12372 cpup->eq = eqidx;
12373 cpup->flag |= flag;
12374
12375 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12376 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12377 cpu, eqhdl->irq, cpup->eq, cpup->flag);
12378 }
12379
12380 /**
12381 * lpfc_cpu_map_array_init - Initialize cpu_map structure
12382 * @phba: pointer to lpfc hba data structure.
12383 *
12384 * The routine initializes the cpu_map array structure
12385 */
12386 static void
lpfc_cpu_map_array_init(struct lpfc_hba * phba)12387 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12388 {
12389 struct lpfc_vector_map_info *cpup;
12390 struct lpfc_eq_intr_info *eqi;
12391 int cpu;
12392
12393 for_each_possible_cpu(cpu) {
12394 cpup = &phba->sli4_hba.cpu_map[cpu];
12395 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12396 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12397 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12398 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12399 cpup->flag = 0;
12400 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12401 INIT_LIST_HEAD(&eqi->list);
12402 eqi->icnt = 0;
12403 }
12404 }
12405
12406 /**
12407 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12408 * @phba: pointer to lpfc hba data structure.
12409 *
12410 * The routine initializes the hba_eq_hdl array structure
12411 */
12412 static void
lpfc_hba_eq_hdl_array_init(struct lpfc_hba * phba)12413 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12414 {
12415 struct lpfc_hba_eq_hdl *eqhdl;
12416 int i;
12417
12418 for (i = 0; i < phba->cfg_irq_chann; i++) {
12419 eqhdl = lpfc_get_eq_hdl(i);
12420 eqhdl->irq = LPFC_IRQ_EMPTY;
12421 eqhdl->phba = phba;
12422 }
12423 }
12424
12425 /**
12426 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12427 * @phba: pointer to lpfc hba data structure.
12428 * @vectors: number of msix vectors allocated.
12429 *
12430 * The routine will figure out the CPU affinity assignment for every
12431 * MSI-X vector allocated for the HBA.
12432 * In addition, the CPU to IO channel mapping will be calculated
12433 * and the phba->sli4_hba.cpu_map array will reflect this.
12434 */
12435 static void
lpfc_cpu_affinity_check(struct lpfc_hba * phba,int vectors)12436 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12437 {
12438 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12439 int max_phys_id, min_phys_id;
12440 int max_core_id, min_core_id;
12441 struct lpfc_vector_map_info *cpup;
12442 struct lpfc_vector_map_info *new_cpup;
12443 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12444 struct lpfc_hdwq_stat *c_stat;
12445 #endif
12446
12447 max_phys_id = 0;
12448 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12449 max_core_id = 0;
12450 min_core_id = LPFC_VECTOR_MAP_EMPTY;
12451
12452 /* Update CPU map with physical id and core id of each CPU */
12453 for_each_present_cpu(cpu) {
12454 cpup = &phba->sli4_hba.cpu_map[cpu];
12455 #ifdef CONFIG_X86
12456 cpup->phys_id = topology_physical_package_id(cpu);
12457 cpup->core_id = topology_core_id(cpu);
12458 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12459 cpup->flag |= LPFC_CPU_MAP_HYPER;
12460 #else
12461 /* No distinction between CPUs for other platforms */
12462 cpup->phys_id = 0;
12463 cpup->core_id = cpu;
12464 #endif
12465
12466 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12467 "3328 CPU %d physid %d coreid %d flag x%x\n",
12468 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12469
12470 if (cpup->phys_id > max_phys_id)
12471 max_phys_id = cpup->phys_id;
12472 if (cpup->phys_id < min_phys_id)
12473 min_phys_id = cpup->phys_id;
12474
12475 if (cpup->core_id > max_core_id)
12476 max_core_id = cpup->core_id;
12477 if (cpup->core_id < min_core_id)
12478 min_core_id = cpup->core_id;
12479 }
12480
12481 /* After looking at each irq vector assigned to this pcidev, its
12482 * possible to see that not ALL CPUs have been accounted for.
12483 * Next we will set any unassigned (unaffinitized) cpu map
12484 * entries to a IRQ on the same phys_id.
12485 */
12486 first_cpu = cpumask_first(cpu_present_mask);
12487 start_cpu = first_cpu;
12488
12489 for_each_present_cpu(cpu) {
12490 cpup = &phba->sli4_hba.cpu_map[cpu];
12491
12492 /* Is this CPU entry unassigned */
12493 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12494 /* Mark CPU as IRQ not assigned by the kernel */
12495 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12496
12497 /* If so, find a new_cpup that is on the SAME
12498 * phys_id as cpup. start_cpu will start where we
12499 * left off so all unassigned entries don't get assgined
12500 * the IRQ of the first entry.
12501 */
12502 new_cpu = start_cpu;
12503 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12504 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12505 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12506 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12507 (new_cpup->phys_id == cpup->phys_id))
12508 goto found_same;
12509 new_cpu = lpfc_next_present_cpu(new_cpu);
12510 }
12511 /* At this point, we leave the CPU as unassigned */
12512 continue;
12513 found_same:
12514 /* We found a matching phys_id, so copy the IRQ info */
12515 cpup->eq = new_cpup->eq;
12516
12517 /* Bump start_cpu to the next slot to minmize the
12518 * chance of having multiple unassigned CPU entries
12519 * selecting the same IRQ.
12520 */
12521 start_cpu = lpfc_next_present_cpu(new_cpu);
12522
12523 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12524 "3337 Set Affinity: CPU %d "
12525 "eq %d from peer cpu %d same "
12526 "phys_id (%d)\n",
12527 cpu, cpup->eq, new_cpu,
12528 cpup->phys_id);
12529 }
12530 }
12531
12532 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
12533 start_cpu = first_cpu;
12534
12535 for_each_present_cpu(cpu) {
12536 cpup = &phba->sli4_hba.cpu_map[cpu];
12537
12538 /* Is this entry unassigned */
12539 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12540 /* Mark it as IRQ not assigned by the kernel */
12541 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12542
12543 /* If so, find a new_cpup thats on ANY phys_id
12544 * as the cpup. start_cpu will start where we
12545 * left off so all unassigned entries don't get
12546 * assigned the IRQ of the first entry.
12547 */
12548 new_cpu = start_cpu;
12549 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12550 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12551 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12552 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12553 goto found_any;
12554 new_cpu = lpfc_next_present_cpu(new_cpu);
12555 }
12556 /* We should never leave an entry unassigned */
12557 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12558 "3339 Set Affinity: CPU %d "
12559 "eq %d UNASSIGNED\n",
12560 cpup->hdwq, cpup->eq);
12561 continue;
12562 found_any:
12563 /* We found an available entry, copy the IRQ info */
12564 cpup->eq = new_cpup->eq;
12565
12566 /* Bump start_cpu to the next slot to minmize the
12567 * chance of having multiple unassigned CPU entries
12568 * selecting the same IRQ.
12569 */
12570 start_cpu = lpfc_next_present_cpu(new_cpu);
12571
12572 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12573 "3338 Set Affinity: CPU %d "
12574 "eq %d from peer cpu %d (%d/%d)\n",
12575 cpu, cpup->eq, new_cpu,
12576 new_cpup->phys_id, new_cpup->core_id);
12577 }
12578 }
12579
12580 /* Assign hdwq indices that are unique across all cpus in the map
12581 * that are also FIRST_CPUs.
12582 */
12583 idx = 0;
12584 for_each_present_cpu(cpu) {
12585 cpup = &phba->sli4_hba.cpu_map[cpu];
12586
12587 /* Only FIRST IRQs get a hdwq index assignment. */
12588 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12589 continue;
12590
12591 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12592 cpup->hdwq = idx;
12593 idx++;
12594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12595 "3333 Set Affinity: CPU %d (phys %d core %d): "
12596 "hdwq %d eq %d flg x%x\n",
12597 cpu, cpup->phys_id, cpup->core_id,
12598 cpup->hdwq, cpup->eq, cpup->flag);
12599 }
12600 /* Associate a hdwq with each cpu_map entry
12601 * This will be 1 to 1 - hdwq to cpu, unless there are less
12602 * hardware queues then CPUs. For that case we will just round-robin
12603 * the available hardware queues as they get assigned to CPUs.
12604 * The next_idx is the idx from the FIRST_CPU loop above to account
12605 * for irq_chann < hdwq. The idx is used for round-robin assignments
12606 * and needs to start at 0.
12607 */
12608 next_idx = idx;
12609 start_cpu = 0;
12610 idx = 0;
12611 for_each_present_cpu(cpu) {
12612 cpup = &phba->sli4_hba.cpu_map[cpu];
12613
12614 /* FIRST cpus are already mapped. */
12615 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12616 continue;
12617
12618 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12619 * of the unassigned cpus to the next idx so that all
12620 * hdw queues are fully utilized.
12621 */
12622 if (next_idx < phba->cfg_hdw_queue) {
12623 cpup->hdwq = next_idx;
12624 next_idx++;
12625 continue;
12626 }
12627
12628 /* Not a First CPU and all hdw_queues are used. Reuse a
12629 * Hardware Queue for another CPU, so be smart about it
12630 * and pick one that has its IRQ/EQ mapped to the same phys_id
12631 * (CPU package) and core_id.
12632 */
12633 new_cpu = start_cpu;
12634 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12635 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12636 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12637 new_cpup->phys_id == cpup->phys_id &&
12638 new_cpup->core_id == cpup->core_id) {
12639 goto found_hdwq;
12640 }
12641 new_cpu = lpfc_next_present_cpu(new_cpu);
12642 }
12643
12644 /* If we can't match both phys_id and core_id,
12645 * settle for just a phys_id match.
12646 */
12647 new_cpu = start_cpu;
12648 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12649 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12650 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12651 new_cpup->phys_id == cpup->phys_id)
12652 goto found_hdwq;
12653 new_cpu = lpfc_next_present_cpu(new_cpu);
12654 }
12655
12656 /* Otherwise just round robin on cfg_hdw_queue */
12657 cpup->hdwq = idx % phba->cfg_hdw_queue;
12658 idx++;
12659 goto logit;
12660 found_hdwq:
12661 /* We found an available entry, copy the IRQ info */
12662 start_cpu = lpfc_next_present_cpu(new_cpu);
12663 cpup->hdwq = new_cpup->hdwq;
12664 logit:
12665 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12666 "3335 Set Affinity: CPU %d (phys %d core %d): "
12667 "hdwq %d eq %d flg x%x\n",
12668 cpu, cpup->phys_id, cpup->core_id,
12669 cpup->hdwq, cpup->eq, cpup->flag);
12670 }
12671
12672 /*
12673 * Initialize the cpu_map slots for not-present cpus in case
12674 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12675 */
12676 idx = 0;
12677 for_each_possible_cpu(cpu) {
12678 cpup = &phba->sli4_hba.cpu_map[cpu];
12679 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12680 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12681 c_stat->hdwq_no = cpup->hdwq;
12682 #endif
12683 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12684 continue;
12685
12686 cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12687 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12688 c_stat->hdwq_no = cpup->hdwq;
12689 #endif
12690 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12691 "3340 Set Affinity: not present "
12692 "CPU %d hdwq %d\n",
12693 cpu, cpup->hdwq);
12694 }
12695
12696 /* The cpu_map array will be used later during initialization
12697 * when EQ / CQ / WQs are allocated and configured.
12698 */
12699 return;
12700 }
12701
12702 /**
12703 * lpfc_cpuhp_get_eq
12704 *
12705 * @phba: pointer to lpfc hba data structure.
12706 * @cpu: cpu going offline
12707 * @eqlist: eq list to append to
12708 */
12709 static int
lpfc_cpuhp_get_eq(struct lpfc_hba * phba,unsigned int cpu,struct list_head * eqlist)12710 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12711 struct list_head *eqlist)
12712 {
12713 const struct cpumask *maskp;
12714 struct lpfc_queue *eq;
12715 struct cpumask *tmp;
12716 u16 idx;
12717
12718 tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12719 if (!tmp)
12720 return -ENOMEM;
12721
12722 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12723 maskp = pci_irq_get_affinity(phba->pcidev, idx);
12724 if (!maskp)
12725 continue;
12726 /*
12727 * if irq is not affinitized to the cpu going
12728 * then we don't need to poll the eq attached
12729 * to it.
12730 */
12731 if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12732 continue;
12733 /* get the cpus that are online and are affini-
12734 * tized to this irq vector. If the count is
12735 * more than 1 then cpuhp is not going to shut-
12736 * down this vector. Since this cpu has not
12737 * gone offline yet, we need >1.
12738 */
12739 cpumask_and(tmp, maskp, cpu_online_mask);
12740 if (cpumask_weight(tmp) > 1)
12741 continue;
12742
12743 /* Now that we have an irq to shutdown, get the eq
12744 * mapped to this irq. Note: multiple hdwq's in
12745 * the software can share an eq, but eventually
12746 * only eq will be mapped to this vector
12747 */
12748 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12749 list_add(&eq->_poll_list, eqlist);
12750 }
12751 kfree(tmp);
12752 return 0;
12753 }
12754
__lpfc_cpuhp_remove(struct lpfc_hba * phba)12755 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12756 {
12757 if (phba->sli_rev != LPFC_SLI_REV4)
12758 return;
12759
12760 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12761 &phba->cpuhp);
12762 /*
12763 * unregistering the instance doesn't stop the polling
12764 * timer. Wait for the poll timer to retire.
12765 */
12766 synchronize_rcu();
12767 del_timer_sync(&phba->cpuhp_poll_timer);
12768 }
12769
lpfc_cpuhp_remove(struct lpfc_hba * phba)12770 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12771 {
12772 if (phba->pport &&
12773 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
12774 return;
12775
12776 __lpfc_cpuhp_remove(phba);
12777 }
12778
lpfc_cpuhp_add(struct lpfc_hba * phba)12779 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12780 {
12781 if (phba->sli_rev != LPFC_SLI_REV4)
12782 return;
12783
12784 rcu_read_lock();
12785
12786 if (!list_empty(&phba->poll_list))
12787 mod_timer(&phba->cpuhp_poll_timer,
12788 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12789
12790 rcu_read_unlock();
12791
12792 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12793 &phba->cpuhp);
12794 }
12795
__lpfc_cpuhp_checks(struct lpfc_hba * phba,int * retval)12796 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12797 {
12798 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
12799 *retval = -EAGAIN;
12800 return true;
12801 }
12802
12803 if (phba->sli_rev != LPFC_SLI_REV4) {
12804 *retval = 0;
12805 return true;
12806 }
12807
12808 /* proceed with the hotplug */
12809 return false;
12810 }
12811
12812 /**
12813 * lpfc_irq_set_aff - set IRQ affinity
12814 * @eqhdl: EQ handle
12815 * @cpu: cpu to set affinity
12816 *
12817 **/
12818 static inline void
lpfc_irq_set_aff(struct lpfc_hba_eq_hdl * eqhdl,unsigned int cpu)12819 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12820 {
12821 cpumask_clear(&eqhdl->aff_mask);
12822 cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12823 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12824 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12825 }
12826
12827 /**
12828 * lpfc_irq_clear_aff - clear IRQ affinity
12829 * @eqhdl: EQ handle
12830 *
12831 **/
12832 static inline void
lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl * eqhdl)12833 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12834 {
12835 cpumask_clear(&eqhdl->aff_mask);
12836 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12837 }
12838
12839 /**
12840 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12841 * @phba: pointer to HBA context object.
12842 * @cpu: cpu going offline/online
12843 * @offline: true, cpu is going offline. false, cpu is coming online.
12844 *
12845 * If cpu is going offline, we'll try our best effort to find the next
12846 * online cpu on the phba's original_mask and migrate all offlining IRQ
12847 * affinities.
12848 *
12849 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12850 *
12851 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12852 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12853 *
12854 **/
12855 static void
lpfc_irq_rebalance(struct lpfc_hba * phba,unsigned int cpu,bool offline)12856 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12857 {
12858 struct lpfc_vector_map_info *cpup;
12859 struct cpumask *aff_mask;
12860 unsigned int cpu_select, cpu_next, idx;
12861 const struct cpumask *orig_mask;
12862
12863 if (phba->irq_chann_mode == NORMAL_MODE)
12864 return;
12865
12866 orig_mask = &phba->sli4_hba.irq_aff_mask;
12867
12868 if (!cpumask_test_cpu(cpu, orig_mask))
12869 return;
12870
12871 cpup = &phba->sli4_hba.cpu_map[cpu];
12872
12873 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12874 return;
12875
12876 if (offline) {
12877 /* Find next online CPU on original mask */
12878 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true);
12879 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12880
12881 /* Found a valid CPU */
12882 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12883 /* Go through each eqhdl and ensure offlining
12884 * cpu aff_mask is migrated
12885 */
12886 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12887 aff_mask = lpfc_get_aff_mask(idx);
12888
12889 /* Migrate affinity */
12890 if (cpumask_test_cpu(cpu, aff_mask))
12891 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12892 cpu_select);
12893 }
12894 } else {
12895 /* Rely on irqbalance if no online CPUs left on NUMA */
12896 for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12897 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12898 }
12899 } else {
12900 /* Migrate affinity back to this CPU */
12901 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12902 }
12903 }
12904
lpfc_cpu_offline(unsigned int cpu,struct hlist_node * node)12905 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12906 {
12907 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12908 struct lpfc_queue *eq, *next;
12909 LIST_HEAD(eqlist);
12910 int retval;
12911
12912 if (!phba) {
12913 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12914 return 0;
12915 }
12916
12917 if (__lpfc_cpuhp_checks(phba, &retval))
12918 return retval;
12919
12920 lpfc_irq_rebalance(phba, cpu, true);
12921
12922 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12923 if (retval)
12924 return retval;
12925
12926 /* start polling on these eq's */
12927 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12928 list_del_init(&eq->_poll_list);
12929 lpfc_sli4_start_polling(eq);
12930 }
12931
12932 return 0;
12933 }
12934
lpfc_cpu_online(unsigned int cpu,struct hlist_node * node)12935 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12936 {
12937 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12938 struct lpfc_queue *eq, *next;
12939 unsigned int n;
12940 int retval;
12941
12942 if (!phba) {
12943 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12944 return 0;
12945 }
12946
12947 if (__lpfc_cpuhp_checks(phba, &retval))
12948 return retval;
12949
12950 lpfc_irq_rebalance(phba, cpu, false);
12951
12952 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12953 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12954 if (n == cpu)
12955 lpfc_sli4_stop_polling(eq);
12956 }
12957
12958 return 0;
12959 }
12960
12961 /**
12962 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12963 * @phba: pointer to lpfc hba data structure.
12964 *
12965 * This routine is invoked to enable the MSI-X interrupt vectors to device
12966 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
12967 * to cpus on the system.
12968 *
12969 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12970 * the number of cpus on the same numa node as this adapter. The vectors are
12971 * allocated without requesting OS affinity mapping. A vector will be
12972 * allocated and assigned to each online and offline cpu. If the cpu is
12973 * online, then affinity will be set to that cpu. If the cpu is offline, then
12974 * affinity will be set to the nearest peer cpu within the numa node that is
12975 * online. If there are no online cpus within the numa node, affinity is not
12976 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12977 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12978 * configured.
12979 *
12980 * If numa mode is not enabled and there is more than 1 vector allocated, then
12981 * the driver relies on the managed irq interface where the OS assigns vector to
12982 * cpu affinity. The driver will then use that affinity mapping to setup its
12983 * cpu mapping table.
12984 *
12985 * Return codes
12986 * 0 - successful
12987 * other values - error
12988 **/
12989 static int
lpfc_sli4_enable_msix(struct lpfc_hba * phba)12990 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
12991 {
12992 int vectors, rc, index;
12993 char *name;
12994 const struct cpumask *aff_mask = NULL;
12995 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
12996 struct lpfc_vector_map_info *cpup;
12997 struct lpfc_hba_eq_hdl *eqhdl;
12998 const struct cpumask *maskp;
12999 unsigned int flags = PCI_IRQ_MSIX;
13000
13001 /* Set up MSI-X multi-message vectors */
13002 vectors = phba->cfg_irq_chann;
13003
13004 if (phba->irq_chann_mode != NORMAL_MODE)
13005 aff_mask = &phba->sli4_hba.irq_aff_mask;
13006
13007 if (aff_mask) {
13008 cpu_cnt = cpumask_weight(aff_mask);
13009 vectors = min(phba->cfg_irq_chann, cpu_cnt);
13010
13011 /* cpu: iterates over aff_mask including offline or online
13012 * cpu_select: iterates over online aff_mask to set affinity
13013 */
13014 cpu = cpumask_first(aff_mask);
13015 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13016 } else {
13017 flags |= PCI_IRQ_AFFINITY;
13018 }
13019
13020 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
13021 if (rc < 0) {
13022 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13023 "0484 PCI enable MSI-X failed (%d)\n", rc);
13024 goto vec_fail_out;
13025 }
13026 vectors = rc;
13027
13028 /* Assign MSI-X vectors to interrupt handlers */
13029 for (index = 0; index < vectors; index++) {
13030 eqhdl = lpfc_get_eq_hdl(index);
13031 name = eqhdl->handler_name;
13032 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13033 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13034 LPFC_DRIVER_HANDLER_NAME"%d", index);
13035
13036 eqhdl->idx = index;
13037 rc = pci_irq_vector(phba->pcidev, index);
13038 if (rc < 0) {
13039 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13040 "0489 MSI-X fast-path (%d) "
13041 "pci_irq_vec failed (%d)\n", index, rc);
13042 goto cfg_fail_out;
13043 }
13044 eqhdl->irq = rc;
13045
13046 rc = request_threaded_irq(eqhdl->irq,
13047 &lpfc_sli4_hba_intr_handler,
13048 &lpfc_sli4_hba_intr_handler_th,
13049 0, name, eqhdl);
13050 if (rc) {
13051 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13052 "0486 MSI-X fast-path (%d) "
13053 "request_irq failed (%d)\n", index, rc);
13054 goto cfg_fail_out;
13055 }
13056
13057 if (aff_mask) {
13058 /* If found a neighboring online cpu, set affinity */
13059 if (cpu_select < nr_cpu_ids)
13060 lpfc_irq_set_aff(eqhdl, cpu_select);
13061
13062 /* Assign EQ to cpu_map */
13063 lpfc_assign_eq_map_info(phba, index,
13064 LPFC_CPU_FIRST_IRQ,
13065 cpu);
13066
13067 /* Iterate to next offline or online cpu in aff_mask */
13068 cpu = cpumask_next(cpu, aff_mask);
13069
13070 /* Find next online cpu in aff_mask to set affinity */
13071 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13072 } else if (vectors == 1) {
13073 cpu = cpumask_first(cpu_present_mask);
13074 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13075 cpu);
13076 } else {
13077 maskp = pci_irq_get_affinity(phba->pcidev, index);
13078
13079 /* Loop through all CPUs associated with vector index */
13080 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13081 cpup = &phba->sli4_hba.cpu_map[cpu];
13082
13083 /* If this is the first CPU thats assigned to
13084 * this vector, set LPFC_CPU_FIRST_IRQ.
13085 *
13086 * With certain platforms its possible that irq
13087 * vectors are affinitized to all the cpu's.
13088 * This can result in each cpu_map.eq to be set
13089 * to the last vector, resulting in overwrite
13090 * of all the previous cpu_map.eq. Ensure that
13091 * each vector receives a place in cpu_map.
13092 * Later call to lpfc_cpu_affinity_check will
13093 * ensure we are nicely balanced out.
13094 */
13095 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13096 continue;
13097 lpfc_assign_eq_map_info(phba, index,
13098 LPFC_CPU_FIRST_IRQ,
13099 cpu);
13100 break;
13101 }
13102 }
13103 }
13104
13105 if (vectors != phba->cfg_irq_chann) {
13106 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13107 "3238 Reducing IO channels to match number of "
13108 "MSI-X vectors, requested %d got %d\n",
13109 phba->cfg_irq_chann, vectors);
13110 if (phba->cfg_irq_chann > vectors)
13111 phba->cfg_irq_chann = vectors;
13112 }
13113
13114 return rc;
13115
13116 cfg_fail_out:
13117 /* free the irq already requested */
13118 for (--index; index >= 0; index--) {
13119 eqhdl = lpfc_get_eq_hdl(index);
13120 lpfc_irq_clear_aff(eqhdl);
13121 free_irq(eqhdl->irq, eqhdl);
13122 }
13123
13124 /* Unconfigure MSI-X capability structure */
13125 pci_free_irq_vectors(phba->pcidev);
13126
13127 vec_fail_out:
13128 return rc;
13129 }
13130
13131 /**
13132 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13133 * @phba: pointer to lpfc hba data structure.
13134 *
13135 * This routine is invoked to enable the MSI interrupt mode to device with
13136 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13137 * called to enable the MSI vector. The device driver is responsible for
13138 * calling the request_irq() to register MSI vector with a interrupt the
13139 * handler, which is done in this function.
13140 *
13141 * Return codes
13142 * 0 - successful
13143 * other values - error
13144 **/
13145 static int
lpfc_sli4_enable_msi(struct lpfc_hba * phba)13146 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13147 {
13148 int rc, index;
13149 unsigned int cpu;
13150 struct lpfc_hba_eq_hdl *eqhdl;
13151
13152 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13153 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13154 if (rc > 0)
13155 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13156 "0487 PCI enable MSI mode success.\n");
13157 else {
13158 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13159 "0488 PCI enable MSI mode failed (%d)\n", rc);
13160 return rc ? rc : -1;
13161 }
13162
13163 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13164 0, LPFC_DRIVER_NAME, phba);
13165 if (rc) {
13166 pci_free_irq_vectors(phba->pcidev);
13167 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13168 "0490 MSI request_irq failed (%d)\n", rc);
13169 return rc;
13170 }
13171
13172 eqhdl = lpfc_get_eq_hdl(0);
13173 rc = pci_irq_vector(phba->pcidev, 0);
13174 if (rc < 0) {
13175 free_irq(phba->pcidev->irq, phba);
13176 pci_free_irq_vectors(phba->pcidev);
13177 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13178 "0496 MSI pci_irq_vec failed (%d)\n", rc);
13179 return rc;
13180 }
13181 eqhdl->irq = rc;
13182
13183 cpu = cpumask_first(cpu_present_mask);
13184 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13185
13186 for (index = 0; index < phba->cfg_irq_chann; index++) {
13187 eqhdl = lpfc_get_eq_hdl(index);
13188 eqhdl->idx = index;
13189 }
13190
13191 return 0;
13192 }
13193
13194 /**
13195 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13196 * @phba: pointer to lpfc hba data structure.
13197 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13198 *
13199 * This routine is invoked to enable device interrupt and associate driver's
13200 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13201 * interface spec. Depends on the interrupt mode configured to the driver,
13202 * the driver will try to fallback from the configured interrupt mode to an
13203 * interrupt mode which is supported by the platform, kernel, and device in
13204 * the order of:
13205 * MSI-X -> MSI -> IRQ.
13206 *
13207 * Return codes
13208 * Interrupt mode (2, 1, 0) - successful
13209 * LPFC_INTR_ERROR - error
13210 **/
13211 static uint32_t
lpfc_sli4_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)13212 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13213 {
13214 uint32_t intr_mode = LPFC_INTR_ERROR;
13215 int retval, idx;
13216
13217 if (cfg_mode == 2) {
13218 /* Preparation before conf_msi mbox cmd */
13219 retval = 0;
13220 if (!retval) {
13221 /* Now, try to enable MSI-X interrupt mode */
13222 retval = lpfc_sli4_enable_msix(phba);
13223 if (!retval) {
13224 /* Indicate initialization to MSI-X mode */
13225 phba->intr_type = MSIX;
13226 intr_mode = 2;
13227 }
13228 }
13229 }
13230
13231 /* Fallback to MSI if MSI-X initialization failed */
13232 if (cfg_mode >= 1 && phba->intr_type == NONE) {
13233 retval = lpfc_sli4_enable_msi(phba);
13234 if (!retval) {
13235 /* Indicate initialization to MSI mode */
13236 phba->intr_type = MSI;
13237 intr_mode = 1;
13238 }
13239 }
13240
13241 /* Fallback to INTx if both MSI-X/MSI initalization failed */
13242 if (phba->intr_type == NONE) {
13243 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13244 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13245 if (!retval) {
13246 struct lpfc_hba_eq_hdl *eqhdl;
13247 unsigned int cpu;
13248
13249 /* Indicate initialization to INTx mode */
13250 phba->intr_type = INTx;
13251 intr_mode = 0;
13252
13253 eqhdl = lpfc_get_eq_hdl(0);
13254 retval = pci_irq_vector(phba->pcidev, 0);
13255 if (retval < 0) {
13256 free_irq(phba->pcidev->irq, phba);
13257 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13258 "0502 INTR pci_irq_vec failed (%d)\n",
13259 retval);
13260 return LPFC_INTR_ERROR;
13261 }
13262 eqhdl->irq = retval;
13263
13264 cpu = cpumask_first(cpu_present_mask);
13265 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13266 cpu);
13267 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13268 eqhdl = lpfc_get_eq_hdl(idx);
13269 eqhdl->idx = idx;
13270 }
13271 }
13272 }
13273 return intr_mode;
13274 }
13275
13276 /**
13277 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13278 * @phba: pointer to lpfc hba data structure.
13279 *
13280 * This routine is invoked to disable device interrupt and disassociate
13281 * the driver's interrupt handler(s) from interrupt vector(s) to device
13282 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13283 * will release the interrupt vector(s) for the message signaled interrupt.
13284 **/
13285 static void
lpfc_sli4_disable_intr(struct lpfc_hba * phba)13286 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13287 {
13288 /* Disable the currently initialized interrupt mode */
13289 if (phba->intr_type == MSIX) {
13290 int index;
13291 struct lpfc_hba_eq_hdl *eqhdl;
13292
13293 /* Free up MSI-X multi-message vectors */
13294 for (index = 0; index < phba->cfg_irq_chann; index++) {
13295 eqhdl = lpfc_get_eq_hdl(index);
13296 lpfc_irq_clear_aff(eqhdl);
13297 free_irq(eqhdl->irq, eqhdl);
13298 }
13299 } else {
13300 free_irq(phba->pcidev->irq, phba);
13301 }
13302
13303 pci_free_irq_vectors(phba->pcidev);
13304
13305 /* Reset interrupt management states */
13306 phba->intr_type = NONE;
13307 phba->sli.slistat.sli_intr = 0;
13308 }
13309
13310 /**
13311 * lpfc_unset_hba - Unset SLI3 hba device initialization
13312 * @phba: pointer to lpfc hba data structure.
13313 *
13314 * This routine is invoked to unset the HBA device initialization steps to
13315 * a device with SLI-3 interface spec.
13316 **/
13317 static void
lpfc_unset_hba(struct lpfc_hba * phba)13318 lpfc_unset_hba(struct lpfc_hba *phba)
13319 {
13320 set_bit(FC_UNLOADING, &phba->pport->load_flag);
13321
13322 kfree(phba->vpi_bmask);
13323 kfree(phba->vpi_ids);
13324
13325 lpfc_stop_hba_timers(phba);
13326
13327 phba->pport->work_port_events = 0;
13328
13329 lpfc_sli_hba_down(phba);
13330
13331 lpfc_sli_brdrestart(phba);
13332
13333 lpfc_sli_disable_intr(phba);
13334
13335 return;
13336 }
13337
13338 /**
13339 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13340 * @phba: Pointer to HBA context object.
13341 *
13342 * This function is called in the SLI4 code path to wait for completion
13343 * of device's XRIs exchange busy. It will check the XRI exchange busy
13344 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13345 * that, it will check the XRI exchange busy on outstanding FCP and ELS
13346 * I/Os every 30 seconds, log error message, and wait forever. Only when
13347 * all XRI exchange busy complete, the driver unload shall proceed with
13348 * invoking the function reset ioctl mailbox command to the CNA and the
13349 * the rest of the driver unload resource release.
13350 **/
13351 static void
lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba * phba)13352 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13353 {
13354 struct lpfc_sli4_hdw_queue *qp;
13355 int idx, ccnt;
13356 int wait_time = 0;
13357 int io_xri_cmpl = 1;
13358 int nvmet_xri_cmpl = 1;
13359 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13360
13361 /* Driver just aborted IOs during the hba_unset process. Pause
13362 * here to give the HBA time to complete the IO and get entries
13363 * into the abts lists.
13364 */
13365 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13366
13367 /* Wait for NVME pending IO to flush back to transport. */
13368 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13369 lpfc_nvme_wait_for_io_drain(phba);
13370
13371 ccnt = 0;
13372 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13373 qp = &phba->sli4_hba.hdwq[idx];
13374 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13375 if (!io_xri_cmpl) /* if list is NOT empty */
13376 ccnt++;
13377 }
13378 if (ccnt)
13379 io_xri_cmpl = 0;
13380
13381 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13382 nvmet_xri_cmpl =
13383 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13384 }
13385
13386 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13387 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13388 if (!nvmet_xri_cmpl)
13389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13390 "6424 NVMET XRI exchange busy "
13391 "wait time: %d seconds.\n",
13392 wait_time/1000);
13393 if (!io_xri_cmpl)
13394 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13395 "6100 IO XRI exchange busy "
13396 "wait time: %d seconds.\n",
13397 wait_time/1000);
13398 if (!els_xri_cmpl)
13399 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13400 "2878 ELS XRI exchange busy "
13401 "wait time: %d seconds.\n",
13402 wait_time/1000);
13403 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13404 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13405 } else {
13406 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13407 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13408 }
13409
13410 ccnt = 0;
13411 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13412 qp = &phba->sli4_hba.hdwq[idx];
13413 io_xri_cmpl = list_empty(
13414 &qp->lpfc_abts_io_buf_list);
13415 if (!io_xri_cmpl) /* if list is NOT empty */
13416 ccnt++;
13417 }
13418 if (ccnt)
13419 io_xri_cmpl = 0;
13420
13421 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13422 nvmet_xri_cmpl = list_empty(
13423 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13424 }
13425 els_xri_cmpl =
13426 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13427
13428 }
13429 }
13430
13431 /**
13432 * lpfc_sli4_hba_unset - Unset the fcoe hba
13433 * @phba: Pointer to HBA context object.
13434 *
13435 * This function is called in the SLI4 code path to reset the HBA's FCoE
13436 * function. The caller is not required to hold any lock. This routine
13437 * issues PCI function reset mailbox command to reset the FCoE function.
13438 * At the end of the function, it calls lpfc_hba_down_post function to
13439 * free any pending commands.
13440 **/
13441 static void
lpfc_sli4_hba_unset(struct lpfc_hba * phba)13442 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13443 {
13444 int wait_cnt = 0;
13445 LPFC_MBOXQ_t *mboxq;
13446 struct pci_dev *pdev = phba->pcidev;
13447
13448 lpfc_stop_hba_timers(phba);
13449 hrtimer_cancel(&phba->cmf_stats_timer);
13450 hrtimer_cancel(&phba->cmf_timer);
13451
13452 if (phba->pport)
13453 phba->sli4_hba.intr_enable = 0;
13454
13455 /*
13456 * Gracefully wait out the potential current outstanding asynchronous
13457 * mailbox command.
13458 */
13459
13460 /* First, block any pending async mailbox command from posted */
13461 spin_lock_irq(&phba->hbalock);
13462 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13463 spin_unlock_irq(&phba->hbalock);
13464 /* Now, trying to wait it out if we can */
13465 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13466 msleep(10);
13467 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13468 break;
13469 }
13470 /* Forcefully release the outstanding mailbox command if timed out */
13471 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13472 spin_lock_irq(&phba->hbalock);
13473 mboxq = phba->sli.mbox_active;
13474 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13475 __lpfc_mbox_cmpl_put(phba, mboxq);
13476 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13477 phba->sli.mbox_active = NULL;
13478 spin_unlock_irq(&phba->hbalock);
13479 }
13480
13481 /* Abort all iocbs associated with the hba */
13482 lpfc_sli_hba_iocb_abort(phba);
13483
13484 if (!pci_channel_offline(phba->pcidev))
13485 /* Wait for completion of device XRI exchange busy */
13486 lpfc_sli4_xri_exchange_busy_wait(phba);
13487
13488 /* per-phba callback de-registration for hotplug event */
13489 if (phba->pport)
13490 lpfc_cpuhp_remove(phba);
13491
13492 /* Disable PCI subsystem interrupt */
13493 lpfc_sli4_disable_intr(phba);
13494
13495 /* Disable SR-IOV if enabled */
13496 if (phba->cfg_sriov_nr_virtfn)
13497 pci_disable_sriov(pdev);
13498
13499 /* Stop kthread signal shall trigger work_done one more time */
13500 kthread_stop(phba->worker_thread);
13501
13502 /* Disable FW logging to host memory */
13503 lpfc_ras_stop_fwlog(phba);
13504
13505 lpfc_sli4_queue_unset(phba);
13506
13507 /* Reset SLI4 HBA FCoE function */
13508 lpfc_pci_function_reset(phba);
13509
13510 /* release all queue allocated resources. */
13511 lpfc_sli4_queue_destroy(phba);
13512
13513 /* Free RAS DMA memory */
13514 if (phba->ras_fwlog.ras_enabled)
13515 lpfc_sli4_ras_dma_free(phba);
13516
13517 /* Stop the SLI4 device port */
13518 if (phba->pport)
13519 phba->pport->work_port_events = 0;
13520 }
13521
13522 static uint32_t
lpfc_cgn_crc32(uint32_t crc,u8 byte)13523 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13524 {
13525 uint32_t msb = 0;
13526 uint32_t bit;
13527
13528 for (bit = 0; bit < 8; bit++) {
13529 msb = (crc >> 31) & 1;
13530 crc <<= 1;
13531
13532 if (msb ^ (byte & 1)) {
13533 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13534 crc |= 1;
13535 }
13536 byte >>= 1;
13537 }
13538 return crc;
13539 }
13540
13541 static uint32_t
lpfc_cgn_reverse_bits(uint32_t wd)13542 lpfc_cgn_reverse_bits(uint32_t wd)
13543 {
13544 uint32_t result = 0;
13545 uint32_t i;
13546
13547 for (i = 0; i < 32; i++) {
13548 result <<= 1;
13549 result |= (1 & (wd >> i));
13550 }
13551 return result;
13552 }
13553
13554 /*
13555 * The routine corresponds with the algorithm the HBA firmware
13556 * uses to validate the data integrity.
13557 */
13558 uint32_t
lpfc_cgn_calc_crc32(void * ptr,uint32_t byteLen,uint32_t crc)13559 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13560 {
13561 uint32_t i;
13562 uint32_t result;
13563 uint8_t *data = (uint8_t *)ptr;
13564
13565 for (i = 0; i < byteLen; ++i)
13566 crc = lpfc_cgn_crc32(crc, data[i]);
13567
13568 result = ~lpfc_cgn_reverse_bits(crc);
13569 return result;
13570 }
13571
13572 void
lpfc_init_congestion_buf(struct lpfc_hba * phba)13573 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13574 {
13575 struct lpfc_cgn_info *cp;
13576 uint16_t size;
13577 uint32_t crc;
13578
13579 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13580 "6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13581
13582 if (!phba->cgn_i)
13583 return;
13584 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13585
13586 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13587 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13588 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13589 atomic_set(&phba->cgn_sync_warn_cnt, 0);
13590
13591 atomic_set(&phba->cgn_driver_evt_cnt, 0);
13592 atomic_set(&phba->cgn_latency_evt_cnt, 0);
13593 atomic64_set(&phba->cgn_latency_evt, 0);
13594 phba->cgn_evt_minute = 0;
13595
13596 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13597 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13598 cp->cgn_info_version = LPFC_CGN_INFO_V4;
13599
13600 /* cgn parameters */
13601 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13602 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13603 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13604 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13605
13606 lpfc_cgn_update_tstamp(phba, &cp->base_time);
13607
13608 /* Fill in default LUN qdepth */
13609 if (phba->pport) {
13610 size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13611 cp->cgn_lunq = cpu_to_le16(size);
13612 }
13613
13614 /* last used Index initialized to 0xff already */
13615
13616 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13617 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13618 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13619 cp->cgn_info_crc = cpu_to_le32(crc);
13620
13621 phba->cgn_evt_timestamp = jiffies +
13622 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13623 }
13624
13625 void
lpfc_init_congestion_stat(struct lpfc_hba * phba)13626 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13627 {
13628 struct lpfc_cgn_info *cp;
13629 uint32_t crc;
13630
13631 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13632 "6236 INIT Congestion Stat %p\n", phba->cgn_i);
13633
13634 if (!phba->cgn_i)
13635 return;
13636
13637 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13638 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13639
13640 lpfc_cgn_update_tstamp(phba, &cp->stat_start);
13641 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13642 cp->cgn_info_crc = cpu_to_le32(crc);
13643 }
13644
13645 /**
13646 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13647 * @phba: Pointer to hba context object.
13648 * @reg: flag to determine register or unregister.
13649 */
13650 static int
__lpfc_reg_congestion_buf(struct lpfc_hba * phba,int reg)13651 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13652 {
13653 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13654 union lpfc_sli4_cfg_shdr *shdr;
13655 uint32_t shdr_status, shdr_add_status;
13656 LPFC_MBOXQ_t *mboxq;
13657 int length, rc;
13658
13659 if (!phba->cgn_i)
13660 return -ENXIO;
13661
13662 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13663 if (!mboxq) {
13664 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13665 "2641 REG_CONGESTION_BUF mbox allocation fail: "
13666 "HBA state x%x reg %d\n",
13667 phba->pport->port_state, reg);
13668 return -ENOMEM;
13669 }
13670
13671 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13672 sizeof(struct lpfc_sli4_cfg_mhdr));
13673 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13674 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13675 LPFC_SLI4_MBX_EMBED);
13676 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13677 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13678 if (reg > 0)
13679 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13680 else
13681 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13682 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13683 reg_congestion_buf->addr_lo =
13684 putPaddrLow(phba->cgn_i->phys);
13685 reg_congestion_buf->addr_hi =
13686 putPaddrHigh(phba->cgn_i->phys);
13687
13688 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13689 shdr = (union lpfc_sli4_cfg_shdr *)
13690 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13691 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13692 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13693 &shdr->response);
13694 mempool_free(mboxq, phba->mbox_mem_pool);
13695 if (shdr_status || shdr_add_status || rc) {
13696 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13697 "2642 REG_CONGESTION_BUF mailbox "
13698 "failed with status x%x add_status x%x,"
13699 " mbx status x%x reg %d\n",
13700 shdr_status, shdr_add_status, rc, reg);
13701 return -ENXIO;
13702 }
13703 return 0;
13704 }
13705
13706 int
lpfc_unreg_congestion_buf(struct lpfc_hba * phba)13707 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13708 {
13709 lpfc_cmf_stop(phba);
13710 return __lpfc_reg_congestion_buf(phba, 0);
13711 }
13712
13713 int
lpfc_reg_congestion_buf(struct lpfc_hba * phba)13714 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13715 {
13716 return __lpfc_reg_congestion_buf(phba, 1);
13717 }
13718
13719 /**
13720 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13721 * @phba: Pointer to HBA context object.
13722 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13723 *
13724 * This function is called in the SLI4 code path to read the port's
13725 * sli4 capabilities.
13726 *
13727 * This function may be be called from any context that can block-wait
13728 * for the completion. The expectation is that this routine is called
13729 * typically from probe_one or from the online routine.
13730 **/
13731 int
lpfc_get_sli4_parameters(struct lpfc_hba * phba,LPFC_MBOXQ_t * mboxq)13732 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13733 {
13734 int rc;
13735 struct lpfc_mqe *mqe = &mboxq->u.mqe;
13736 struct lpfc_pc_sli4_params *sli4_params;
13737 uint32_t mbox_tmo;
13738 int length;
13739 bool exp_wqcq_pages = true;
13740 struct lpfc_sli4_parameters *mbx_sli4_parameters;
13741
13742 /*
13743 * By default, the driver assumes the SLI4 port requires RPI
13744 * header postings. The SLI4_PARAM response will correct this
13745 * assumption.
13746 */
13747 phba->sli4_hba.rpi_hdrs_in_use = 1;
13748
13749 /* Read the port's SLI4 Config Parameters */
13750 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13751 sizeof(struct lpfc_sli4_cfg_mhdr));
13752 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13753 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13754 length, LPFC_SLI4_MBX_EMBED);
13755 if (!phba->sli4_hba.intr_enable)
13756 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13757 else {
13758 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13759 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13760 }
13761 if (unlikely(rc))
13762 return rc;
13763 sli4_params = &phba->sli4_hba.pc_sli4_params;
13764 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13765 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13766 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13767 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13768 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13769 mbx_sli4_parameters);
13770 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13771 mbx_sli4_parameters);
13772 if (bf_get(cfg_phwq, mbx_sli4_parameters))
13773 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13774 else
13775 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13776 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13777 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13778 mbx_sli4_parameters);
13779 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13780 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13781 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13782 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13783 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13784 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13785 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13786 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13787 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13788 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13789 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13790 mbx_sli4_parameters);
13791 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13792 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13793 mbx_sli4_parameters);
13794 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13795 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13796 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters);
13797
13798 /* Check for Extended Pre-Registered SGL support */
13799 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13800
13801 /* Check for firmware nvme support */
13802 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13803 bf_get(cfg_xib, mbx_sli4_parameters));
13804
13805 if (rc) {
13806 /* Save this to indicate the Firmware supports NVME */
13807 sli4_params->nvme = 1;
13808
13809 /* Firmware NVME support, check driver FC4 NVME support */
13810 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13811 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13812 "6133 Disabling NVME support: "
13813 "FC4 type not supported: x%x\n",
13814 phba->cfg_enable_fc4_type);
13815 goto fcponly;
13816 }
13817 } else {
13818 /* No firmware NVME support, check driver FC4 NVME support */
13819 sli4_params->nvme = 0;
13820 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13822 "6101 Disabling NVME support: Not "
13823 "supported by firmware (%d %d) x%x\n",
13824 bf_get(cfg_nvme, mbx_sli4_parameters),
13825 bf_get(cfg_xib, mbx_sli4_parameters),
13826 phba->cfg_enable_fc4_type);
13827 fcponly:
13828 phba->nvmet_support = 0;
13829 phba->cfg_nvmet_mrq = 0;
13830 phba->cfg_nvme_seg_cnt = 0;
13831
13832 /* If no FC4 type support, move to just SCSI support */
13833 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13834 return -ENODEV;
13835 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13836 }
13837 }
13838
13839 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13840 * accommodate 512K and 1M IOs in a single nvme buf.
13841 */
13842 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13843 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13844
13845 /* Enable embedded Payload BDE if support is indicated */
13846 if (bf_get(cfg_pbde, mbx_sli4_parameters))
13847 phba->cfg_enable_pbde = 1;
13848 else
13849 phba->cfg_enable_pbde = 0;
13850
13851 /*
13852 * To support Suppress Response feature we must satisfy 3 conditions.
13853 * lpfc_suppress_rsp module parameter must be set (default).
13854 * In SLI4-Parameters Descriptor:
13855 * Extended Inline Buffers (XIB) must be supported.
13856 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13857 * (double negative).
13858 */
13859 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13860 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13861 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13862 else
13863 phba->cfg_suppress_rsp = 0;
13864
13865 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13866 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13867
13868 /* Make sure that sge_supp_len can be handled by the driver */
13869 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13870 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13871
13872 dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len);
13873
13874 /*
13875 * Check whether the adapter supports an embedded copy of the
13876 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13877 * to use this option, 128-byte WQEs must be used.
13878 */
13879 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13880 phba->fcp_embed_io = 1;
13881 else
13882 phba->fcp_embed_io = 0;
13883
13884 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13885 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13886 bf_get(cfg_xib, mbx_sli4_parameters),
13887 phba->cfg_enable_pbde,
13888 phba->fcp_embed_io, sli4_params->nvme,
13889 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13890
13891 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13892 LPFC_SLI_INTF_IF_TYPE_2) &&
13893 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13894 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13895 exp_wqcq_pages = false;
13896
13897 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13898 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13899 exp_wqcq_pages &&
13900 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13901 phba->enab_exp_wqcq_pages = 1;
13902 else
13903 phba->enab_exp_wqcq_pages = 0;
13904 /*
13905 * Check if the SLI port supports MDS Diagnostics
13906 */
13907 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13908 phba->mds_diags_support = 1;
13909 else
13910 phba->mds_diags_support = 0;
13911
13912 /*
13913 * Check if the SLI port supports NSLER
13914 */
13915 if (bf_get(cfg_nsler, mbx_sli4_parameters))
13916 phba->nsler = 1;
13917 else
13918 phba->nsler = 0;
13919
13920 return 0;
13921 }
13922
13923 /**
13924 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13925 * @pdev: pointer to PCI device
13926 * @pid: pointer to PCI device identifier
13927 *
13928 * This routine is to be called to attach a device with SLI-3 interface spec
13929 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13930 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13931 * information of the device and driver to see if the driver state that it can
13932 * support this kind of device. If the match is successful, the driver core
13933 * invokes this routine. If this routine determines it can claim the HBA, it
13934 * does all the initialization that it needs to do to handle the HBA properly.
13935 *
13936 * Return code
13937 * 0 - driver can claim the device
13938 * negative value - driver can not claim the device
13939 **/
13940 static int
lpfc_pci_probe_one_s3(struct pci_dev * pdev,const struct pci_device_id * pid)13941 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13942 {
13943 struct lpfc_hba *phba;
13944 struct lpfc_vport *vport = NULL;
13945 struct Scsi_Host *shost = NULL;
13946 int error;
13947 uint32_t cfg_mode, intr_mode;
13948
13949 /* Allocate memory for HBA structure */
13950 phba = lpfc_hba_alloc(pdev);
13951 if (!phba)
13952 return -ENOMEM;
13953
13954 /* Perform generic PCI device enabling operation */
13955 error = lpfc_enable_pci_dev(phba);
13956 if (error)
13957 goto out_free_phba;
13958
13959 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
13960 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
13961 if (error)
13962 goto out_disable_pci_dev;
13963
13964 /* Set up SLI-3 specific device PCI memory space */
13965 error = lpfc_sli_pci_mem_setup(phba);
13966 if (error) {
13967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13968 "1402 Failed to set up pci memory space.\n");
13969 goto out_disable_pci_dev;
13970 }
13971
13972 /* Set up SLI-3 specific device driver resources */
13973 error = lpfc_sli_driver_resource_setup(phba);
13974 if (error) {
13975 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13976 "1404 Failed to set up driver resource.\n");
13977 goto out_unset_pci_mem_s3;
13978 }
13979
13980 /* Initialize and populate the iocb list per host */
13981
13982 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
13983 if (error) {
13984 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13985 "1405 Failed to initialize iocb list.\n");
13986 goto out_unset_driver_resource_s3;
13987 }
13988
13989 /* Set up common device driver resources */
13990 error = lpfc_setup_driver_resource_phase2(phba);
13991 if (error) {
13992 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13993 "1406 Failed to set up driver resource.\n");
13994 goto out_free_iocb_list;
13995 }
13996
13997 /* Get the default values for Model Name and Description */
13998 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
13999
14000 /* Create SCSI host to the physical port */
14001 error = lpfc_create_shost(phba);
14002 if (error) {
14003 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14004 "1407 Failed to create scsi host.\n");
14005 goto out_unset_driver_resource;
14006 }
14007
14008 /* Configure sysfs attributes */
14009 vport = phba->pport;
14010 error = lpfc_alloc_sysfs_attr(vport);
14011 if (error) {
14012 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14013 "1476 Failed to allocate sysfs attr\n");
14014 goto out_destroy_shost;
14015 }
14016
14017 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14018 /* Now, trying to enable interrupt and bring up the device */
14019 cfg_mode = phba->cfg_use_msi;
14020 while (true) {
14021 /* Put device to a known state before enabling interrupt */
14022 lpfc_stop_port(phba);
14023 /* Configure and enable interrupt */
14024 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14025 if (intr_mode == LPFC_INTR_ERROR) {
14026 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14027 "0431 Failed to enable interrupt.\n");
14028 error = -ENODEV;
14029 goto out_free_sysfs_attr;
14030 }
14031 /* SLI-3 HBA setup */
14032 if (lpfc_sli_hba_setup(phba)) {
14033 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14034 "1477 Failed to set up hba\n");
14035 error = -ENODEV;
14036 goto out_remove_device;
14037 }
14038
14039 /* Wait 50ms for the interrupts of previous mailbox commands */
14040 msleep(50);
14041 /* Check active interrupts on message signaled interrupts */
14042 if (intr_mode == 0 ||
14043 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14044 /* Log the current active interrupt mode */
14045 phba->intr_mode = intr_mode;
14046 lpfc_log_intr_mode(phba, intr_mode);
14047 break;
14048 } else {
14049 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14050 "0447 Configure interrupt mode (%d) "
14051 "failed active interrupt test.\n",
14052 intr_mode);
14053 /* Disable the current interrupt mode */
14054 lpfc_sli_disable_intr(phba);
14055 /* Try next level of interrupt mode */
14056 cfg_mode = --intr_mode;
14057 }
14058 }
14059
14060 /* Perform post initialization setup */
14061 lpfc_post_init_setup(phba);
14062
14063 /* Check if there are static vports to be created. */
14064 lpfc_create_static_vport(phba);
14065
14066 return 0;
14067
14068 out_remove_device:
14069 lpfc_unset_hba(phba);
14070 out_free_sysfs_attr:
14071 lpfc_free_sysfs_attr(vport);
14072 out_destroy_shost:
14073 lpfc_destroy_shost(phba);
14074 out_unset_driver_resource:
14075 lpfc_unset_driver_resource_phase2(phba);
14076 out_free_iocb_list:
14077 lpfc_free_iocb_list(phba);
14078 out_unset_driver_resource_s3:
14079 lpfc_sli_driver_resource_unset(phba);
14080 out_unset_pci_mem_s3:
14081 lpfc_sli_pci_mem_unset(phba);
14082 out_disable_pci_dev:
14083 lpfc_disable_pci_dev(phba);
14084 if (shost)
14085 scsi_host_put(shost);
14086 out_free_phba:
14087 lpfc_hba_free(phba);
14088 return error;
14089 }
14090
14091 /**
14092 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14093 * @pdev: pointer to PCI device
14094 *
14095 * This routine is to be called to disattach a device with SLI-3 interface
14096 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14097 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14098 * device to be removed from the PCI subsystem properly.
14099 **/
14100 static void
lpfc_pci_remove_one_s3(struct pci_dev * pdev)14101 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14102 {
14103 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14104 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14105 struct lpfc_vport **vports;
14106 struct lpfc_hba *phba = vport->phba;
14107 int i;
14108
14109 set_bit(FC_UNLOADING, &vport->load_flag);
14110
14111 lpfc_free_sysfs_attr(vport);
14112
14113 /* Release all the vports against this physical port */
14114 vports = lpfc_create_vport_work_array(phba);
14115 if (vports != NULL)
14116 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14117 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14118 continue;
14119 fc_vport_terminate(vports[i]->fc_vport);
14120 }
14121 lpfc_destroy_vport_work_array(phba, vports);
14122
14123 /* Remove FC host with the physical port */
14124 fc_remove_host(shost);
14125 scsi_remove_host(shost);
14126
14127 /* Clean up all nodes, mailboxes and IOs. */
14128 lpfc_cleanup(vport);
14129
14130 /*
14131 * Bring down the SLI Layer. This step disable all interrupts,
14132 * clears the rings, discards all mailbox commands, and resets
14133 * the HBA.
14134 */
14135
14136 /* HBA interrupt will be disabled after this call */
14137 lpfc_sli_hba_down(phba);
14138 /* Stop kthread signal shall trigger work_done one more time */
14139 kthread_stop(phba->worker_thread);
14140 /* Final cleanup of txcmplq and reset the HBA */
14141 lpfc_sli_brdrestart(phba);
14142
14143 kfree(phba->vpi_bmask);
14144 kfree(phba->vpi_ids);
14145
14146 lpfc_stop_hba_timers(phba);
14147 spin_lock_irq(&phba->port_list_lock);
14148 list_del_init(&vport->listentry);
14149 spin_unlock_irq(&phba->port_list_lock);
14150
14151 lpfc_debugfs_terminate(vport);
14152
14153 /* Disable SR-IOV if enabled */
14154 if (phba->cfg_sriov_nr_virtfn)
14155 pci_disable_sriov(pdev);
14156
14157 /* Disable interrupt */
14158 lpfc_sli_disable_intr(phba);
14159
14160 scsi_host_put(shost);
14161
14162 /*
14163 * Call scsi_free before mem_free since scsi bufs are released to their
14164 * corresponding pools here.
14165 */
14166 lpfc_scsi_free(phba);
14167 lpfc_free_iocb_list(phba);
14168
14169 lpfc_mem_free_all(phba);
14170
14171 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14172 phba->hbqslimp.virt, phba->hbqslimp.phys);
14173
14174 /* Free resources associated with SLI2 interface */
14175 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14176 phba->slim2p.virt, phba->slim2p.phys);
14177
14178 /* unmap adapter SLIM and Control Registers */
14179 iounmap(phba->ctrl_regs_memmap_p);
14180 iounmap(phba->slim_memmap_p);
14181
14182 lpfc_hba_free(phba);
14183
14184 pci_release_mem_regions(pdev);
14185 pci_disable_device(pdev);
14186 }
14187
14188 /**
14189 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14190 * @dev_d: pointer to device
14191 *
14192 * This routine is to be called from the kernel's PCI subsystem to support
14193 * system Power Management (PM) to device with SLI-3 interface spec. When
14194 * PM invokes this method, it quiesces the device by stopping the driver's
14195 * worker thread for the device, turning off device's interrupt and DMA,
14196 * and bring the device offline. Note that as the driver implements the
14197 * minimum PM requirements to a power-aware driver's PM support for the
14198 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14199 * to the suspend() method call will be treated as SUSPEND and the driver will
14200 * fully reinitialize its device during resume() method call, the driver will
14201 * set device to PCI_D3hot state in PCI config space instead of setting it
14202 * according to the @msg provided by the PM.
14203 *
14204 * Return code
14205 * 0 - driver suspended the device
14206 * Error otherwise
14207 **/
14208 static int __maybe_unused
lpfc_pci_suspend_one_s3(struct device * dev_d)14209 lpfc_pci_suspend_one_s3(struct device *dev_d)
14210 {
14211 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14212 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14213
14214 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14215 "0473 PCI device Power Management suspend.\n");
14216
14217 /* Bring down the device */
14218 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14219 lpfc_offline(phba);
14220 kthread_stop(phba->worker_thread);
14221
14222 /* Disable interrupt from device */
14223 lpfc_sli_disable_intr(phba);
14224
14225 return 0;
14226 }
14227
14228 /**
14229 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14230 * @dev_d: pointer to device
14231 *
14232 * This routine is to be called from the kernel's PCI subsystem to support
14233 * system Power Management (PM) to device with SLI-3 interface spec. When PM
14234 * invokes this method, it restores the device's PCI config space state and
14235 * fully reinitializes the device and brings it online. Note that as the
14236 * driver implements the minimum PM requirements to a power-aware driver's
14237 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14238 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14239 * driver will fully reinitialize its device during resume() method call,
14240 * the device will be set to PCI_D0 directly in PCI config space before
14241 * restoring the state.
14242 *
14243 * Return code
14244 * 0 - driver suspended the device
14245 * Error otherwise
14246 **/
14247 static int __maybe_unused
lpfc_pci_resume_one_s3(struct device * dev_d)14248 lpfc_pci_resume_one_s3(struct device *dev_d)
14249 {
14250 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14251 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14252 uint32_t intr_mode;
14253 int error;
14254
14255 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14256 "0452 PCI device Power Management resume.\n");
14257
14258 /* Startup the kernel thread for this host adapter. */
14259 phba->worker_thread = kthread_run(lpfc_do_work, phba,
14260 "lpfc_worker_%d", phba->brd_no);
14261 if (IS_ERR(phba->worker_thread)) {
14262 error = PTR_ERR(phba->worker_thread);
14263 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14264 "0434 PM resume failed to start worker "
14265 "thread: error=x%x.\n", error);
14266 return error;
14267 }
14268
14269 /* Init cpu_map array */
14270 lpfc_cpu_map_array_init(phba);
14271 /* Init hba_eq_hdl array */
14272 lpfc_hba_eq_hdl_array_init(phba);
14273 /* Configure and enable interrupt */
14274 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14275 if (intr_mode == LPFC_INTR_ERROR) {
14276 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14277 "0430 PM resume Failed to enable interrupt\n");
14278 return -EIO;
14279 } else
14280 phba->intr_mode = intr_mode;
14281
14282 /* Restart HBA and bring it online */
14283 lpfc_sli_brdrestart(phba);
14284 lpfc_online(phba);
14285
14286 /* Log the current active interrupt mode */
14287 lpfc_log_intr_mode(phba, phba->intr_mode);
14288
14289 return 0;
14290 }
14291
14292 /**
14293 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14294 * @phba: pointer to lpfc hba data structure.
14295 *
14296 * This routine is called to prepare the SLI3 device for PCI slot recover. It
14297 * aborts all the outstanding SCSI I/Os to the pci device.
14298 **/
14299 static void
lpfc_sli_prep_dev_for_recover(struct lpfc_hba * phba)14300 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14301 {
14302 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14303 "2723 PCI channel I/O abort preparing for recovery\n");
14304
14305 /*
14306 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14307 * and let the SCSI mid-layer to retry them to recover.
14308 */
14309 lpfc_sli_abort_fcp_rings(phba);
14310 }
14311
14312 /**
14313 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14314 * @phba: pointer to lpfc hba data structure.
14315 *
14316 * This routine is called to prepare the SLI3 device for PCI slot reset. It
14317 * disables the device interrupt and pci device, and aborts the internal FCP
14318 * pending I/Os.
14319 **/
14320 static void
lpfc_sli_prep_dev_for_reset(struct lpfc_hba * phba)14321 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14322 {
14323 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14324 "2710 PCI channel disable preparing for reset\n");
14325
14326 /* Block any management I/Os to the device */
14327 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14328
14329 /* Block all SCSI devices' I/Os on the host */
14330 lpfc_scsi_dev_block(phba);
14331
14332 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
14333 lpfc_sli_flush_io_rings(phba);
14334
14335 /* stop all timers */
14336 lpfc_stop_hba_timers(phba);
14337
14338 /* Disable interrupt and pci device */
14339 lpfc_sli_disable_intr(phba);
14340 pci_disable_device(phba->pcidev);
14341 }
14342
14343 /**
14344 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14345 * @phba: pointer to lpfc hba data structure.
14346 *
14347 * This routine is called to prepare the SLI3 device for PCI slot permanently
14348 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14349 * pending I/Os.
14350 **/
14351 static void
lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba * phba)14352 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14353 {
14354 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14355 "2711 PCI channel permanent disable for failure\n");
14356 /* Block all SCSI devices' I/Os on the host */
14357 lpfc_scsi_dev_block(phba);
14358 lpfc_sli4_prep_dev_for_reset(phba);
14359
14360 /* stop all timers */
14361 lpfc_stop_hba_timers(phba);
14362
14363 /* Clean up all driver's outstanding SCSI I/Os */
14364 lpfc_sli_flush_io_rings(phba);
14365 }
14366
14367 /**
14368 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14369 * @pdev: pointer to PCI device.
14370 * @state: the current PCI connection state.
14371 *
14372 * This routine is called from the PCI subsystem for I/O error handling to
14373 * device with SLI-3 interface spec. This function is called by the PCI
14374 * subsystem after a PCI bus error affecting this device has been detected.
14375 * When this function is invoked, it will need to stop all the I/Os and
14376 * interrupt(s) to the device. Once that is done, it will return
14377 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14378 * as desired.
14379 *
14380 * Return codes
14381 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
14382 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14383 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14384 **/
14385 static pci_ers_result_t
lpfc_io_error_detected_s3(struct pci_dev * pdev,pci_channel_state_t state)14386 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14387 {
14388 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14389 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14390
14391 switch (state) {
14392 case pci_channel_io_normal:
14393 /* Non-fatal error, prepare for recovery */
14394 lpfc_sli_prep_dev_for_recover(phba);
14395 return PCI_ERS_RESULT_CAN_RECOVER;
14396 case pci_channel_io_frozen:
14397 /* Fatal error, prepare for slot reset */
14398 lpfc_sli_prep_dev_for_reset(phba);
14399 return PCI_ERS_RESULT_NEED_RESET;
14400 case pci_channel_io_perm_failure:
14401 /* Permanent failure, prepare for device down */
14402 lpfc_sli_prep_dev_for_perm_failure(phba);
14403 return PCI_ERS_RESULT_DISCONNECT;
14404 default:
14405 /* Unknown state, prepare and request slot reset */
14406 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14407 "0472 Unknown PCI error state: x%x\n", state);
14408 lpfc_sli_prep_dev_for_reset(phba);
14409 return PCI_ERS_RESULT_NEED_RESET;
14410 }
14411 }
14412
14413 /**
14414 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14415 * @pdev: pointer to PCI device.
14416 *
14417 * This routine is called from the PCI subsystem for error handling to
14418 * device with SLI-3 interface spec. This is called after PCI bus has been
14419 * reset to restart the PCI card from scratch, as if from a cold-boot.
14420 * During the PCI subsystem error recovery, after driver returns
14421 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14422 * recovery and then call this routine before calling the .resume method
14423 * to recover the device. This function will initialize the HBA device,
14424 * enable the interrupt, but it will just put the HBA to offline state
14425 * without passing any I/O traffic.
14426 *
14427 * Return codes
14428 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
14429 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14430 */
14431 static pci_ers_result_t
lpfc_io_slot_reset_s3(struct pci_dev * pdev)14432 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14433 {
14434 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14435 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14436 struct lpfc_sli *psli = &phba->sli;
14437 uint32_t intr_mode;
14438
14439 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14440 if (pci_enable_device_mem(pdev)) {
14441 printk(KERN_ERR "lpfc: Cannot re-enable "
14442 "PCI device after reset.\n");
14443 return PCI_ERS_RESULT_DISCONNECT;
14444 }
14445
14446 pci_restore_state(pdev);
14447
14448 /*
14449 * As the new kernel behavior of pci_restore_state() API call clears
14450 * device saved_state flag, need to save the restored state again.
14451 */
14452 pci_save_state(pdev);
14453
14454 if (pdev->is_busmaster)
14455 pci_set_master(pdev);
14456
14457 spin_lock_irq(&phba->hbalock);
14458 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14459 spin_unlock_irq(&phba->hbalock);
14460
14461 /* Configure and enable interrupt */
14462 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14463 if (intr_mode == LPFC_INTR_ERROR) {
14464 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14465 "0427 Cannot re-enable interrupt after "
14466 "slot reset.\n");
14467 return PCI_ERS_RESULT_DISCONNECT;
14468 } else
14469 phba->intr_mode = intr_mode;
14470
14471 /* Take device offline, it will perform cleanup */
14472 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14473 lpfc_offline(phba);
14474 lpfc_sli_brdrestart(phba);
14475
14476 /* Log the current active interrupt mode */
14477 lpfc_log_intr_mode(phba, phba->intr_mode);
14478
14479 return PCI_ERS_RESULT_RECOVERED;
14480 }
14481
14482 /**
14483 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14484 * @pdev: pointer to PCI device
14485 *
14486 * This routine is called from the PCI subsystem for error handling to device
14487 * with SLI-3 interface spec. It is called when kernel error recovery tells
14488 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14489 * error recovery. After this call, traffic can start to flow from this device
14490 * again.
14491 */
14492 static void
lpfc_io_resume_s3(struct pci_dev * pdev)14493 lpfc_io_resume_s3(struct pci_dev *pdev)
14494 {
14495 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14496 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14497
14498 /* Bring device online, it will be no-op for non-fatal error resume */
14499 lpfc_online(phba);
14500 }
14501
14502 /**
14503 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14504 * @phba: pointer to lpfc hba data structure.
14505 *
14506 * returns the number of ELS/CT IOCBs to reserve
14507 **/
14508 int
lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba * phba)14509 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14510 {
14511 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14512
14513 if (phba->sli_rev == LPFC_SLI_REV4) {
14514 if (max_xri <= 100)
14515 return 10;
14516 else if (max_xri <= 256)
14517 return 25;
14518 else if (max_xri <= 512)
14519 return 50;
14520 else if (max_xri <= 1024)
14521 return 100;
14522 else if (max_xri <= 1536)
14523 return 150;
14524 else if (max_xri <= 2048)
14525 return 200;
14526 else
14527 return 250;
14528 } else
14529 return 0;
14530 }
14531
14532 /**
14533 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14534 * @phba: pointer to lpfc hba data structure.
14535 *
14536 * returns the number of ELS/CT + NVMET IOCBs to reserve
14537 **/
14538 int
lpfc_sli4_get_iocb_cnt(struct lpfc_hba * phba)14539 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14540 {
14541 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14542
14543 if (phba->nvmet_support)
14544 max_xri += LPFC_NVMET_BUF_POST;
14545 return max_xri;
14546 }
14547
14548
14549 static int
lpfc_log_write_firmware_error(struct lpfc_hba * phba,uint32_t offset,uint32_t magic_number,uint32_t ftype,uint32_t fid,uint32_t fsize,const struct firmware * fw)14550 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14551 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14552 const struct firmware *fw)
14553 {
14554 int rc;
14555 u8 sli_family;
14556
14557 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14558 /* Three cases: (1) FW was not supported on the detected adapter.
14559 * (2) FW update has been locked out administratively.
14560 * (3) Some other error during FW update.
14561 * In each case, an unmaskable message is written to the console
14562 * for admin diagnosis.
14563 */
14564 if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14565 (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14566 magic_number != MAGIC_NUMBER_G6) ||
14567 (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14568 magic_number != MAGIC_NUMBER_G7) ||
14569 (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14570 magic_number != MAGIC_NUMBER_G7P)) {
14571 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14572 "3030 This firmware version is not supported on"
14573 " this HBA model. Device:%x Magic:%x Type:%x "
14574 "ID:%x Size %d %zd\n",
14575 phba->pcidev->device, magic_number, ftype, fid,
14576 fsize, fw->size);
14577 rc = -EINVAL;
14578 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14579 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14580 "3021 Firmware downloads have been prohibited "
14581 "by a system configuration setting on "
14582 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14583 "%zd\n",
14584 phba->pcidev->device, magic_number, ftype, fid,
14585 fsize, fw->size);
14586 rc = -EACCES;
14587 } else {
14588 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14589 "3022 FW Download failed. Add Status x%x "
14590 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14591 "%zd\n",
14592 offset, phba->pcidev->device, magic_number,
14593 ftype, fid, fsize, fw->size);
14594 rc = -EIO;
14595 }
14596 return rc;
14597 }
14598
14599 /**
14600 * lpfc_write_firmware - attempt to write a firmware image to the port
14601 * @fw: pointer to firmware image returned from request_firmware.
14602 * @context: pointer to firmware image returned from request_firmware.
14603 *
14604 **/
14605 static void
lpfc_write_firmware(const struct firmware * fw,void * context)14606 lpfc_write_firmware(const struct firmware *fw, void *context)
14607 {
14608 struct lpfc_hba *phba = (struct lpfc_hba *)context;
14609 char fwrev[FW_REV_STR_SIZE];
14610 struct lpfc_grp_hdr *image;
14611 struct list_head dma_buffer_list;
14612 int i, rc = 0;
14613 struct lpfc_dmabuf *dmabuf, *next;
14614 uint32_t offset = 0, temp_offset = 0;
14615 uint32_t magic_number, ftype, fid, fsize;
14616
14617 /* It can be null in no-wait mode, sanity check */
14618 if (!fw) {
14619 rc = -ENXIO;
14620 goto out;
14621 }
14622 image = (struct lpfc_grp_hdr *)fw->data;
14623
14624 magic_number = be32_to_cpu(image->magic_number);
14625 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14626 fid = bf_get_be32(lpfc_grp_hdr_id, image);
14627 fsize = be32_to_cpu(image->size);
14628
14629 INIT_LIST_HEAD(&dma_buffer_list);
14630 lpfc_decode_firmware_rev(phba, fwrev, 1);
14631 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14632 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14633 "3023 Updating Firmware, Current Version:%s "
14634 "New Version:%s\n",
14635 fwrev, image->revision);
14636 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14637 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
14638 GFP_KERNEL);
14639 if (!dmabuf) {
14640 rc = -ENOMEM;
14641 goto release_out;
14642 }
14643 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14644 SLI4_PAGE_SIZE,
14645 &dmabuf->phys,
14646 GFP_KERNEL);
14647 if (!dmabuf->virt) {
14648 kfree(dmabuf);
14649 rc = -ENOMEM;
14650 goto release_out;
14651 }
14652 list_add_tail(&dmabuf->list, &dma_buffer_list);
14653 }
14654 while (offset < fw->size) {
14655 temp_offset = offset;
14656 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14657 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14658 memcpy(dmabuf->virt,
14659 fw->data + temp_offset,
14660 fw->size - temp_offset);
14661 temp_offset = fw->size;
14662 break;
14663 }
14664 memcpy(dmabuf->virt, fw->data + temp_offset,
14665 SLI4_PAGE_SIZE);
14666 temp_offset += SLI4_PAGE_SIZE;
14667 }
14668 rc = lpfc_wr_object(phba, &dma_buffer_list,
14669 (fw->size - offset), &offset);
14670 if (rc) {
14671 rc = lpfc_log_write_firmware_error(phba, offset,
14672 magic_number,
14673 ftype,
14674 fid,
14675 fsize,
14676 fw);
14677 goto release_out;
14678 }
14679 }
14680 rc = offset;
14681 } else
14682 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14683 "3029 Skipped Firmware update, Current "
14684 "Version:%s New Version:%s\n",
14685 fwrev, image->revision);
14686
14687 release_out:
14688 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14689 list_del(&dmabuf->list);
14690 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14691 dmabuf->virt, dmabuf->phys);
14692 kfree(dmabuf);
14693 }
14694 release_firmware(fw);
14695 out:
14696 if (rc < 0)
14697 lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI,
14698 "3062 Firmware update error, status %d.\n", rc);
14699 else
14700 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14701 "3024 Firmware update success: size %d.\n", rc);
14702 }
14703
14704 /**
14705 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14706 * @phba: pointer to lpfc hba data structure.
14707 * @fw_upgrade: which firmware to update.
14708 *
14709 * This routine is called to perform Linux generic firmware upgrade on device
14710 * that supports such feature.
14711 **/
14712 int
lpfc_sli4_request_firmware_update(struct lpfc_hba * phba,uint8_t fw_upgrade)14713 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14714 {
14715 char file_name[ELX_FW_NAME_SIZE] = {0};
14716 int ret;
14717 const struct firmware *fw;
14718
14719 /* Only supported on SLI4 interface type 2 for now */
14720 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14721 LPFC_SLI_INTF_IF_TYPE_2)
14722 return -EPERM;
14723
14724 scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName);
14725
14726 if (fw_upgrade == INT_FW_UPGRADE) {
14727 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14728 file_name, &phba->pcidev->dev,
14729 GFP_KERNEL, (void *)phba,
14730 lpfc_write_firmware);
14731 } else if (fw_upgrade == RUN_FW_UPGRADE) {
14732 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14733 if (!ret)
14734 lpfc_write_firmware(fw, (void *)phba);
14735 } else {
14736 ret = -EINVAL;
14737 }
14738
14739 return ret;
14740 }
14741
14742 /**
14743 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14744 * @pdev: pointer to PCI device
14745 * @pid: pointer to PCI device identifier
14746 *
14747 * This routine is called from the kernel's PCI subsystem to device with
14748 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14749 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14750 * information of the device and driver to see if the driver state that it
14751 * can support this kind of device. If the match is successful, the driver
14752 * core invokes this routine. If this routine determines it can claim the HBA,
14753 * it does all the initialization that it needs to do to handle the HBA
14754 * properly.
14755 *
14756 * Return code
14757 * 0 - driver can claim the device
14758 * negative value - driver can not claim the device
14759 **/
14760 static int
lpfc_pci_probe_one_s4(struct pci_dev * pdev,const struct pci_device_id * pid)14761 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14762 {
14763 struct lpfc_hba *phba;
14764 struct lpfc_vport *vport = NULL;
14765 struct Scsi_Host *shost = NULL;
14766 int error;
14767 uint32_t cfg_mode, intr_mode;
14768
14769 /* Allocate memory for HBA structure */
14770 phba = lpfc_hba_alloc(pdev);
14771 if (!phba)
14772 return -ENOMEM;
14773
14774 INIT_LIST_HEAD(&phba->poll_list);
14775
14776 /* Perform generic PCI device enabling operation */
14777 error = lpfc_enable_pci_dev(phba);
14778 if (error)
14779 goto out_free_phba;
14780
14781 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
14782 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14783 if (error)
14784 goto out_disable_pci_dev;
14785
14786 /* Set up SLI-4 specific device PCI memory space */
14787 error = lpfc_sli4_pci_mem_setup(phba);
14788 if (error) {
14789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14790 "1410 Failed to set up pci memory space.\n");
14791 goto out_disable_pci_dev;
14792 }
14793
14794 /* Set up SLI-4 Specific device driver resources */
14795 error = lpfc_sli4_driver_resource_setup(phba);
14796 if (error) {
14797 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14798 "1412 Failed to set up driver resource.\n");
14799 goto out_unset_pci_mem_s4;
14800 }
14801
14802 spin_lock_init(&phba->rrq_list_lock);
14803 INIT_LIST_HEAD(&phba->active_rrq_list);
14804 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14805
14806 /* Set up common device driver resources */
14807 error = lpfc_setup_driver_resource_phase2(phba);
14808 if (error) {
14809 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14810 "1414 Failed to set up driver resource.\n");
14811 goto out_unset_driver_resource_s4;
14812 }
14813
14814 /* Get the default values for Model Name and Description */
14815 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14816
14817 /* Now, trying to enable interrupt and bring up the device */
14818 cfg_mode = phba->cfg_use_msi;
14819
14820 /* Put device to a known state before enabling interrupt */
14821 phba->pport = NULL;
14822 lpfc_stop_port(phba);
14823
14824 /* Init cpu_map array */
14825 lpfc_cpu_map_array_init(phba);
14826
14827 /* Init hba_eq_hdl array */
14828 lpfc_hba_eq_hdl_array_init(phba);
14829
14830 /* Configure and enable interrupt */
14831 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14832 if (intr_mode == LPFC_INTR_ERROR) {
14833 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14834 "0426 Failed to enable interrupt.\n");
14835 error = -ENODEV;
14836 goto out_unset_driver_resource;
14837 }
14838 /* Default to single EQ for non-MSI-X */
14839 if (phba->intr_type != MSIX) {
14840 phba->cfg_irq_chann = 1;
14841 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14842 if (phba->nvmet_support)
14843 phba->cfg_nvmet_mrq = 1;
14844 }
14845 }
14846 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14847
14848 /* Create SCSI host to the physical port */
14849 error = lpfc_create_shost(phba);
14850 if (error) {
14851 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14852 "1415 Failed to create scsi host.\n");
14853 goto out_disable_intr;
14854 }
14855 vport = phba->pport;
14856 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14857
14858 /* Configure sysfs attributes */
14859 error = lpfc_alloc_sysfs_attr(vport);
14860 if (error) {
14861 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14862 "1416 Failed to allocate sysfs attr\n");
14863 goto out_destroy_shost;
14864 }
14865
14866 /* Set up SLI-4 HBA */
14867 if (lpfc_sli4_hba_setup(phba)) {
14868 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14869 "1421 Failed to set up hba\n");
14870 error = -ENODEV;
14871 goto out_free_sysfs_attr;
14872 }
14873
14874 /* Log the current active interrupt mode */
14875 phba->intr_mode = intr_mode;
14876 lpfc_log_intr_mode(phba, intr_mode);
14877
14878 /* Perform post initialization setup */
14879 lpfc_post_init_setup(phba);
14880
14881 /* NVME support in FW earlier in the driver load corrects the
14882 * FC4 type making a check for nvme_support unnecessary.
14883 */
14884 if (phba->nvmet_support == 0) {
14885 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14886 /* Create NVME binding with nvme_fc_transport. This
14887 * ensures the vport is initialized. If the localport
14888 * create fails, it should not unload the driver to
14889 * support field issues.
14890 */
14891 error = lpfc_nvme_create_localport(vport);
14892 if (error) {
14893 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14894 "6004 NVME registration "
14895 "failed, error x%x\n",
14896 error);
14897 }
14898 }
14899 }
14900
14901 /* check for firmware upgrade or downgrade */
14902 if (phba->cfg_request_firmware_upgrade)
14903 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14904
14905 /* Check if there are static vports to be created. */
14906 lpfc_create_static_vport(phba);
14907
14908 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14909 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14910
14911 return 0;
14912
14913 out_free_sysfs_attr:
14914 lpfc_free_sysfs_attr(vport);
14915 out_destroy_shost:
14916 lpfc_destroy_shost(phba);
14917 out_disable_intr:
14918 lpfc_sli4_disable_intr(phba);
14919 out_unset_driver_resource:
14920 lpfc_unset_driver_resource_phase2(phba);
14921 out_unset_driver_resource_s4:
14922 lpfc_sli4_driver_resource_unset(phba);
14923 out_unset_pci_mem_s4:
14924 lpfc_sli4_pci_mem_unset(phba);
14925 out_disable_pci_dev:
14926 lpfc_disable_pci_dev(phba);
14927 if (shost)
14928 scsi_host_put(shost);
14929 out_free_phba:
14930 lpfc_hba_free(phba);
14931 return error;
14932 }
14933
14934 /**
14935 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14936 * @pdev: pointer to PCI device
14937 *
14938 * This routine is called from the kernel's PCI subsystem to device with
14939 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14940 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14941 * device to be removed from the PCI subsystem properly.
14942 **/
14943 static void
lpfc_pci_remove_one_s4(struct pci_dev * pdev)14944 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14945 {
14946 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14947 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14948 struct lpfc_vport **vports;
14949 struct lpfc_hba *phba = vport->phba;
14950 int i;
14951
14952 /* Mark the device unloading flag */
14953 set_bit(FC_UNLOADING, &vport->load_flag);
14954 if (phba->cgn_i)
14955 lpfc_unreg_congestion_buf(phba);
14956
14957 lpfc_free_sysfs_attr(vport);
14958
14959 /* Release all the vports against this physical port */
14960 vports = lpfc_create_vport_work_array(phba);
14961 if (vports != NULL)
14962 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14963 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14964 continue;
14965 fc_vport_terminate(vports[i]->fc_vport);
14966 }
14967 lpfc_destroy_vport_work_array(phba, vports);
14968
14969 /* Remove FC host with the physical port */
14970 fc_remove_host(shost);
14971 scsi_remove_host(shost);
14972
14973 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
14974 * localports are destroyed after to cleanup all transport memory.
14975 */
14976 lpfc_cleanup(vport);
14977 lpfc_nvmet_destroy_targetport(phba);
14978 lpfc_nvme_destroy_localport(vport);
14979
14980 /* De-allocate multi-XRI pools */
14981 if (phba->cfg_xri_rebalancing)
14982 lpfc_destroy_multixri_pools(phba);
14983
14984 /*
14985 * Bring down the SLI Layer. This step disables all interrupts,
14986 * clears the rings, discards all mailbox commands, and resets
14987 * the HBA FCoE function.
14988 */
14989 lpfc_debugfs_terminate(vport);
14990
14991 lpfc_stop_hba_timers(phba);
14992 spin_lock_irq(&phba->port_list_lock);
14993 list_del_init(&vport->listentry);
14994 spin_unlock_irq(&phba->port_list_lock);
14995
14996 /* Perform scsi free before driver resource_unset since scsi
14997 * buffers are released to their corresponding pools here.
14998 */
14999 lpfc_io_free(phba);
15000 lpfc_free_iocb_list(phba);
15001 lpfc_sli4_hba_unset(phba);
15002
15003 lpfc_unset_driver_resource_phase2(phba);
15004 lpfc_sli4_driver_resource_unset(phba);
15005
15006 /* Unmap adapter Control and Doorbell registers */
15007 lpfc_sli4_pci_mem_unset(phba);
15008
15009 /* Release PCI resources and disable device's PCI function */
15010 scsi_host_put(shost);
15011 lpfc_disable_pci_dev(phba);
15012
15013 /* Finally, free the driver's device data structure */
15014 lpfc_hba_free(phba);
15015
15016 return;
15017 }
15018
15019 /**
15020 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
15021 * @dev_d: pointer to device
15022 *
15023 * This routine is called from the kernel's PCI subsystem to support system
15024 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
15025 * this method, it quiesces the device by stopping the driver's worker
15026 * thread for the device, turning off device's interrupt and DMA, and bring
15027 * the device offline. Note that as the driver implements the minimum PM
15028 * requirements to a power-aware driver's PM support for suspend/resume -- all
15029 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
15030 * method call will be treated as SUSPEND and the driver will fully
15031 * reinitialize its device during resume() method call, the driver will set
15032 * device to PCI_D3hot state in PCI config space instead of setting it
15033 * according to the @msg provided by the PM.
15034 *
15035 * Return code
15036 * 0 - driver suspended the device
15037 * Error otherwise
15038 **/
15039 static int __maybe_unused
lpfc_pci_suspend_one_s4(struct device * dev_d)15040 lpfc_pci_suspend_one_s4(struct device *dev_d)
15041 {
15042 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15043 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15044
15045 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15046 "2843 PCI device Power Management suspend.\n");
15047
15048 /* Bring down the device */
15049 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15050 lpfc_offline(phba);
15051 kthread_stop(phba->worker_thread);
15052
15053 /* Disable interrupt from device */
15054 lpfc_sli4_disable_intr(phba);
15055 lpfc_sli4_queue_destroy(phba);
15056
15057 return 0;
15058 }
15059
15060 /**
15061 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15062 * @dev_d: pointer to device
15063 *
15064 * This routine is called from the kernel's PCI subsystem to support system
15065 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15066 * this method, it restores the device's PCI config space state and fully
15067 * reinitializes the device and brings it online. Note that as the driver
15068 * implements the minimum PM requirements to a power-aware driver's PM for
15069 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15070 * to the suspend() method call will be treated as SUSPEND and the driver
15071 * will fully reinitialize its device during resume() method call, the device
15072 * will be set to PCI_D0 directly in PCI config space before restoring the
15073 * state.
15074 *
15075 * Return code
15076 * 0 - driver suspended the device
15077 * Error otherwise
15078 **/
15079 static int __maybe_unused
lpfc_pci_resume_one_s4(struct device * dev_d)15080 lpfc_pci_resume_one_s4(struct device *dev_d)
15081 {
15082 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15083 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15084 uint32_t intr_mode;
15085 int error;
15086
15087 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15088 "0292 PCI device Power Management resume.\n");
15089
15090 /* Startup the kernel thread for this host adapter. */
15091 phba->worker_thread = kthread_run(lpfc_do_work, phba,
15092 "lpfc_worker_%d", phba->brd_no);
15093 if (IS_ERR(phba->worker_thread)) {
15094 error = PTR_ERR(phba->worker_thread);
15095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15096 "0293 PM resume failed to start worker "
15097 "thread: error=x%x.\n", error);
15098 return error;
15099 }
15100
15101 /* Configure and enable interrupt */
15102 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15103 if (intr_mode == LPFC_INTR_ERROR) {
15104 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15105 "0294 PM resume Failed to enable interrupt\n");
15106 return -EIO;
15107 } else
15108 phba->intr_mode = intr_mode;
15109
15110 /* Restart HBA and bring it online */
15111 lpfc_sli_brdrestart(phba);
15112 lpfc_online(phba);
15113
15114 /* Log the current active interrupt mode */
15115 lpfc_log_intr_mode(phba, phba->intr_mode);
15116
15117 return 0;
15118 }
15119
15120 /**
15121 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15122 * @phba: pointer to lpfc hba data structure.
15123 *
15124 * This routine is called to prepare the SLI4 device for PCI slot recover. It
15125 * aborts all the outstanding SCSI I/Os to the pci device.
15126 **/
15127 static void
lpfc_sli4_prep_dev_for_recover(struct lpfc_hba * phba)15128 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15129 {
15130 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15131 "2828 PCI channel I/O abort preparing for recovery\n");
15132 /*
15133 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15134 * and let the SCSI mid-layer to retry them to recover.
15135 */
15136 lpfc_sli_abort_fcp_rings(phba);
15137 }
15138
15139 /**
15140 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15141 * @phba: pointer to lpfc hba data structure.
15142 *
15143 * This routine is called to prepare the SLI4 device for PCI slot reset. It
15144 * disables the device interrupt and pci device, and aborts the internal FCP
15145 * pending I/Os.
15146 **/
15147 static void
lpfc_sli4_prep_dev_for_reset(struct lpfc_hba * phba)15148 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15149 {
15150 int offline = pci_channel_offline(phba->pcidev);
15151
15152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15153 "2826 PCI channel disable preparing for reset offline"
15154 " %d\n", offline);
15155
15156 /* Block any management I/Os to the device */
15157 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15158
15159
15160 /* HBA_PCI_ERR was set in io_error_detect */
15161 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15162 /* Flush all driver's outstanding I/Os as we are to reset */
15163 lpfc_sli_flush_io_rings(phba);
15164 lpfc_offline(phba);
15165
15166 /* stop all timers */
15167 lpfc_stop_hba_timers(phba);
15168
15169 lpfc_sli4_queue_destroy(phba);
15170 /* Disable interrupt and pci device */
15171 lpfc_sli4_disable_intr(phba);
15172 pci_disable_device(phba->pcidev);
15173 }
15174
15175 /**
15176 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15177 * @phba: pointer to lpfc hba data structure.
15178 *
15179 * This routine is called to prepare the SLI4 device for PCI slot permanently
15180 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15181 * pending I/Os.
15182 **/
15183 static void
lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba * phba)15184 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15185 {
15186 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15187 "2827 PCI channel permanent disable for failure\n");
15188
15189 /* Block all SCSI devices' I/Os on the host */
15190 lpfc_scsi_dev_block(phba);
15191
15192 /* stop all timers */
15193 lpfc_stop_hba_timers(phba);
15194
15195 /* Clean up all driver's outstanding I/Os */
15196 lpfc_sli_flush_io_rings(phba);
15197 }
15198
15199 /**
15200 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15201 * @pdev: pointer to PCI device.
15202 * @state: the current PCI connection state.
15203 *
15204 * This routine is called from the PCI subsystem for error handling to device
15205 * with SLI-4 interface spec. This function is called by the PCI subsystem
15206 * after a PCI bus error affecting this device has been detected. When this
15207 * function is invoked, it will need to stop all the I/Os and interrupt(s)
15208 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15209 * for the PCI subsystem to perform proper recovery as desired.
15210 *
15211 * Return codes
15212 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15213 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15214 **/
15215 static pci_ers_result_t
lpfc_io_error_detected_s4(struct pci_dev * pdev,pci_channel_state_t state)15216 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15217 {
15218 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15219 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15220 bool hba_pci_err;
15221
15222 switch (state) {
15223 case pci_channel_io_normal:
15224 /* Non-fatal error, prepare for recovery */
15225 lpfc_sli4_prep_dev_for_recover(phba);
15226 return PCI_ERS_RESULT_CAN_RECOVER;
15227 case pci_channel_io_frozen:
15228 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15229 /* Fatal error, prepare for slot reset */
15230 if (!hba_pci_err)
15231 lpfc_sli4_prep_dev_for_reset(phba);
15232 else
15233 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15234 "2832 Already handling PCI error "
15235 "state: x%x\n", state);
15236 return PCI_ERS_RESULT_NEED_RESET;
15237 case pci_channel_io_perm_failure:
15238 set_bit(HBA_PCI_ERR, &phba->bit_flags);
15239 /* Permanent failure, prepare for device down */
15240 lpfc_sli4_prep_dev_for_perm_failure(phba);
15241 return PCI_ERS_RESULT_DISCONNECT;
15242 default:
15243 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15244 if (!hba_pci_err)
15245 lpfc_sli4_prep_dev_for_reset(phba);
15246 /* Unknown state, prepare and request slot reset */
15247 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15248 "2825 Unknown PCI error state: x%x\n", state);
15249 lpfc_sli4_prep_dev_for_reset(phba);
15250 return PCI_ERS_RESULT_NEED_RESET;
15251 }
15252 }
15253
15254 /**
15255 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15256 * @pdev: pointer to PCI device.
15257 *
15258 * This routine is called from the PCI subsystem for error handling to device
15259 * with SLI-4 interface spec. It is called after PCI bus has been reset to
15260 * restart the PCI card from scratch, as if from a cold-boot. During the
15261 * PCI subsystem error recovery, after the driver returns
15262 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15263 * recovery and then call this routine before calling the .resume method to
15264 * recover the device. This function will initialize the HBA device, enable
15265 * the interrupt, but it will just put the HBA to offline state without
15266 * passing any I/O traffic.
15267 *
15268 * Return codes
15269 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15270 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15271 */
15272 static pci_ers_result_t
lpfc_io_slot_reset_s4(struct pci_dev * pdev)15273 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15274 {
15275 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15276 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15277 struct lpfc_sli *psli = &phba->sli;
15278 uint32_t intr_mode;
15279 bool hba_pci_err;
15280
15281 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15282 if (pci_enable_device_mem(pdev)) {
15283 printk(KERN_ERR "lpfc: Cannot re-enable "
15284 "PCI device after reset.\n");
15285 return PCI_ERS_RESULT_DISCONNECT;
15286 }
15287
15288 pci_restore_state(pdev);
15289
15290 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15291 if (!hba_pci_err)
15292 dev_info(&pdev->dev,
15293 "hba_pci_err was not set, recovering slot reset.\n");
15294 /*
15295 * As the new kernel behavior of pci_restore_state() API call clears
15296 * device saved_state flag, need to save the restored state again.
15297 */
15298 pci_save_state(pdev);
15299
15300 if (pdev->is_busmaster)
15301 pci_set_master(pdev);
15302
15303 spin_lock_irq(&phba->hbalock);
15304 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15305 spin_unlock_irq(&phba->hbalock);
15306
15307 /* Init cpu_map array */
15308 lpfc_cpu_map_array_init(phba);
15309 /* Configure and enable interrupt */
15310 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15311 if (intr_mode == LPFC_INTR_ERROR) {
15312 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15313 "2824 Cannot re-enable interrupt after "
15314 "slot reset.\n");
15315 return PCI_ERS_RESULT_DISCONNECT;
15316 } else
15317 phba->intr_mode = intr_mode;
15318 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15319
15320 /* Log the current active interrupt mode */
15321 lpfc_log_intr_mode(phba, phba->intr_mode);
15322
15323 return PCI_ERS_RESULT_RECOVERED;
15324 }
15325
15326 /**
15327 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15328 * @pdev: pointer to PCI device
15329 *
15330 * This routine is called from the PCI subsystem for error handling to device
15331 * with SLI-4 interface spec. It is called when kernel error recovery tells
15332 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15333 * error recovery. After this call, traffic can start to flow from this device
15334 * again.
15335 **/
15336 static void
lpfc_io_resume_s4(struct pci_dev * pdev)15337 lpfc_io_resume_s4(struct pci_dev *pdev)
15338 {
15339 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15340 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15341
15342 /*
15343 * In case of slot reset, as function reset is performed through
15344 * mailbox command which needs DMA to be enabled, this operation
15345 * has to be moved to the io resume phase. Taking device offline
15346 * will perform the necessary cleanup.
15347 */
15348 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15349 /* Perform device reset */
15350 lpfc_sli_brdrestart(phba);
15351 /* Bring the device back online */
15352 lpfc_online(phba);
15353 }
15354 }
15355
15356 /**
15357 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15358 * @pdev: pointer to PCI device
15359 * @pid: pointer to PCI device identifier
15360 *
15361 * This routine is to be registered to the kernel's PCI subsystem. When an
15362 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15363 * at PCI device-specific information of the device and driver to see if the
15364 * driver state that it can support this kind of device. If the match is
15365 * successful, the driver core invokes this routine. This routine dispatches
15366 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15367 * do all the initialization that it needs to do to handle the HBA device
15368 * properly.
15369 *
15370 * Return code
15371 * 0 - driver can claim the device
15372 * negative value - driver can not claim the device
15373 **/
15374 static int
lpfc_pci_probe_one(struct pci_dev * pdev,const struct pci_device_id * pid)15375 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15376 {
15377 int rc;
15378 struct lpfc_sli_intf intf;
15379
15380 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15381 return -ENODEV;
15382
15383 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15384 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15385 rc = lpfc_pci_probe_one_s4(pdev, pid);
15386 else
15387 rc = lpfc_pci_probe_one_s3(pdev, pid);
15388
15389 return rc;
15390 }
15391
15392 /**
15393 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15394 * @pdev: pointer to PCI device
15395 *
15396 * This routine is to be registered to the kernel's PCI subsystem. When an
15397 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15398 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15399 * remove routine, which will perform all the necessary cleanup for the
15400 * device to be removed from the PCI subsystem properly.
15401 **/
15402 static void
lpfc_pci_remove_one(struct pci_dev * pdev)15403 lpfc_pci_remove_one(struct pci_dev *pdev)
15404 {
15405 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15406 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15407
15408 switch (phba->pci_dev_grp) {
15409 case LPFC_PCI_DEV_LP:
15410 lpfc_pci_remove_one_s3(pdev);
15411 break;
15412 case LPFC_PCI_DEV_OC:
15413 lpfc_pci_remove_one_s4(pdev);
15414 break;
15415 default:
15416 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15417 "1424 Invalid PCI device group: 0x%x\n",
15418 phba->pci_dev_grp);
15419 break;
15420 }
15421 return;
15422 }
15423
15424 /**
15425 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15426 * @dev: pointer to device
15427 *
15428 * This routine is to be registered to the kernel's PCI subsystem to support
15429 * system Power Management (PM). When PM invokes this method, it dispatches
15430 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15431 * suspend the device.
15432 *
15433 * Return code
15434 * 0 - driver suspended the device
15435 * Error otherwise
15436 **/
15437 static int __maybe_unused
lpfc_pci_suspend_one(struct device * dev)15438 lpfc_pci_suspend_one(struct device *dev)
15439 {
15440 struct Scsi_Host *shost = dev_get_drvdata(dev);
15441 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15442 int rc = -ENODEV;
15443
15444 switch (phba->pci_dev_grp) {
15445 case LPFC_PCI_DEV_LP:
15446 rc = lpfc_pci_suspend_one_s3(dev);
15447 break;
15448 case LPFC_PCI_DEV_OC:
15449 rc = lpfc_pci_suspend_one_s4(dev);
15450 break;
15451 default:
15452 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15453 "1425 Invalid PCI device group: 0x%x\n",
15454 phba->pci_dev_grp);
15455 break;
15456 }
15457 return rc;
15458 }
15459
15460 /**
15461 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15462 * @dev: pointer to device
15463 *
15464 * This routine is to be registered to the kernel's PCI subsystem to support
15465 * system Power Management (PM). When PM invokes this method, it dispatches
15466 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15467 * resume the device.
15468 *
15469 * Return code
15470 * 0 - driver suspended the device
15471 * Error otherwise
15472 **/
15473 static int __maybe_unused
lpfc_pci_resume_one(struct device * dev)15474 lpfc_pci_resume_one(struct device *dev)
15475 {
15476 struct Scsi_Host *shost = dev_get_drvdata(dev);
15477 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15478 int rc = -ENODEV;
15479
15480 switch (phba->pci_dev_grp) {
15481 case LPFC_PCI_DEV_LP:
15482 rc = lpfc_pci_resume_one_s3(dev);
15483 break;
15484 case LPFC_PCI_DEV_OC:
15485 rc = lpfc_pci_resume_one_s4(dev);
15486 break;
15487 default:
15488 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15489 "1426 Invalid PCI device group: 0x%x\n",
15490 phba->pci_dev_grp);
15491 break;
15492 }
15493 return rc;
15494 }
15495
15496 /**
15497 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15498 * @pdev: pointer to PCI device.
15499 * @state: the current PCI connection state.
15500 *
15501 * This routine is registered to the PCI subsystem for error handling. This
15502 * function is called by the PCI subsystem after a PCI bus error affecting
15503 * this device has been detected. When this routine is invoked, it dispatches
15504 * the action to the proper SLI-3 or SLI-4 device error detected handling
15505 * routine, which will perform the proper error detected operation.
15506 *
15507 * Return codes
15508 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15509 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15510 **/
15511 static pci_ers_result_t
lpfc_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)15512 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15513 {
15514 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15515 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15516 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15517
15518 if (phba->link_state == LPFC_HBA_ERROR &&
15519 test_bit(HBA_IOQ_FLUSH, &phba->hba_flag))
15520 return PCI_ERS_RESULT_NEED_RESET;
15521
15522 switch (phba->pci_dev_grp) {
15523 case LPFC_PCI_DEV_LP:
15524 rc = lpfc_io_error_detected_s3(pdev, state);
15525 break;
15526 case LPFC_PCI_DEV_OC:
15527 rc = lpfc_io_error_detected_s4(pdev, state);
15528 break;
15529 default:
15530 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15531 "1427 Invalid PCI device group: 0x%x\n",
15532 phba->pci_dev_grp);
15533 break;
15534 }
15535 return rc;
15536 }
15537
15538 /**
15539 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15540 * @pdev: pointer to PCI device.
15541 *
15542 * This routine is registered to the PCI subsystem for error handling. This
15543 * function is called after PCI bus has been reset to restart the PCI card
15544 * from scratch, as if from a cold-boot. When this routine is invoked, it
15545 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15546 * routine, which will perform the proper device reset.
15547 *
15548 * Return codes
15549 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15550 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15551 **/
15552 static pci_ers_result_t
lpfc_io_slot_reset(struct pci_dev * pdev)15553 lpfc_io_slot_reset(struct pci_dev *pdev)
15554 {
15555 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15556 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15557 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15558
15559 switch (phba->pci_dev_grp) {
15560 case LPFC_PCI_DEV_LP:
15561 rc = lpfc_io_slot_reset_s3(pdev);
15562 break;
15563 case LPFC_PCI_DEV_OC:
15564 rc = lpfc_io_slot_reset_s4(pdev);
15565 break;
15566 default:
15567 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15568 "1428 Invalid PCI device group: 0x%x\n",
15569 phba->pci_dev_grp);
15570 break;
15571 }
15572 return rc;
15573 }
15574
15575 /**
15576 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15577 * @pdev: pointer to PCI device
15578 *
15579 * This routine is registered to the PCI subsystem for error handling. It
15580 * is called when kernel error recovery tells the lpfc driver that it is
15581 * OK to resume normal PCI operation after PCI bus error recovery. When
15582 * this routine is invoked, it dispatches the action to the proper SLI-3
15583 * or SLI-4 device io_resume routine, which will resume the device operation.
15584 **/
15585 static void
lpfc_io_resume(struct pci_dev * pdev)15586 lpfc_io_resume(struct pci_dev *pdev)
15587 {
15588 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15589 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15590
15591 switch (phba->pci_dev_grp) {
15592 case LPFC_PCI_DEV_LP:
15593 lpfc_io_resume_s3(pdev);
15594 break;
15595 case LPFC_PCI_DEV_OC:
15596 lpfc_io_resume_s4(pdev);
15597 break;
15598 default:
15599 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15600 "1429 Invalid PCI device group: 0x%x\n",
15601 phba->pci_dev_grp);
15602 break;
15603 }
15604 return;
15605 }
15606
15607 /**
15608 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15609 * @phba: pointer to lpfc hba data structure.
15610 *
15611 * This routine checks to see if OAS is supported for this adapter. If
15612 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
15613 * the enable oas flag is cleared and the pool created for OAS device data
15614 * is destroyed.
15615 *
15616 **/
15617 static void
lpfc_sli4_oas_verify(struct lpfc_hba * phba)15618 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15619 {
15620
15621 if (!phba->cfg_EnableXLane)
15622 return;
15623
15624 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15625 phba->cfg_fof = 1;
15626 } else {
15627 phba->cfg_fof = 0;
15628 mempool_destroy(phba->device_data_mem_pool);
15629 phba->device_data_mem_pool = NULL;
15630 }
15631
15632 return;
15633 }
15634
15635 /**
15636 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15637 * @phba: pointer to lpfc hba data structure.
15638 *
15639 * This routine checks to see if RAS is supported by the adapter. Check the
15640 * function through which RAS support enablement is to be done.
15641 **/
15642 void
lpfc_sli4_ras_init(struct lpfc_hba * phba)15643 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15644 {
15645 /* if ASIC_GEN_NUM >= 0xC) */
15646 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15647 LPFC_SLI_INTF_IF_TYPE_6) ||
15648 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15649 LPFC_SLI_INTF_FAMILY_G6)) {
15650 phba->ras_fwlog.ras_hwsupport = true;
15651 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15652 phba->cfg_ras_fwlog_buffsize)
15653 phba->ras_fwlog.ras_enabled = true;
15654 else
15655 phba->ras_fwlog.ras_enabled = false;
15656 } else {
15657 phba->ras_fwlog.ras_hwsupport = false;
15658 }
15659 }
15660
15661
15662 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15663
15664 static const struct pci_error_handlers lpfc_err_handler = {
15665 .error_detected = lpfc_io_error_detected,
15666 .slot_reset = lpfc_io_slot_reset,
15667 .resume = lpfc_io_resume,
15668 };
15669
15670 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15671 lpfc_pci_suspend_one,
15672 lpfc_pci_resume_one);
15673
15674 static struct pci_driver lpfc_driver = {
15675 .name = LPFC_DRIVER_NAME,
15676 .id_table = lpfc_id_table,
15677 .probe = lpfc_pci_probe_one,
15678 .remove = lpfc_pci_remove_one,
15679 .shutdown = lpfc_pci_remove_one,
15680 .driver.pm = &lpfc_pci_pm_ops_one,
15681 .err_handler = &lpfc_err_handler,
15682 };
15683
15684 static const struct file_operations lpfc_mgmt_fop = {
15685 .owner = THIS_MODULE,
15686 };
15687
15688 static struct miscdevice lpfc_mgmt_dev = {
15689 .minor = MISC_DYNAMIC_MINOR,
15690 .name = "lpfcmgmt",
15691 .fops = &lpfc_mgmt_fop,
15692 };
15693
15694 /**
15695 * lpfc_init - lpfc module initialization routine
15696 *
15697 * This routine is to be invoked when the lpfc module is loaded into the
15698 * kernel. The special kernel macro module_init() is used to indicate the
15699 * role of this routine to the kernel as lpfc module entry point.
15700 *
15701 * Return codes
15702 * 0 - successful
15703 * -ENOMEM - FC attach transport failed
15704 * all others - failed
15705 */
15706 static int __init
lpfc_init(void)15707 lpfc_init(void)
15708 {
15709 int error = 0;
15710
15711 pr_info(LPFC_MODULE_DESC "\n");
15712 pr_info(LPFC_COPYRIGHT "\n");
15713
15714 error = misc_register(&lpfc_mgmt_dev);
15715 if (error)
15716 printk(KERN_ERR "Could not register lpfcmgmt device, "
15717 "misc_register returned with status %d", error);
15718
15719 error = -ENOMEM;
15720 lpfc_transport_functions.vport_create = lpfc_vport_create;
15721 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15722 lpfc_transport_template =
15723 fc_attach_transport(&lpfc_transport_functions);
15724 if (lpfc_transport_template == NULL)
15725 goto unregister;
15726 lpfc_vport_transport_template =
15727 fc_attach_transport(&lpfc_vport_transport_functions);
15728 if (lpfc_vport_transport_template == NULL) {
15729 fc_release_transport(lpfc_transport_template);
15730 goto unregister;
15731 }
15732 lpfc_wqe_cmd_template();
15733 lpfc_nvmet_cmd_template();
15734
15735 /* Initialize in case vector mapping is needed */
15736 lpfc_present_cpu = num_present_cpus();
15737
15738 lpfc_pldv_detect = false;
15739
15740 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15741 "lpfc/sli4:online",
15742 lpfc_cpu_online, lpfc_cpu_offline);
15743 if (error < 0)
15744 goto cpuhp_failure;
15745 lpfc_cpuhp_state = error;
15746
15747 error = pci_register_driver(&lpfc_driver);
15748 if (error)
15749 goto unwind;
15750
15751 return error;
15752
15753 unwind:
15754 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15755 cpuhp_failure:
15756 fc_release_transport(lpfc_transport_template);
15757 fc_release_transport(lpfc_vport_transport_template);
15758 unregister:
15759 misc_deregister(&lpfc_mgmt_dev);
15760
15761 return error;
15762 }
15763
lpfc_dmp_dbg(struct lpfc_hba * phba)15764 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15765 {
15766 unsigned int start_idx;
15767 unsigned int dbg_cnt;
15768 unsigned int temp_idx;
15769 int i;
15770 int j = 0;
15771 unsigned long rem_nsec;
15772
15773 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15774 return;
15775
15776 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15777 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15778 if (!dbg_cnt)
15779 goto out;
15780 temp_idx = start_idx;
15781 if (dbg_cnt >= DBG_LOG_SZ) {
15782 dbg_cnt = DBG_LOG_SZ;
15783 temp_idx -= 1;
15784 } else {
15785 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15786 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15787 } else {
15788 if (start_idx < dbg_cnt)
15789 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15790 else
15791 start_idx -= dbg_cnt;
15792 }
15793 }
15794 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15795 start_idx, temp_idx, dbg_cnt);
15796
15797 for (i = 0; i < dbg_cnt; i++) {
15798 if ((start_idx + i) < DBG_LOG_SZ)
15799 temp_idx = (start_idx + i) % DBG_LOG_SZ;
15800 else
15801 temp_idx = j++;
15802 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15803 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15804 temp_idx,
15805 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15806 rem_nsec / 1000,
15807 phba->dbg_log[temp_idx].log);
15808 }
15809 out:
15810 atomic_set(&phba->dbg_log_cnt, 0);
15811 atomic_set(&phba->dbg_log_dmping, 0);
15812 }
15813
15814 __printf(2, 3)
lpfc_dbg_print(struct lpfc_hba * phba,const char * fmt,...)15815 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15816 {
15817 unsigned int idx;
15818 va_list args;
15819 int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15820 struct va_format vaf;
15821
15822
15823 va_start(args, fmt);
15824 if (unlikely(dbg_dmping)) {
15825 vaf.fmt = fmt;
15826 vaf.va = &args;
15827 dev_info(&phba->pcidev->dev, "%pV", &vaf);
15828 va_end(args);
15829 return;
15830 }
15831 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15832 DBG_LOG_SZ;
15833
15834 atomic_inc(&phba->dbg_log_cnt);
15835
15836 vscnprintf(phba->dbg_log[idx].log,
15837 sizeof(phba->dbg_log[idx].log), fmt, args);
15838 va_end(args);
15839
15840 phba->dbg_log[idx].t_ns = local_clock();
15841 }
15842
15843 /**
15844 * lpfc_exit - lpfc module removal routine
15845 *
15846 * This routine is invoked when the lpfc module is removed from the kernel.
15847 * The special kernel macro module_exit() is used to indicate the role of
15848 * this routine to the kernel as lpfc module exit point.
15849 */
15850 static void __exit
lpfc_exit(void)15851 lpfc_exit(void)
15852 {
15853 misc_deregister(&lpfc_mgmt_dev);
15854 pci_unregister_driver(&lpfc_driver);
15855 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15856 fc_release_transport(lpfc_transport_template);
15857 fc_release_transport(lpfc_vport_transport_template);
15858 idr_destroy(&lpfc_hba_index);
15859 }
15860
15861 module_init(lpfc_init);
15862 module_exit(lpfc_exit);
15863 MODULE_LICENSE("GPL");
15864 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15865 MODULE_AUTHOR("Broadcom");
15866 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15867