1 /*
2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #ifndef PWM_HI35XX_H
17 #define PWM_HI35XX_H
18 #include "hdf_base.h"
19
20 #define PWM_CLK_HZ 3000000 // 3MHz
21 #define PWM_CLK_PERIOD 333 // 333ns
22
23 #define PWM_MAX_HZ 1500000 // 1.5MHz
24 #define PWM_MIN_PERIOD 666 // 666ns
25
26 #define PWM_MIN_HZ 0.045 // 0.045Hz
27 #define PWM_MAX_PERIOD 22222222222 // 22222222222ns > 4294967295ns (UINT32_MAX)
28
29 #define PWM_ENABLE 1
30 #define PWM_DISABLE 0
31
32 #define PWM_INV_OFFSET 1
33 #define PWM_KEEP_OFFSET 2
34
35 #define PWM_DEFAULT_PERIOD 0x3E7
36 #define PWM_DEFAULT_POLARITY 0
37 #define PWM_DEFAULT_DUTY_CYCLE 0x14D
38
39 struct HiPwmRegs {
40 volatile uint32_t cfg0;
41 volatile uint32_t cfg1;
42 volatile uint32_t cfg2;
43 volatile uint32_t ctrl;
44 volatile uint32_t state0;
45 volatile uint32_t state1;
46 volatile uint32_t state2;
47 };
48
HiPwmDisable(struct HiPwmRegs * reg)49 static inline void HiPwmDisable(struct HiPwmRegs *reg)
50 {
51 reg->ctrl &= ~1;
52 }
53
HiPwmAlwaysOutput(struct HiPwmRegs * reg)54 static inline void HiPwmAlwaysOutput(struct HiPwmRegs *reg)
55 {
56 /* keep the pwm always output */
57 reg->ctrl |= ((1 << PWM_KEEP_OFFSET) | PWM_ENABLE);
58 }
59
HiPwmOutputNumberSquareWaves(struct HiPwmRegs * reg,uint32_t number)60 static inline void HiPwmOutputNumberSquareWaves(struct HiPwmRegs *reg, uint32_t number)
61 {
62 uint32_t mask;
63
64 /* pwm output number square waves */
65 reg->cfg2 = number;
66 mask = ~(1 << PWM_KEEP_OFFSET);
67 reg->ctrl &= mask;
68 reg->ctrl |= PWM_ENABLE;
69 }
70
HiPwmSetPolarity(struct HiPwmRegs * reg,uint8_t polarity)71 static inline void HiPwmSetPolarity(struct HiPwmRegs *reg, uint8_t polarity)
72 {
73 uint32_t mask;
74
75 mask = ~(1 << PWM_INV_OFFSET);
76 reg->ctrl &= mask;
77 reg->ctrl |= (polarity << PWM_INV_OFFSET);
78 }
79
HiPwmSetPeriod(struct HiPwmRegs * reg,uint32_t period)80 static inline void HiPwmSetPeriod(struct HiPwmRegs *reg, uint32_t period)
81 {
82 reg->cfg0 = period / PWM_CLK_PERIOD;
83 }
84
HiPwmSetDuty(struct HiPwmRegs * reg,uint32_t duty)85 static inline void HiPwmSetDuty(struct HiPwmRegs *reg, uint32_t duty)
86 {
87 reg->cfg1 = duty / PWM_CLK_PERIOD;
88 }
89
90 #endif /* PWM_HI35XX_H */
91