1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __HISOC_CPU_H__ 17 #define __HISOC_CPU_H__ 18 19 #include "asm/platform.h" 20 #ifdef __cplusplus 21 #if __cplusplus 22 extern "C"{ 23 #endif 24 #endif /* __cplusplus */ 25 26 27 #define ARM_GIC_CPU_CTRL 0x00 28 #define ARM_GIC_CPU_PRIMASK 0x04 29 #define ARM_GIC_CPU_BINPOINT 0x08 30 #define ARM_GIC_CPU_INTACK 0x0c 31 #define ARM_GIC_CPU_EOI 0x10 32 #define ARM_GIC_CPU_RUNNINGPRI 0x14 33 #define ARM_GIC_CPU_HIGHPRI 0x18 34 35 #define ARM_GIC_DIST_CTRL 0x000 36 #define ARM_GIC_DIST_CTR 0x004 37 #define ARM_GIC_DIST_ENABLE_SET 0x100 38 #define ARM_GIC_DIST_ENABLE_CLEAR 0x180 39 #define ARM_GIC_DIST_PENDING_SET 0x200 40 #define ARM_GIC_DIST_PENDING_CLEAR 0x280 41 #define ARM_GIC_DIST_ACTIVE_BIT 0x300 42 #define ARM_GIC_DIST_PRI 0x400 43 #define ARM_GIC_DIST_TARGET 0x800 44 #define ARM_GIC_DIST_CONFIG 0xc00 45 #define ARM_GIC_DIST_SOFTINT 0xf00 46 47 48 #define REG_A7_PERI_GIC_DIST 0x1000 49 #define REG_A7_PERI_GIC_CPU 0x2000 50 #define REG_BASE_A7_PERI ARM_REG_BASE 51 #define CFG_ARM_GIC_CPU_BASE (IO_ADDRESS(REG_BASE_A7_PERI) + REG_A7_PERI_GIC_CPU) 52 #define CFG_ARM_GIC_DIST_BASE (IO_ADDRESS(REG_BASE_A7_PERI) + REG_A7_PERI_GIC_DIST) 53 #ifdef __cplusplus 54 #if __cplusplus 55 } 56 #endif 57 #endif /* __cplusplus */ 58 59 #endif 60 61