1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __HISOC_UART_H__ 17 #define __HISOC_UART_H__ 18 19 #include "asm/platform.h" 20 #include "los_typedef.h" 21 #include "los_base.h" 22 #ifdef __cplusplus 23 #if __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 #endif /* __cplusplus */ 27 28 #define CONFIG_UART0_BAUDRATE 115200 29 #define CONFIG_UART_CLK_INPUT (24000000) // 24M or 6M 30 31 #define UART0 0 32 #define UART1 1 33 #define UART2 2 34 #define UART3 3 35 36 #define UART0_ENABLE 1 37 #define UART1_ENABLE 1 38 #define UART2_ENABLE 1 39 #define UART3_ENABLE 1 40 41 #define UART0_DMA_RX_PERI 16 42 #define UART1_DMA_RX_PERI 18 43 #define UART2_DMA_RX_PERI 20 44 #define UART3_DMA_RX_PERI 22 45 46 #define uart_pin_mux_cfg(uart_num) ({ \ 47 if (UART0 == uart_num) {} \ 48 else if (UART1 == uart_num) { \ 49 WRITE_UINT16(0x01, IO_MUX_REG_BASE + 0x07C); \ 50 WRITE_UINT16(0x01, IO_MUX_REG_BASE + 0x084); \ 51 } \ 52 else if (UART2 == uart_num) { \ 53 WRITE_UINT16(0x01, IO_MUX_REG_BASE + 0x088); \ 54 WRITE_UINT16(0x01, IO_MUX_REG_BASE + 0x08C); \ 55 } \ 56 else if (UART3 ==uart_num) { \ 57 WRITE_UINT16(0x02, IO_MUX_REG_BASE + 0x078); \ 58 WRITE_UINT16(0x02, IO_MUX_REG_BASE + 0x080); \ 59 } \ 60 }) 61 #define uart_clk_cfg(uart_num, flag) ({ \ 62 unsigned int tmp = 0; \ 63 tmp = GET_UINT32(CRG_REG_BASE + 0x01B8); \ 64 if (flag) \ 65 tmp |= (1<<(uart_num)); \ 66 else \ 67 tmp &= ~(1<<(uart_num)); \ 68 WRITE_UINT32(tmp, CRG_REG_BASE + 0x01B8); \ 69 }) 70 #define get_uart_dma_peri(uart_num) ({ \ 71 unsigned int peri_num = -1; \ 72 if (UART0 == uart_num) \ 73 peri_num = UART0_DMA_RX_PERI; \ 74 else if (UART1 == uart_num) \ 75 peri_num = UART1_DMA_RX_PERI; \ 76 else if (UART2 == uart_num) \ 77 peri_num = UART2_DMA_RX_PERI; \ 78 else if (UART3 == uart_num) \ 79 peri_num = UART3_DMA_RX_PERI; \ 80 peri_num; \ 81 }) 82 83 84 #define TTYS0 "/dev/ttyS0" 85 86 #define CONSOLE_UART UART0 87 88 #define CONSOLE_UART_BAUDRATE 115200 89 #define UART_NUM 4 90 #if (CONSOLE_UART == UART0) 91 #define TTY_DEVICE "/dev/uartdev-0" 92 #define UART_REG_BASE UART0_REG_BASE 93 #define NUM_HAL_INTERRUPT_UART NUM_HAL_INTERRUPT_UART0 94 #elif (CONSOLE_UART == UART1) 95 #define TTY_DEVICE "/dev/uartdev-1" 96 #define UART_REG_BASE UART1_REG_BASE 97 #define NUM_HAL_INTERRUPT_UART NUM_HAL_INTERRUPT_UART1 98 #elif (CONSOLE_UART == UART2) 99 #define TTY_DEVICE "/dev/uartdev-2" 100 #define UART_REG_BASE UART2_REG_BASE 101 #define NUM_HAL_INTERRUPT_UART NUM_HAL_INTERRUPT_UART2 102 #elif (CONSOLE_UART == UART3) 103 #define TTY_DEVICE "/dev/uartdev-3" 104 #define UART_REG_BASE UART3_REG_BASE 105 #define NUM_HAL_INTERRUPT_UART NUM_HAL_INTERRUPT_UART3 106 #endif 107 108 #ifdef LOSCFG_PLATFORM_HISI_AMP 109 #undef TTY_DEVICE 110 #define TTY_DEVICE "/dev/virt-tty" 111 #endif 112 113 typedef struct { 114 UINT32 base; 115 INT32 msec_timeout; 116 int isr_vector; 117 } channel_data_t; 118 119 extern void uart_init(void); 120 extern void uart_interrupt_unmask(void); 121 extern int uart_hwiCreate(void); 122 extern UINT8 uart_getc(void); 123 extern char uart_fputc(char c, void *f); 124 125 extern UINT32 UartPutsReg(UINTPTR base, const CHAR *s, UINT32 len, BOOL isLock); 126 extern VOID UartPuts(const CHAR *s, UINT32 len, BOOL isLock); 127 128 #define UART_WITHOUT_LOCK 0 129 #define UART_WITH_LOCK 1 130 131 #ifdef __cplusplus 132 #if __cplusplus 133 } 134 #endif /* __cplusplus */ 135 #endif /* __cplusplus */ 136 137 #endif 138