Lines Matching +full:uniphier +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,psci-0.2";
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <24576000>;
40 arm_timer_clk: arm-timer {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>;
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&intc>;
54 l2: l2-cache@500c0000 {
55 compatible = "socionext,uniphier-system-cache";
59 cache-unified;
60 cache-size = <(512 * 1024)>;
61 cache-sets = <256>;
62 cache-line-size = <128>;
63 cache-level = <2>;
67 compatible = "socionext,uniphier-uart";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_uart0>;
78 compatible = "socionext,uniphier-uart";
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_uart1>;
89 compatible = "socionext,uniphier-uart";
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_uart2>;
100 compatible = "socionext,uniphier-uart";
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_uart3>;
111 compatible = "socionext,uniphier-gpio";
113 interrupt-parent = <&aidet>;
114 interrupt-controller;
115 #interrupt-cells = <2>;
116 gpio-controller;
117 #gpio-cells = <2>;
118 gpio-ranges = <&pinctrl 0 0 0>;
119 gpio-ranges-group-names = "gpio_range";
121 socionext,interrupt-ranges = <0 48 13>, <14 62 2>;
124 i2c0: i2c@58400000 {
125 compatible = "socionext,uniphier-i2c";
128 #address-cells = <1>;
129 #size-cells = <0>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&pinctrl_i2c0>;
135 clock-frequency = <100000>;
138 i2c1: i2c@58480000 {
139 compatible = "socionext,uniphier-i2c";
142 #address-cells = <1>;
143 #size-cells = <0>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_i2c1>;
149 clock-frequency = <100000>;
152 /* chip-internal connection for DMD */
153 i2c2: i2c@58500000 {
154 compatible = "socionext,uniphier-i2c";
156 #address-cells = <1>;
157 #size-cells = <0>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_i2c2>;
163 clock-frequency = <400000>;
166 i2c3: i2c@58580000 {
167 compatible = "socionext,uniphier-i2c";
170 #address-cells = <1>;
171 #size-cells = <0>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c3>;
177 clock-frequency = <100000>;
180 system_bus: system-bus@58c00000 {
181 compatible = "socionext,uniphier-system-bus";
184 #address-cells = <2>;
185 #size-cells = <1>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_system_bus>;
191 compatible = "socionext,uniphier-smpctrl";
196 compatible = "socionext,uniphier-ld4-mioctrl",
197 "simple-mfd", "syscon";
201 compatible = "socionext,uniphier-ld4-mio-clock";
202 #clock-cells = <1>;
206 compatible = "socionext,uniphier-ld4-mio-reset";
207 #reset-cells = <1>;
212 compatible = "socionext,uniphier-ld4-perictrl",
213 "simple-mfd", "syscon";
217 compatible = "socionext,uniphier-ld4-peri-clock";
218 #clock-cells = <1>;
222 compatible = "socionext,uniphier-ld4-peri-reset";
223 #reset-cells = <1>;
228 compatible = "socionext,uniphier-ehci", "generic-ehci";
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_usb0>;
238 has-transaction-translator;
242 compatible = "socionext,uniphier-ehci", "generic-ehci";
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_usb1>;
252 has-transaction-translator;
256 compatible = "socionext,uniphier-ehci", "generic-ehci";
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_usb2>;
266 has-transaction-translator;
269 soc-glue@5f800000 {
270 compatible = "socionext,uniphier-ld4-soc-glue",
271 "simple-mfd", "syscon";
275 compatible = "socionext,uniphier-ld4-pinctrl";
279 soc-glue@5f900000 {
280 compatible = "socionext,uniphier-ld4-soc-glue-debug",
281 "simple-mfd";
282 #address-cells = <1>;
283 #size-cells = <1>;
287 compatible = "socionext,uniphier-efuse";
292 compatible = "socionext,uniphier-efuse";
298 compatible = "arm,cortex-a9-global-timer";
305 compatible = "arm,cortex-a9-twd-timer";
311 intc: interrupt-controller@60001000 {
312 compatible = "arm,cortex-a9-gic";
315 #interrupt-cells = <3>;
316 interrupt-controller;
320 compatible = "socionext,uniphier-ld4-aidet";
322 interrupt-controller;
323 #interrupt-cells = <2>;
327 compatible = "socionext,uniphier-ld4-sysctrl",
328 "simple-mfd", "syscon";
332 compatible = "socionext,uniphier-ld4-clock";
333 #clock-cells = <1>;
337 compatible = "socionext,uniphier-ld4-reset";
338 #reset-cells = <1>;
343 compatible = "socionext,uniphier-denali-nand-v5a";
345 reg-names = "nand_data", "denali_reg";
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_nand2cs>;
356 #include "uniphier-pinctrl.dtsi"