Lines Matching refs:ch
242 static inline u32 sh_cmt_read_cmstr(struct sh_cmt_channel *ch) in sh_cmt_read_cmstr() argument
244 if (ch->iostart) in sh_cmt_read_cmstr()
245 return ch->cmt->info->read_control(ch->iostart, 0); in sh_cmt_read_cmstr()
247 return ch->cmt->info->read_control(ch->cmt->mapbase, 0); in sh_cmt_read_cmstr()
250 static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmstr() argument
252 if (ch->iostart) in sh_cmt_write_cmstr()
253 ch->cmt->info->write_control(ch->iostart, 0, value); in sh_cmt_write_cmstr()
255 ch->cmt->info->write_control(ch->cmt->mapbase, 0, value); in sh_cmt_write_cmstr()
258 static inline u32 sh_cmt_read_cmcsr(struct sh_cmt_channel *ch) in sh_cmt_read_cmcsr() argument
260 return ch->cmt->info->read_control(ch->ioctrl, CMCSR); in sh_cmt_read_cmcsr()
263 static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmcsr() argument
265 ch->cmt->info->write_control(ch->ioctrl, CMCSR, value); in sh_cmt_write_cmcsr()
268 static inline u32 sh_cmt_read_cmcnt(struct sh_cmt_channel *ch) in sh_cmt_read_cmcnt() argument
270 return ch->cmt->info->read_count(ch->ioctrl, CMCNT); in sh_cmt_read_cmcnt()
273 static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmcnt() argument
275 ch->cmt->info->write_count(ch->ioctrl, CMCNT, value); in sh_cmt_write_cmcnt()
278 static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch, u32 value) in sh_cmt_write_cmcor() argument
280 ch->cmt->info->write_count(ch->ioctrl, CMCOR, value); in sh_cmt_write_cmcor()
283 static u32 sh_cmt_get_counter(struct sh_cmt_channel *ch, u32 *has_wrapped) in sh_cmt_get_counter() argument
288 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
293 v1 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
294 v2 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
295 v3 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
296 o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit; in sh_cmt_get_counter()
304 static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start) in sh_cmt_start_stop_ch() argument
310 raw_spin_lock_irqsave(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
311 value = sh_cmt_read_cmstr(ch); in sh_cmt_start_stop_ch()
314 value |= 1 << ch->timer_bit; in sh_cmt_start_stop_ch()
316 value &= ~(1 << ch->timer_bit); in sh_cmt_start_stop_ch()
318 sh_cmt_write_cmstr(ch, value); in sh_cmt_start_stop_ch()
319 raw_spin_unlock_irqrestore(&ch->cmt->lock, flags); in sh_cmt_start_stop_ch()
322 static int sh_cmt_enable(struct sh_cmt_channel *ch) in sh_cmt_enable() argument
326 pm_runtime_get_sync(&ch->cmt->pdev->dev); in sh_cmt_enable()
327 dev_pm_syscore_device(&ch->cmt->pdev->dev, true); in sh_cmt_enable()
330 ret = clk_enable(ch->cmt->clk); in sh_cmt_enable()
332 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n", in sh_cmt_enable()
333 ch->index); in sh_cmt_enable()
338 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_enable()
341 if (ch->cmt->info->width == 16) { in sh_cmt_enable()
342 sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE | in sh_cmt_enable()
345 sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM | in sh_cmt_enable()
351 sh_cmt_write_cmcor(ch, 0xffffffff); in sh_cmt_enable()
352 sh_cmt_write_cmcnt(ch, 0); in sh_cmt_enable()
366 if (!sh_cmt_read_cmcnt(ch)) in sh_cmt_enable()
371 if (sh_cmt_read_cmcnt(ch)) { in sh_cmt_enable()
372 dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n", in sh_cmt_enable()
373 ch->index); in sh_cmt_enable()
379 sh_cmt_start_stop_ch(ch, 1); in sh_cmt_enable()
383 clk_disable(ch->cmt->clk); in sh_cmt_enable()
389 static void sh_cmt_disable(struct sh_cmt_channel *ch) in sh_cmt_disable() argument
392 sh_cmt_start_stop_ch(ch, 0); in sh_cmt_disable()
395 sh_cmt_write_cmcsr(ch, 0); in sh_cmt_disable()
398 clk_disable(ch->cmt->clk); in sh_cmt_disable()
400 dev_pm_syscore_device(&ch->cmt->pdev->dev, false); in sh_cmt_disable()
401 pm_runtime_put(&ch->cmt->pdev->dev); in sh_cmt_disable()
411 static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch, in sh_cmt_clock_event_program_verify() argument
414 u32 value = ch->next_match_value; in sh_cmt_clock_event_program_verify()
420 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
421 ch->flags |= FLAG_REPROGRAM; /* force reprogram */ in sh_cmt_clock_event_program_verify()
428 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
440 if (new_match > ch->max_match_value) in sh_cmt_clock_event_program_verify()
441 new_match = ch->max_match_value; in sh_cmt_clock_event_program_verify()
443 sh_cmt_write_cmcor(ch, new_match); in sh_cmt_clock_event_program_verify()
445 now = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clock_event_program_verify()
446 if (has_wrapped && (new_match > ch->match_value)) { in sh_cmt_clock_event_program_verify()
453 ch->flags |= FLAG_SKIPEVENT; in sh_cmt_clock_event_program_verify()
464 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
475 ch->match_value = new_match; in sh_cmt_clock_event_program_verify()
491 dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n", in sh_cmt_clock_event_program_verify()
492 ch->index); in sh_cmt_clock_event_program_verify()
497 static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in __sh_cmt_set_next() argument
499 if (delta > ch->max_match_value) in __sh_cmt_set_next()
500 dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n", in __sh_cmt_set_next()
501 ch->index); in __sh_cmt_set_next()
503 ch->next_match_value = delta; in __sh_cmt_set_next()
504 sh_cmt_clock_event_program_verify(ch, 0); in __sh_cmt_set_next()
507 static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta) in sh_cmt_set_next() argument
511 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_set_next()
512 __sh_cmt_set_next(ch, delta); in sh_cmt_set_next()
513 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_set_next()
518 struct sh_cmt_channel *ch = dev_id; in sh_cmt_interrupt() local
521 sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & in sh_cmt_interrupt()
522 ch->cmt->info->clear_bits); in sh_cmt_interrupt()
528 if (ch->flags & FLAG_CLOCKSOURCE) in sh_cmt_interrupt()
529 ch->total_cycles += ch->match_value + 1; in sh_cmt_interrupt()
531 if (!(ch->flags & FLAG_REPROGRAM)) in sh_cmt_interrupt()
532 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
534 ch->flags |= FLAG_IRQCONTEXT; in sh_cmt_interrupt()
536 if (ch->flags & FLAG_CLOCKEVENT) { in sh_cmt_interrupt()
537 if (!(ch->flags & FLAG_SKIPEVENT)) { in sh_cmt_interrupt()
538 if (clockevent_state_oneshot(&ch->ced)) { in sh_cmt_interrupt()
539 ch->next_match_value = ch->max_match_value; in sh_cmt_interrupt()
540 ch->flags |= FLAG_REPROGRAM; in sh_cmt_interrupt()
543 ch->ced.event_handler(&ch->ced); in sh_cmt_interrupt()
547 ch->flags &= ~FLAG_SKIPEVENT; in sh_cmt_interrupt()
549 if (ch->flags & FLAG_REPROGRAM) { in sh_cmt_interrupt()
550 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
551 sh_cmt_clock_event_program_verify(ch, 1); in sh_cmt_interrupt()
553 if (ch->flags & FLAG_CLOCKEVENT) in sh_cmt_interrupt()
554 if ((clockevent_state_shutdown(&ch->ced)) in sh_cmt_interrupt()
555 || (ch->match_value == ch->next_match_value)) in sh_cmt_interrupt()
556 ch->flags &= ~FLAG_REPROGRAM; in sh_cmt_interrupt()
559 ch->flags &= ~FLAG_IRQCONTEXT; in sh_cmt_interrupt()
564 static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_start() argument
569 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_start()
571 if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_start()
572 ret = sh_cmt_enable(ch); in sh_cmt_start()
576 ch->flags |= flag; in sh_cmt_start()
579 if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT))) in sh_cmt_start()
580 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_start()
582 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_start()
587 static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag) in sh_cmt_stop() argument
592 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_stop()
594 f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE); in sh_cmt_stop()
595 ch->flags &= ~flag; in sh_cmt_stop()
597 if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) in sh_cmt_stop()
598 sh_cmt_disable(ch); in sh_cmt_stop()
601 if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE)) in sh_cmt_stop()
602 __sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_stop()
604 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_stop()
614 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_read() local
620 raw_spin_lock_irqsave(&ch->lock, flags); in sh_cmt_clocksource_read()
621 value = ch->total_cycles; in sh_cmt_clocksource_read()
622 raw = sh_cmt_get_counter(ch, &has_wrapped); in sh_cmt_clocksource_read()
625 raw += ch->match_value + 1; in sh_cmt_clocksource_read()
626 raw_spin_unlock_irqrestore(&ch->lock, flags); in sh_cmt_clocksource_read()
634 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_enable() local
636 WARN_ON(ch->cs_enabled); in sh_cmt_clocksource_enable()
638 ch->total_cycles = 0; in sh_cmt_clocksource_enable()
640 ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_enable()
642 ch->cs_enabled = true; in sh_cmt_clocksource_enable()
649 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_disable() local
651 WARN_ON(!ch->cs_enabled); in sh_cmt_clocksource_disable()
653 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_disable()
654 ch->cs_enabled = false; in sh_cmt_clocksource_disable()
659 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_suspend() local
661 if (!ch->cs_enabled) in sh_cmt_clocksource_suspend()
664 sh_cmt_stop(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_suspend()
665 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clocksource_suspend()
670 struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); in sh_cmt_clocksource_resume() local
672 if (!ch->cs_enabled) in sh_cmt_clocksource_resume()
675 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clocksource_resume()
676 sh_cmt_start(ch, FLAG_CLOCKSOURCE); in sh_cmt_clocksource_resume()
679 static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch, in sh_cmt_register_clocksource() argument
682 struct clocksource *cs = &ch->cs; in sh_cmt_register_clocksource()
694 dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n", in sh_cmt_register_clocksource()
695 ch->index); in sh_cmt_register_clocksource()
697 clocksource_register_hz(cs, ch->cmt->rate); in sh_cmt_register_clocksource()
706 static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic) in sh_cmt_clock_event_start() argument
708 sh_cmt_start(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_start()
711 sh_cmt_set_next(ch, ((ch->cmt->rate + HZ/2) / HZ) - 1); in sh_cmt_clock_event_start()
713 sh_cmt_set_next(ch, ch->max_match_value); in sh_cmt_clock_event_start()
718 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_shutdown() local
720 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_shutdown()
727 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_set_state() local
731 sh_cmt_stop(ch, FLAG_CLOCKEVENT); in sh_cmt_clock_event_set_state()
733 dev_info(&ch->cmt->pdev->dev, "ch%u: used for %s clock events\n", in sh_cmt_clock_event_set_state()
734 ch->index, periodic ? "periodic" : "oneshot"); in sh_cmt_clock_event_set_state()
735 sh_cmt_clock_event_start(ch, periodic); in sh_cmt_clock_event_set_state()
752 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_next() local
755 if (likely(ch->flags & FLAG_IRQCONTEXT)) in sh_cmt_clock_event_next()
756 ch->next_match_value = delta - 1; in sh_cmt_clock_event_next()
758 sh_cmt_set_next(ch, delta - 1); in sh_cmt_clock_event_next()
765 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_suspend() local
767 pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); in sh_cmt_clock_event_suspend()
768 clk_unprepare(ch->cmt->clk); in sh_cmt_clock_event_suspend()
773 struct sh_cmt_channel *ch = ced_to_sh_cmt(ced); in sh_cmt_clock_event_resume() local
775 clk_prepare(ch->cmt->clk); in sh_cmt_clock_event_resume()
776 pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); in sh_cmt_clock_event_resume()
779 static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch, in sh_cmt_register_clockevent() argument
782 struct clock_event_device *ced = &ch->ced; in sh_cmt_register_clockevent()
786 irq = platform_get_irq(ch->cmt->pdev, ch->index); in sh_cmt_register_clockevent()
788 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to get irq\n", in sh_cmt_register_clockevent()
789 ch->index); in sh_cmt_register_clockevent()
795 dev_name(&ch->cmt->pdev->dev), ch); in sh_cmt_register_clockevent()
797 dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n", in sh_cmt_register_clockevent()
798 ch->index, irq); in sh_cmt_register_clockevent()
816 ced->mult = div_sc(ch->cmt->rate, NSEC_PER_SEC, ced->shift); in sh_cmt_register_clockevent()
817 ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced); in sh_cmt_register_clockevent()
818 ced->max_delta_ticks = ch->max_match_value; in sh_cmt_register_clockevent()
822 dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n", in sh_cmt_register_clockevent()
823 ch->index); in sh_cmt_register_clockevent()
829 static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name, in sh_cmt_register() argument
835 ch->cmt->has_clockevent = true; in sh_cmt_register()
836 ret = sh_cmt_register_clockevent(ch, name); in sh_cmt_register()
842 ch->cmt->has_clocksource = true; in sh_cmt_register()
843 sh_cmt_register_clocksource(ch, name); in sh_cmt_register()
849 static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, in sh_cmt_setup_channel() argument
859 ch->cmt = cmt; in sh_cmt_setup_channel()
860 ch->index = index; in sh_cmt_setup_channel()
861 ch->hwidx = hwidx; in sh_cmt_setup_channel()
862 ch->timer_bit = hwidx; in sh_cmt_setup_channel()
871 ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6; in sh_cmt_setup_channel()
875 ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10; in sh_cmt_setup_channel()
879 ch->iostart = cmt->mapbase + ch->hwidx * 0x100; in sh_cmt_setup_channel()
880 ch->ioctrl = ch->iostart + 0x10; in sh_cmt_setup_channel()
881 ch->timer_bit = 0; in sh_cmt_setup_channel()
885 if (cmt->info->width == (sizeof(ch->max_match_value) * 8)) in sh_cmt_setup_channel()
886 ch->max_match_value = ~0; in sh_cmt_setup_channel()
888 ch->max_match_value = (1 << cmt->info->width) - 1; in sh_cmt_setup_channel()
890 ch->match_value = ch->max_match_value; in sh_cmt_setup_channel()
891 raw_spin_lock_init(&ch->lock); in sh_cmt_setup_channel()
893 ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev), in sh_cmt_setup_channel()
897 ch->index); in sh_cmt_setup_channel()
900 ch->cs_enabled = false; in sh_cmt_setup_channel()