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Searched defs:pll_id (Results 1 – 12 of 12) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/clk/rockchip/
Dclk_pll.c182 void __iomem *base, ulong pll_id, in rk3036_pll_set_rate()
250 void __iomem *base, ulong pll_id) in rk3036_pll_get_rate()
299 ulong pll_id) in rockchip_pll_get_rate()
320 void __iomem *base, ulong pll_id, in rockchip_pll_set_rate()
Dclk_rk3036.c47 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
174 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
Dclk_rk322x.c44 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
175 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
Dclk_rk3128.c41 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
243 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
Dclk_rk3188.c88 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
230 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
Dclk_rk3368.c62 enum rk3368_pll_id pll_id) in rkclk_pll_get_rate()
88 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, in rkclk_set_pll()
Dclk_px30.c201 enum px30_pll_id pll_id, in rkclk_set_pll()
256 enum px30_pll_id pll_id) in rkclk_pll_get_rate()
1095 enum px30_pll_id pll_id) in px30_clk_get_pll_rate()
1103 enum px30_pll_id pll_id, ulong hz) in px30_clk_set_pll_rate()
Dclk_rv1108.c68 int pll_id = rv1108_pll_id(clk_id); in rkclk_set_pll() local
122 int pll_id = rv1108_pll_id(clk_id); in rkclk_pll_get_rate() local
Dclk_rk3288.c147 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
542 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
/third_party/uboot/u-boot-2020.01/drivers/clk/
Dclk_stm32mp1.c855 int pll_id) in pll_get_fref_ck()
878 int pll_id) in pll_get_fvco()
912 int pll_id, int div_id) in stm32mp1_read_pll_freq()
1329 static void pll_start(struct stm32mp1_clk_priv *priv, int pll_id) in pll_start()
1339 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output()
1361 static int pll_stop(struct stm32mp1_clk_priv *priv, int pll_id) in pll_stop()
1380 int pll_id, u32 *pllcfg) in pll_config_output()
1395 static int pll_config(struct stm32mp1_clk_priv *priv, int pll_id, in pll_config()
1442 static void pll_csg(struct stm32mp1_clk_priv *priv, int pll_id, u32 *csg) in pll_csg()
1460 int pll_id, in pll_set_rate()
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/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-rockchip/
Dsdram_px30.h71 #define CRU_PLL_CON(pll_id, n) ((pll_id) * 0x20 + (n) * 4) argument
Dsdram_rk3328.h51 #define CRU_PLL_CON(pll_id, n) ((pll_id) * 0x20 + (n) * 4) argument