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/kernel/linux/linux-4.19/drivers/media/dvb-frontends/
Dstb0899_reg.h26 #define STB0899_DEV_ID 0xf000
27 #define STB0899_CHIP_ID (0x0f << 4)
30 #define STB0899_CHIP_REL (0x0f << 0)
31 #define STB0899_OFFST_CHIP_REL 0
34 #define STB0899_DEMOD 0xf40e
35 #define STB0899_MODECOEFF (0x01 << 0)
36 #define STB0899_OFFST_MODECOEFF 0
39 #define STB0899_RCOMPC 0xf410
40 #define STB0899_AGC1CN 0xf412
41 #define STB0899_AGC1REF 0xf413
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dstb0899_reg.h14 #define STB0899_DEV_ID 0xf000
15 #define STB0899_CHIP_ID (0x0f << 4)
18 #define STB0899_CHIP_REL (0x0f << 0)
19 #define STB0899_OFFST_CHIP_REL 0
22 #define STB0899_DEMOD 0xf40e
23 #define STB0899_MODECOEFF (0x01 << 0)
24 #define STB0899_OFFST_MODECOEFF 0
27 #define STB0899_RCOMPC 0xf410
28 #define STB0899_AGC1CN 0xf412
29 #define STB0899_AGC1REF 0xf413
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dhsw_clear_kernel.c9 0x00000001, 0x26020128, 0x00000024, 0x00000000,
10 0x00000040, 0x20280c21, 0x00000028, 0x00000001,
11 0x01000010, 0x20000c20, 0x0000002c, 0x00000000,
12 0x00010220, 0x34001c00, 0x00001400, 0x00000160,
13 0x00600001, 0x20600061, 0x00000000, 0x00000000,
14 0x00000008, 0x20601c85, 0x00000e00, 0x0000000c,
15 0x00000005, 0x20601ca5, 0x00000060, 0x00000001,
16 0x00000008, 0x20641c85, 0x00000e00, 0x0000000d,
17 0x00000005, 0x20641ca5, 0x00000064, 0x00000003,
18 0x00000041, 0x207424a5, 0x00000064, 0x00000034,
[all …]
Divb_clear_kernel.c9 0x00000001, 0x26020128, 0x00000024, 0x00000000,
10 0x00000040, 0x20280c21, 0x00000028, 0x00000001,
11 0x01000010, 0x20000c20, 0x0000002c, 0x00000000,
12 0x00010220, 0x34001c00, 0x00001400, 0x0000002c,
13 0x00600001, 0x20600061, 0x00000000, 0x00000000,
14 0x00000008, 0x20601c85, 0x00000e00, 0x0000000c,
15 0x00000005, 0x20601ca5, 0x00000060, 0x00000001,
16 0x00000008, 0x20641c85, 0x00000e00, 0x0000000d,
17 0x00000005, 0x20641ca5, 0x00000064, 0x00000003,
18 0x00000041, 0x207424a5, 0x00000064, 0x00000034,
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvhw/class/
Dcl176e.h5 #define NV176E_SET_OBJECT (0x00000000)
6 #define NV176E_SET_CONTEXT_DMA_SEMAPHORE (0x00000060)
7 #define NV176E_SEMAPHORE_OFFSET (0x00000064)
8 #define NV176E_SEMAPHORE_ACQUIRE (0x00000068)
9 #define NV176E_SEMAPHORE_RELEASE (0x0000006c)
Dclc37d.h27 #define NV_DISP_NOTIFIER 0x00000000
28 #define NV_DISP_NOTIFIER_SIZEOF 0x00000010
29 #define NV_DISP_NOTIFIER__0 0x00000000
30 #define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0
33 #define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000
34 #define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001
39 #define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000
40 #define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001
41 #define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002
42 #define NV_DISP_NOTIFIER__1 0x00000001
[all …]
Dcl826f.h26 #define NV826F_SEMAPHOREA (0x00000010)
27 #define NV826F_SEMAPHOREA_OFFSET_UPPER 7:0
28 #define NV826F_SEMAPHOREB (0x00000014)
30 #define NV826F_SEMAPHOREC (0x00000018)
31 #define NV826F_SEMAPHOREC_PAYLOAD 31:0
32 #define NV826F_SEMAPHORED (0x0000001C)
33 #define NV826F_SEMAPHORED_OPERATION 2:0
34 #define NV826F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001
35 #define NV826F_SEMAPHORED_OPERATION_RELEASE 0x00000002
36 #define NV826F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/pasemi/
Dpasemi_mac.h110 PAS_MAC_CFG_PCFG = 0x80,
111 PAS_MAC_CFG_MACCFG = 0x84,
112 PAS_MAC_CFG_ADR0 = 0x8c,
113 PAS_MAC_CFG_ADR1 = 0x90,
114 PAS_MAC_CFG_TXP = 0x98,
115 PAS_MAC_CFG_RMON = 0x100,
116 PAS_MAC_IPC_CHNL = 0x208,
120 #define PAS_MAC_CFG_PCFG_PE 0x80000000
121 #define PAS_MAC_CFG_PCFG_CE 0x40000000
122 #define PAS_MAC_CFG_PCFG_BU 0x20000000
[all …]
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dm54xxacr.h12 #define CACR_DEC 0x80000000 /* Enable data cache */
13 #define CACR_DWP 0x40000000 /* Data write protection */
14 #define CACR_DESB 0x20000000 /* Enable data store buffer */
15 #define CACR_DDPI 0x10000000 /* Disable invalidation by CPUSHL */
16 #define CACR_DHCLK 0x08000000 /* Half data cache lock mode */
17 #define CACR_DDCM_WT 0x00000000 /* Write through cache*/
18 #define CACR_DDCM_CP 0x02000000 /* Copyback cache */
19 #define CACR_DDCM_P 0x04000000 /* No cache, precise */
20 #define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */
21 #define CACR_DCINVA 0x01000000 /* Invalidate data cache */
[all …]
/kernel/linux/linux-4.19/arch/m68k/include/asm/
Dm54xxacr.h12 #define CACR_DEC 0x80000000 /* Enable data cache */
13 #define CACR_DWP 0x40000000 /* Data write protection */
14 #define CACR_DESB 0x20000000 /* Enable data store buffer */
15 #define CACR_DDPI 0x10000000 /* Disable invalidation by CPUSHL */
16 #define CACR_DHCLK 0x08000000 /* Half data cache lock mode */
17 #define CACR_DDCM_WT 0x00000000 /* Write through cache*/
18 #define CACR_DDCM_CP 0x02000000 /* Copyback cache */
19 #define CACR_DDCM_P 0x04000000 /* No cache, precise */
20 #define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */
21 #define CACR_DCINVA 0x01000000 /* Invalidate data cache */
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/pasemi/
Dpasemi_mac.h121 PAS_MAC_CFG_PCFG = 0x80,
122 PAS_MAC_CFG_MACCFG = 0x84,
123 PAS_MAC_CFG_ADR0 = 0x8c,
124 PAS_MAC_CFG_ADR1 = 0x90,
125 PAS_MAC_CFG_TXP = 0x98,
126 PAS_MAC_CFG_RMON = 0x100,
127 PAS_MAC_IPC_CHNL = 0x208,
131 #define PAS_MAC_CFG_PCFG_PE 0x80000000
132 #define PAS_MAC_CFG_PCFG_CE 0x40000000
133 #define PAS_MAC_CFG_PCFG_BU 0x20000000
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi.xml.h50 HDCP_KEYS_STATE_NO_KEYS = 0,
61 DDC_WRITE = 0,
66 ACR_NONE = 0,
72 #define REG_HDMI_CTRL 0x00000000
73 #define HDMI_CTRL_ENABLE 0x00000001
74 #define HDMI_CTRL_HDMI 0x00000002
75 #define HDMI_CTRL_ENCRYPTED 0x00000004
77 #define REG_HDMI_AUDIO_PKT_CTRL1 0x00000020
78 #define HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND 0x00000001
80 #define REG_HDMI_ACR_PKT_CTRL 0x00000024
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/msm/hdmi/
Dhdmi.xml.h50 HDCP_KEYS_STATE_NO_KEYS = 0,
61 DDC_WRITE = 0,
66 ACR_NONE = 0,
72 #define REG_HDMI_CTRL 0x00000000
73 #define HDMI_CTRL_ENABLE 0x00000001
74 #define HDMI_CTRL_HDMI 0x00000002
75 #define HDMI_CTRL_ENCRYPTED 0x00000004
77 #define REG_HDMI_AUDIO_PKT_CTRL1 0x00000020
78 #define HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND 0x00000001
80 #define REG_HDMI_ACR_PKT_CTRL 0x00000024
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath5k/
Drfbuffer.h108 AR5K_RF_TURBO = 0,
165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/ath/ath5k/
Drfbuffer.h108 AR5K_RF_TURBO = 0,
165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/genwqe/
Dgenwqe_card.h11 #define GENWQE_TYPE_ALTERA_230 0x00
12 #define GENWQE_TYPE_ALTERA_530 0x01
13 #define GENWQE_TYPE_ALTERA_A4 0x02
14 #define GENWQE_TYPE_ALTERA_A7 0x03
16 #define GENWQE_SLU_OFFS GENWQE_UID_OFFS(0)
20 #define IO_EXTENDED_ERROR_POINTER 0x00000048
21 #define IO_ERROR_INJECT_SELECTOR 0x00000060
22 #define IO_EXTENDED_DIAG_SELECTOR 0x00000070
23 #define IO_EXTENDED_DIAG_READ_MBX 0x00000078
24 #define IO_EXTENDED_DIAG_MAP(ring) (0x00000500 | ((ring) << 3))
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/rkisp1/
Drkisp1-regs.h12 #define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0)
13 #define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
32 #define RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
35 #define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
40 #define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7)
44 #define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9)
47 #define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12)
54 #define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0)
55 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI BIT(0)
56 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0)
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/genwqe/
Dgenwqe_card.h24 #define GENWQE_TYPE_ALTERA_230 0x00
25 #define GENWQE_TYPE_ALTERA_530 0x01
26 #define GENWQE_TYPE_ALTERA_A4 0x02
27 #define GENWQE_TYPE_ALTERA_A7 0x03
29 #define GENWQE_SLU_OFFS GENWQE_UID_OFFS(0)
33 #define IO_EXTENDED_ERROR_POINTER 0x00000048
34 #define IO_ERROR_INJECT_SELECTOR 0x00000060
35 #define IO_EXTENDED_DIAG_SELECTOR 0x00000070
36 #define IO_EXTENDED_DIAG_READ_MBX 0x00000078
37 #define IO_EXTENDED_DIAG_MAP(ring) (0x00000500 | ((ring) << 3))
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_mtl.h12 #define SXGBE_MTL_OPMODE_ESTMASK 0x3
13 #define SXGBE_MTL_OPMODE_RAAMASK 0x1
14 #define SXGBE_MTL_FCMASK 0x7
20 #define SXGBE_MTL_ENABLE_FC 0x80
22 #define ETS_WRR 0xFFFFFF9F
23 #define ETS_RST 0xFFFFFF9F
24 #define ETS_WFQ 0x00000020
25 #define ETS_DWRR 0x00000040
26 #define RAA_SP 0xFFFFFFFB
27 #define RAA_WSP 0x00000004
[all …]
/kernel/linux/linux-5.10/sound/pci/vx222/
Dvx222.h32 #define VX2_AKM_LEVEL_MAX 0x93
38 #define VX_RESET_DMA_REGISTER_OFFSET 0x00000008
41 #define VX_INTCSR_VALUE 0x00000001
42 #define VX_PCI_INTERRUPT_MASK 0x00000040
44 /* Constants used to access the CDSP register (0x20). */
45 #define VX_CDSP_TEST1_MASK 0x00000080
46 #define VX_CDSP_TOR1_MASK 0x00000040
47 #define VX_CDSP_TOR2_MASK 0x00000020
48 #define VX_CDSP_RESERVED0_0_MASK 0x00000010
49 #define VX_CDSP_CODEC_RESET_MASK 0x00000008
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_mtl.h15 #define SXGBE_MTL_OPMODE_ESTMASK 0x3
16 #define SXGBE_MTL_OPMODE_RAAMASK 0x1
17 #define SXGBE_MTL_FCMASK 0x7
23 #define SXGBE_MTL_ENABLE_FC 0x80
25 #define ETS_WRR 0xFFFFFF9F
26 #define ETS_RST 0xFFFFFF9F
27 #define ETS_WFQ 0x00000020
28 #define ETS_DWRR 0x00000040
29 #define RAA_SP 0xFFFFFFFB
30 #define RAA_WSP 0x00000004
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dfsl_lbc.h22 #define BR_BA 0xFFFF8000
24 #define BR_PS 0x00001800
26 #define BR_PS_8 0x00000800 /* Port Size 8 bit */
27 #define BR_PS_16 0x00001000 /* Port Size 16 bit */
28 #define BR_PS_32 0x00001800 /* Port Size 32 bit */
29 #define BR_DECC 0x00000600
31 #define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */
32 #define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */
33 #define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */
34 #define BR_WP 0x00000100
[all …]
/kernel/linux/linux-4.19/arch/powerpc/include/asm/
Dfsl_lbc.h35 #define BR_BA 0xFFFF8000
37 #define BR_PS 0x00001800
39 #define BR_PS_8 0x00000800 /* Port Size 8 bit */
40 #define BR_PS_16 0x00001000 /* Port Size 16 bit */
41 #define BR_PS_32 0x00001800 /* Port Size 32 bit */
42 #define BR_DECC 0x00000600
44 #define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */
45 #define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */
46 #define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */
47 #define BR_WP 0x00000100
[all …]
/kernel/linux/linux-4.19/sound/pci/vx222/
Dvx222.h45 #define VX2_AKM_LEVEL_MAX 0x93
51 #define VX_RESET_DMA_REGISTER_OFFSET 0x00000008
54 #define VX_INTCSR_VALUE 0x00000001
55 #define VX_PCI_INTERRUPT_MASK 0x00000040
57 /* Constants used to access the CDSP register (0x20). */
58 #define VX_CDSP_TEST1_MASK 0x00000080
59 #define VX_CDSP_TOR1_MASK 0x00000040
60 #define VX_CDSP_TOR2_MASK 0x00000020
61 #define VX_CDSP_RESERVED0_0_MASK 0x00000010
62 #define VX_CDSP_CODEC_RESET_MASK 0x00000008
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dregsnv04.h5 #define NV04_PFIFO_DELAY_0 0x00002040
6 #define NV04_PFIFO_DMA_TIMESLICE 0x00002044
7 #define NV04_PFIFO_NEXT_CHANNEL 0x00002050
8 #define NV03_PFIFO_INTR_0 0x00002100
9 #define NV03_PFIFO_INTR_EN_0 0x00002140
10 # define NV_PFIFO_INTR_CACHE_ERROR (1<<0)
17 #define NV03_PFIFO_RAMHT 0x00002210
18 #define NV03_PFIFO_RAMFC 0x00002214
19 #define NV03_PFIFO_RAMRO 0x00002218
20 #define NV40_PFIFO_RAMFC 0x00002220
[all …]

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