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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsuniv-f1c100s.dtsi14 #clock-cells = <0>;
21 #clock-cells = <0>;
44 reg = <0x01c00000 0x30>;
51 reg = <0x00010000 0x1000>;
54 ranges = <0 0x00010000 0x1000>;
56 otg_sram: sram-section@0 {
59 reg = <0x0000 0x1000>;
67 reg = <0x01c20000 0x400>;
76 reg = <0x01c20400 0x400>;
83 reg = <0x01c20800 0x400>;
[all …]
Dsun8i-v3s.dtsi70 #size-cells = <0>;
72 cpu@0 {
75 reg = <0>;
100 #clock-cells = <0>;
108 #clock-cells = <0>;
124 reg = <0x01000000 0x10000>;
136 reg = <0x01100000 0x100000>;
137 clocks = <&display_clocks 0>,
141 resets = <&display_clocks 0>;
145 #size-cells = <0>;
[all …]
Dsun5i.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
119 size = <0x6000000>;
120 alloc-ranges = <0x40000000 0x10000000>;
135 reg = <0x01c00000 0x30>;
140 sram_a: sram@0 {
142 reg = <0x00000000 0xc000>;
[all …]
Dsun8i-a23-a33.dtsi90 #size-cells = <0>;
92 cpu0: cpu@0 {
95 reg = <0>;
111 #clock-cells = <0>;
119 #clock-cells = <0>;
135 reg = <0x01c00000 0x30>;
142 reg = <0x01d00000 0x80000>;
145 ranges = <0 0x01d00000 0x80000>;
147 ve_sram: sram-section@0 {
150 reg = <0x000000 0x80000>;
[all …]
Dsunxi-h3-h5.dtsi86 #clock-cells = <0>;
94 #clock-cells = <0>;
117 reg = <0x01000000 0x10000>;
128 compatible = "allwinner,sun8i-h3-de2-mixer-0";
129 reg = <0x01100000 0x100000>;
138 #size-cells = <0>;
152 reg = <0x01c02000 0x1000>;
162 reg = <0x01c0c000 0x1000>;
171 #size-cells = <0>;
173 tcon0_in: port@0 {
[all …]
Dsun8i-r40.dtsi63 #clock-cells = <0>;
71 #clock-cells = <0>;
81 #size-cells = <0>;
83 cpu0: cpu@0 {
86 reg = <0>;
117 polling-delay-passive = <0>;
118 polling-delay = <0>;
119 thermal-sensors = <&ths 0>;
124 polling-delay-passive = <0>;
125 polling-delay = <0>;
[all …]
Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
167 #clock-cells = <0>;
174 #clock-cells = <0>;
200 size = <0x6000000>;
201 alloc-ranges = <0x40000000 0x10000000>;
215 reg = <0x01c00000 0x30>;
220 sram_a: sram@0 {
222 reg = <0x00000000 0xc000>;
[all …]
Dsun8i-a83t.dtsi62 #size-cells = <0>;
64 cpu0: cpu@0 {
71 reg = <0>;
115 reg = <0x100>;
126 reg = <0x101>;
137 reg = <0x102>;
148 reg = <0x103>;
168 #clock-cells = <0>;
181 #clock-cells = <0>;
188 #clock-cells = <0>;
[all …]
Dsun6i-a31.dtsi100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0>;
216 #clock-cells = <0>;
224 #clock-cells = <0>;
241 #clock-cells = <0>;
248 #clock-cells = <0>;
255 #clock-cells = <0>;
257 reg = <0x01c200d0 0x4>;
277 reg = <0x01c02000 0x1000>;
[all …]
Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
183 size = <0x6000000>;
184 alloc-ranges = <0x40000000 0x10000000>;
210 #clock-cells = <0>;
217 #clock-cells = <0>;
233 #clock-cells = <0>;
240 #clock-cells = <0>;
247 #clock-cells = <0>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dallwinner,sunxi-pinctrl.txt48 irq bank found in the controller. 0 if no setup required.
83 0: 10 mA
88 0: No resistor
96 reg = <0x01c20800 0x400>;
98 #size-cells = <0>;
100 uart1_pins_a: uart1@0 {
103 allwinner,drive = <0>;
104 allwinner,pull = <0>;
110 allwinner,drive = <0>;
111 allwinner,pull = <0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dallwinner,sun4i-a10-pinctrl.yaml108 "^([rs]-)?(([a-z0-9]{3,}|[a-oq-z][a-z0-9]*?)?-)+?(p[a-ilm][0-9]*?-)??pins?$":
250 reg = <0x01c20800 0x400>;
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dsun8i-v3s.dtsi54 #size-cells = <0>;
56 cpu@0 {
59 reg = <0>;
84 #clock-cells = <0>;
91 #clock-cells = <0>;
106 reg = <0x01000000 0x100000>;
118 reg = <0x01100000 0x100000>;
119 clocks = <&display_clocks 0>,
123 resets = <&display_clocks 0>;
129 #size-cells = <0>;
[all …]
Dsun8i-a23-a33.dtsi60 simplefb_lcd: framebuffer@0 {
84 #size-cells = <0>;
86 cpu0: cpu@0 {
89 reg = <0>;
105 #clock-cells = <0>;
113 #clock-cells = <0>;
129 reg = <0x01c00000 0x30>;
136 reg = <0x01d00000 0x80000>;
139 ranges = <0 0x01d00000 0x80000>;
141 ve_sram: sram-section@0 {
[all …]
Dsun5i.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
71 framebuffer@0 {
97 #clock-cells = <0>;
103 osc32k: clk@0 {
104 #clock-cells = <0>;
119 reg = <0x01c00000 0x30>;
124 sram_a: sram@0 {
126 reg = <0x00000000 0xc000>;
[all …]
Dsun8i-r40.dtsi61 #clock-cells = <0>;
68 #clock-cells = <0>;
77 #size-cells = <0>;
79 cpu@0 {
82 reg = <0>;
119 reg = <0x01000000 0x100000>;
130 compatible = "allwinner,sun8i-r40-de2-mixer-0";
131 reg = <0x01100000 0x100000>;
140 #size-cells = <0>;
153 reg = <0x01200000 0x100000>;
[all …]
Dsunxi-h3-h5.dtsi86 #clock-cells = <0>;
93 #clock-cells = <0>;
100 #clock-cells = <0>;
122 reg = <0x01000000 0x100000>;
133 compatible = "allwinner,sun8i-h3-de2-mixer-0";
134 reg = <0x01100000 0x100000>;
143 #size-cells = <0>;
158 reg = <0x01c00000 0x1000>;
163 reg = <0x01c02000 0x1000>;
173 reg = <0x01c0c000 0x1000>;
[all …]
Dsun8i-a83t.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
71 reg = <0>;
109 reg = <0x100>;
118 reg = <0x101>;
127 reg = <0x102>;
136 reg = <0x103>;
155 #clock-cells = <0>;
168 #clock-cells = <0>;
175 #clock-cells = <0>;
[all …]
Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
167 #clock-cells = <0>;
174 #clock-cells = <0>;
195 reg = <0x01c00000 0x30>;
200 sram_a: sram@0 {
202 reg = <0x00000000 0xc000>;
205 ranges = <0 0x00000000 0xc000>;
209 reg = <0x8000 0x4000>;
[all …]
Dsun7i-a20.dtsi65 framebuffer@0 {
100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0>;
174 reg = <0x40000000 0x80000000>;
197 #clock-cells = <0>;
203 osc32k: clk@0 {
204 #clock-cells = <0>;
220 #clock-cells = <0>;
227 #clock-cells = <0>;
[all …]
Dsun6i-a31.dtsi65 simplefb_hdmi: framebuffer@0 {
100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0>;
200 reg = <0x40000000 0x80000000>;
217 #clock-cells = <0>;
222 osc32k: clk@0 {
223 #clock-cells = <0>;
239 #clock-cells = <0>;
246 #clock-cells = <0>;
[all …]
/kernel/linux/linux-4.19/arch/arm64/boot/dts/allwinner/
Dsun50i-a64.dtsi84 #size-cells = <0>;
86 cpu0: cpu@0 {
89 reg = <0>;
116 #clock-cells = <0>;
123 #clock-cells = <0>;
130 #clock-cells = <0>;
156 #sound-dai-cells = <0>;
180 reg = <0x1000000 0x400000>;
184 ranges = <0 0x1000000 0x400000>;
186 display_clocks: clock@0 {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64.dtsi46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&ths 0>;
221 polling-delay-passive = <0>;
222 polling-delay = <0>;
[all …]