Home
last modified time | relevance | path

Searched +full:0 +full:x028 (Results 1 – 25 of 372) sorted by relevance

12345678910>>...15

/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-qmp.h10 #define QSERDES_COM_BG_TIMER 0x00c
11 #define QSERDES_COM_SSC_EN_CENTER 0x010
12 #define QSERDES_COM_SSC_ADJ_PER1 0x014
13 #define QSERDES_COM_SSC_ADJ_PER2 0x018
14 #define QSERDES_COM_SSC_PER1 0x01c
15 #define QSERDES_COM_SSC_PER2 0x020
16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024
17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028
18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034
19 #define QSERDES_COM_CLK_ENABLE1 0x038
[all …]
/kernel/linux/linux-4.19/drivers/phy/qualcomm/
Dphy-qcom-qmp.h10 #define QSERDES_COM_BG_TIMER 0x00c
11 #define QSERDES_COM_SSC_EN_CENTER 0x010
12 #define QSERDES_COM_SSC_ADJ_PER1 0x014
13 #define QSERDES_COM_SSC_ADJ_PER2 0x018
14 #define QSERDES_COM_SSC_PER1 0x01c
15 #define QSERDES_COM_SSC_PER2 0x020
16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024
17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028
18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034
19 #define QSERDES_COM_CLK_ENABLE1 0x038
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/vc4/
Dvc4_hdmi_regs.h6 #define VC4_HDMI_PACKET_STRIDE 0x24
9 VC4_INVALID = 0,
147 VC4_HD_REG(HDMI_M_CTL, 0x000c),
148 VC4_HD_REG(HDMI_MAI_CTL, 0x0014),
149 VC4_HD_REG(HDMI_MAI_THR, 0x0018),
150 VC4_HD_REG(HDMI_MAI_FMT, 0x001c),
151 VC4_HD_REG(HDMI_MAI_DATA, 0x0020),
152 VC4_HD_REG(HDMI_MAI_SMP, 0x002c),
153 VC4_HD_REG(HDMI_VID_CTL, 0x0038),
154 VC4_HD_REG(HDMI_CSC_CTL, 0x0040),
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/via/
Daccel.h14 #define MMIO_VGABASE 0x8000
15 #define MMIO_CR_READ (MMIO_VGABASE + 0x3D4)
16 #define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5)
17 #define MMIO_SR_READ (MMIO_VGABASE + 0x3C4)
18 #define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5)
21 #define HW_Cursor_ON 0
27 #define VIA_MMIO_BLTBASE 0x200000
28 #define VIA_MMIO_BLTSIZE 0x200000
31 #define VIA_REG_GECMD 0x000
32 #define VIA_REG_GEMODE 0x004
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-driver-jz4780-efuse10 0x000 64 bit Random Number
11 0x008 128 bit Ingenic Chip ID
12 0x018 128 bit Customer ID
13 0x028 3520 bit Reserved
14 0x1E0 8 bit Protect Segment
15 0x1E1 2296 bit HDMI Key
16 0x300 2048 bit Security boot key
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Dvirtio_mmio.h8 #define VIRTIO_MMIO_MAGIC_VALUE 0x000
9 #define VIRTIO_MMIO_VERSION 0x004
10 #define VIRTIO_MMIO_DEVICE_ID 0x008
11 #define VIRTIO_MMIO_VENDOR_ID 0x00c
12 #define VIRTIO_MMIO_DEVICE_FEATURES 0x010
13 #define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014
14 #define VIRTIO_MMIO_DRIVER_FEATURES 0x020
15 #define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024
17 #define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
19 #define VIRTIO_MMIO_QUEUE_SEL 0x030
[all …]
/kernel/linux/linux-4.19/drivers/video/fbdev/via/
Daccel.h28 #define MMIO_VGABASE 0x8000
29 #define MMIO_CR_READ (MMIO_VGABASE + 0x3D4)
30 #define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5)
31 #define MMIO_SR_READ (MMIO_VGABASE + 0x3C4)
32 #define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5)
35 #define HW_Cursor_ON 0
41 #define VIA_MMIO_BLTBASE 0x200000
42 #define VIA_MMIO_BLTSIZE 0x200000
45 #define VIA_REG_GECMD 0x000
46 #define VIA_REG_GEMODE 0x004
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-w90x900/
Dregs-gcr.h22 #define REG_PDID (GCR_BA+0x000)
23 #define REG_PWRON (GCR_BA+0x004)
24 #define REG_ARBCON (GCR_BA+0x008)
25 #define REG_MFSEL (GCR_BA+0x00C)
26 #define REG_EBIDPE (GCR_BA+0x010)
27 #define REG_LCDDPE (GCR_BA+0x014)
28 #define REG_GPIOCPE (GCR_BA+0x018)
29 #define REG_GPIODPE (GCR_BA+0x01C)
30 #define REG_GPIOEPE (GCR_BA+0x020)
31 #define REG_GPIOFPE (GCR_BA+0x024)
[all …]
/kernel/linux/linux-5.10/include/linux/
Dserial_pnx8xxx.h20 #define PNX8XXX_LCR 0
21 #define PNX8XXX_MCR 0x004
22 #define PNX8XXX_BAUD 0x008
23 #define PNX8XXX_CFG 0x00c
24 #define PNX8XXX_FIFO 0x028
25 #define PNX8XXX_ISTAT 0xfe0
26 #define PNX8XXX_IEN 0xfe4
27 #define PNX8XXX_ICLR 0xfe8
28 #define PNX8XXX_ISET 0xfec
29 #define PNX8XXX_PD 0xff4
[all …]
/kernel/linux/linux-4.19/include/linux/amba/
Dsp810.h18 #define SCCTRL 0x000
19 #define SCSYSSTAT 0x004
20 #define SCIMCTRL 0x008
21 #define SCIMSTAT 0x00C
22 #define SCXTALCTRL 0x010
23 #define SCPLLCTRL 0x014
24 #define SCPLLFCTRL 0x018
25 #define SCPERCTRL0 0x01C
26 #define SCPERCTRL1 0x020
27 #define SCPEREN 0x024
[all …]
/kernel/linux/linux-5.10/include/linux/amba/
Dsp810.h18 #define SCCTRL 0x000
19 #define SCSYSSTAT 0x004
20 #define SCIMCTRL 0x008
21 #define SCIMSTAT 0x00C
22 #define SCXTALCTRL 0x010
23 #define SCPLLCTRL 0x014
24 #define SCPLLFCTRL 0x018
25 #define SCPERCTRL0 0x01C
26 #define SCPERCTRL1 0x020
27 #define SCPEREN 0x024
[all …]
/kernel/linux/linux-5.10/sound/soc/meson/
Daiu.h18 PCLK = 0,
63 #define AIU_IEC958_BPF 0x000
64 #define AIU_958_MISC 0x010
65 #define AIU_IEC958_DCU_FF_CTRL 0x01c
66 #define AIU_958_CHSTAT_L0 0x020
67 #define AIU_958_CHSTAT_L1 0x024
68 #define AIU_958_CTRL 0x028
69 #define AIU_I2S_SOURCE_DESC 0x034
70 #define AIU_I2S_DAC_CFG 0x040
71 #define AIU_I2S_SYNC 0x044
[all …]
/kernel/linux/linux-5.10/drivers/bus/
Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/kernel/linux/linux-4.19/drivers/phy/tegra/
Dxusb-tegra210.c33 ((x) ? (11 + ((x) - 1) * 6) : 0)
34 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f
36 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf
38 #define FUSE_USB_CALIB_EXT_RPD_CTRL_SHIFT 0
39 #define FUSE_USB_CALIB_EXT_RPD_CTRL_MASK 0x1f
41 #define XUSB_PADCTL_USB2_PAD_MUX 0x004
43 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_MASK 0x3
44 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_XUSB 0x1
46 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK 0x3
47 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB 0x1
[all …]
/kernel/linux/linux-4.19/include/linux/
Dserial_pnx8xxx.h33 #define PNX8XXX_LCR 0
34 #define PNX8XXX_MCR 0x004
35 #define PNX8XXX_BAUD 0x008
36 #define PNX8XXX_CFG 0x00c
37 #define PNX8XXX_FIFO 0x028
38 #define PNX8XXX_ISTAT 0xfe0
39 #define PNX8XXX_IEN 0xfe4
40 #define PNX8XXX_ICLR 0xfe8
41 #define PNX8XXX_ISET 0xfec
42 #define PNX8XXX_PD 0xff4
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi16 reg = <0x0 0xe896c000 0x0 0x72c>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
26 0x054 MUX_M2 /* UART0_RXD */
27 0x058 MUX_M2 /* UART0_TXD */
33 0x700 MUX_M2 /* UART2_CTS_N */
34 0x704 MUX_M2 /* UART2_RTS_N */
35 0x708 MUX_M2 /* UART2_RXD */
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/rkvdec/
Drkvdec-regs.h7 #define RKVDEC_REG_INTERRUPT 0x004
8 #define RKVDEC_INTERRUPT_DEC_E BIT(0)
32 #define RKVDEC_REG_SYSCTRL 0x008
33 #define RKVDEC_IN_ENDIAN BIT(0)
44 #define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12)
45 #define RKVDEC_MODE(x) (((x) & 0x03) << 20)
55 #define RKVDEC_REG_PICPAR 0x00C
56 #define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff)
58 #define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12)
59 #define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21)
[all …]
/kernel/linux/linux-4.19/drivers/bus/
Domap_l3_smx.h28 #define L3_COMPONENT 0x000
29 #define L3_CORE 0x018
30 #define L3_AGENT_CONTROL 0x020
31 #define L3_AGENT_STATUS 0x028
32 #define L3_ERROR_LOG 0x058
37 #define L3_ERROR_LOG_ADDR 0x060
40 #define L3_SI_CONTROL 0x020
41 #define L3_SI_FLAG_STATUS_0 0x510
45 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
109 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/kernel/linux/linux-5.10/arch/m68k/ifpsp060/
Disp.doc112 bra _060ISP_TOP+128+0
116 point is located 0 bytes from the top of the "Entry-point" section.)
123 0x000: _060_real_chk
124 0x004: _060_real_divbyzero
125 0x008: _060_real_trace
126 0x00c: _060_real_access
127 0x010: _060_isp_done
129 0x014: _060_real_cas
130 0x018: _060_real_cas2
131 0x01c: _060_real_lock_page
[all …]
/kernel/linux/linux-4.19/arch/m68k/ifpsp060/
Disp.doc112 bra _060ISP_TOP+128+0
116 point is located 0 bytes from the top of the "Entry-point" section.)
123 0x000: _060_real_chk
124 0x004: _060_real_divbyzero
125 0x008: _060_real_trace
126 0x00c: _060_real_access
127 0x010: _060_isp_done
129 0x014: _060_real_cas
130 0x018: _060_real_cas2
131 0x01c: _060_real_lock_page
[all …]
/kernel/linux/linux-5.10/drivers/phy/tegra/
Dxusb-tegra210.c25 ((x) ? (11 + ((x) - 1) * 6) : 0)
26 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f
28 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf
30 #define FUSE_USB_CALIB_EXT_RPD_CTRL_SHIFT 0
31 #define FUSE_USB_CALIB_EXT_RPD_CTRL_MASK 0x1f
33 #define XUSB_PADCTL_USB2_PAD_MUX 0x004
35 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_MASK 0x3
36 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_XUSB 0x1
38 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK 0x3
39 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB 0x1
[all …]
/kernel/linux/linux-5.10/drivers/media/cec/platform/tegra/
Dtegra_cec.h18 #define TEGRA_CEC_SW_CONTROL 0x000
19 #define TEGRA_CEC_HW_CONTROL 0x004
20 #define TEGRA_CEC_INPUT_FILTER 0x008
21 #define TEGRA_CEC_TX_REGISTER 0x010
22 #define TEGRA_CEC_RX_REGISTER 0x014
23 #define TEGRA_CEC_RX_TIMING_0 0x018
24 #define TEGRA_CEC_RX_TIMING_1 0x01c
25 #define TEGRA_CEC_RX_TIMING_2 0x020
26 #define TEGRA_CEC_TX_TIMING_0 0x024
27 #define TEGRA_CEC_TX_TIMING_1 0x028
[all …]
/kernel/linux/linux-4.19/drivers/hwtracing/coresight/
Dcoresight-catu.h14 #define CATU_CONTROL 0x000
15 #define CATU_MODE 0x004
16 #define CATU_AXICTRL 0x008
17 #define CATU_IRQEN 0x00c
18 #define CATU_SLADDRLO 0x020
19 #define CATU_SLADDRHI 0x024
20 #define CATU_INADDRLO 0x028
21 #define CATU_INADDRHI 0x02c
22 #define CATU_STATUS 0x100
23 #define CATU_DEVARCH 0xfbc
[all …]
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
Dcoresight-catu.h14 #define CATU_CONTROL 0x000
15 #define CATU_MODE 0x004
16 #define CATU_AXICTRL 0x008
17 #define CATU_IRQEN 0x00c
18 #define CATU_SLADDRLO 0x020
19 #define CATU_SLADDRHI 0x024
20 #define CATU_INADDRLO 0x028
21 #define CATU_INADDRHI 0x02c
22 #define CATU_STATUS 0x100
23 #define CATU_DEVARCH 0xfbc
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-mmp/
Dclock-pxa910.c18 #define APBC_UART0 APBC_REG(0x000)
19 #define APBC_UART1 APBC_REG(0x004)
20 #define APBC_GPIO APBC_REG(0x008)
21 #define APBC_PWM1 APBC_REG(0x00c)
22 #define APBC_PWM2 APBC_REG(0x010)
23 #define APBC_PWM3 APBC_REG(0x014)
24 #define APBC_PWM4 APBC_REG(0x018)
25 #define APBC_SSP1 APBC_REG(0x01c)
26 #define APBC_SSP2 APBC_REG(0x020)
27 #define APBC_RTC APBC_REG(0x028)
[all …]

12345678910>>...15