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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dqcom,sdm845-venus.yaml132 reg = <0x0aa00000 0xff000>;
139 iommus = <&apps_smmu 0x10a0 0x8>,
140 <&apps_smmu 0x10b0 0x0>;
Dqcom,sdm845-venus-v2.yaml119 reg = <0x0aa00000 0xff000>;
135 iommus = <&apps_smmu 0x10a0 0x8>,
136 <&apps_smmu 0x10b0 0x0>;
/kernel/linux/linux-5.10/drivers/gpu/drm/lima/
Dlima_regs.h14 #define LIMA_PMU_POWER_UP 0x00
15 #define LIMA_PMU_POWER_DOWN 0x04
16 #define LIMA_PMU_POWER_GP0_MASK BIT(0)
29 #define LIMA_PMU_STATUS 0x08
30 #define LIMA_PMU_INT_MASK 0x0C
31 #define LIMA_PMU_INT_RAWSTAT 0x10
32 #define LIMA_PMU_INT_CLEAR 0x18
33 #define LIMA_PMU_INT_CMD_MASK BIT(0)
34 #define LIMA_PMU_SW_DELAY 0x1C
37 #define LIMA_L2_CACHE_SIZE 0x0004
[all …]
/kernel/linux/linux-4.19/arch/m68k/include/asm/
Dmac_psc.h37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
[all …]
/kernel/linux/linux-5.10/arch/m68k/include/asm/
Dmac_psc.h37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx23-pinfunc.h19 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
20 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
21 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
22 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
23 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
24 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
25 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
26 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
27 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
28 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
Dimx28-pinfunc.h19 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
20 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
21 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
22 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
23 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
24 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
25 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
26 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
27 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
28 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
Dkeystone-k2g-evm.dts17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
27 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
66 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
67 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
73 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
74 K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat2.mmc0_dat2 */
75 K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat1.mmc0_dat1 */
76 K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat0.mmc0_dat0 */
77 K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_clk.mmc0_clk */
78 K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_cmd.mmc0_cmd */
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dimx23-pinfunc.h19 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
20 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
21 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
22 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
23 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
24 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
25 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
26 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
27 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
28 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
Dimx28-pinfunc.h19 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
20 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
21 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
22 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
23 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
24 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
25 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
26 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
27 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
28 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dgpucc-sm8250.c22 #define CX_GMU_CBCR_SLEEP_MASK 0xf
24 #define CX_GMU_CBCR_WAKE_MASK 0xf
37 { 249600000, 2000000000, 0 },
41 .l = 0x1a,
42 .alpha = 0xaaa,
43 .config_ctl_val = 0x20485699,
44 .config_ctl_hi_val = 0x00002261,
45 .config_ctl_hi1_val = 0x029a699c,
46 .user_ctl_val = 0x00000000,
47 .user_ctl_hi_val = 0x00000805,
[all …]
/kernel/linux/linux-4.19/arch/powerpc/kvm/
Dmpic.c45 #define VID 0x03 /* MPIC version ID */
48 #define OPENPIC_FLAG_IDR_CRIT (1 << 0)
49 #define OPENPIC_FLAG_ILR (2 << 0)
52 #define OPENPIC_REG_SIZE 0x40000
53 #define OPENPIC_GLB_REG_START 0x0
54 #define OPENPIC_GLB_REG_SIZE 0x10F0
55 #define OPENPIC_TMR_REG_START 0x10F0
56 #define OPENPIC_TMR_REG_SIZE 0x220
57 #define OPENPIC_MSI_REG_START 0x1600
58 #define OPENPIC_MSI_REG_SIZE 0x200
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kvm/
Dmpic.c44 #define VID 0x03 /* MPIC version ID */
47 #define OPENPIC_FLAG_IDR_CRIT (1 << 0)
48 #define OPENPIC_FLAG_ILR (2 << 0)
51 #define OPENPIC_REG_SIZE 0x40000
52 #define OPENPIC_GLB_REG_START 0x0
53 #define OPENPIC_GLB_REG_SIZE 0x10F0
54 #define OPENPIC_TMR_REG_START 0x10F0
55 #define OPENPIC_TMR_REG_SIZE 0x220
56 #define OPENPIC_MSI_REG_START 0x1600
57 #define OPENPIC_MSI_REG_SIZE 0x200
[all …]
/kernel/linux/linux-5.10/include/media/
Ddvb-usb-ids.h14 #define USB_VID_ADSTECH 0x06e1
15 #define USB_VID_AFATECH 0x15a4
16 #define USB_VID_ALCOR_MICRO 0x058f
17 #define USB_VID_ALINK 0x05e3
18 #define USB_VID_AMT 0x1c73
19 #define USB_VID_ANCHOR 0x0547
20 #define USB_VID_ANSONIC 0x10b9
21 #define USB_VID_ANUBIS_ELECTRONIC 0x10fd
22 #define USB_VID_ASUS 0x0b05
23 #define USB_VID_AVERMEDIA 0x07ca
[all …]
/kernel/linux/linux-4.19/include/media/
Ddvb-usb-ids.h14 #define USB_VID_ADSTECH 0x06e1
15 #define USB_VID_AFATECH 0x15a4
16 #define USB_VID_ALCOR_MICRO 0x058f
17 #define USB_VID_ALINK 0x05e3
18 #define USB_VID_AMT 0x1c73
19 #define USB_VID_ANCHOR 0x0547
20 #define USB_VID_ANSONIC 0x10b9
21 #define USB_VID_ANUBIS_ELECTRONIC 0x10fd
22 #define USB_VID_ASUS 0x0b05
23 #define USB_VID_AVERMEDIA 0x07ca
[all …]
/kernel/linux/linux-4.19/include/linux/soc/samsung/
Dexynos-regs-pmu.h17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
/kernel/linux/linux-5.10/include/linux/soc/samsung/
Dexynos-regs-pmu.h17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_regs.h26 #define CN6XXX_XPANSION_BAR 0x30
28 #define CN6XXX_MSI_CAP 0x50
29 #define CN6XXX_MSI_ADDR_LO 0x54
30 #define CN6XXX_MSI_ADDR_HI 0x58
31 #define CN6XXX_MSI_DATA 0x5C
33 #define CN6XXX_PCIE_CAP 0x70
34 #define CN6XXX_PCIE_DEVCAP 0x74
35 #define CN6XXX_PCIE_DEVCTL 0x78
36 #define CN6XXX_PCIE_LINKCAP 0x7C
37 #define CN6XXX_PCIE_LINKCTL 0x80
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_regs.h26 #define CN6XXX_XPANSION_BAR 0x30
28 #define CN6XXX_MSI_CAP 0x50
29 #define CN6XXX_MSI_ADDR_LO 0x54
30 #define CN6XXX_MSI_ADDR_HI 0x58
31 #define CN6XXX_MSI_DATA 0x5C
33 #define CN6XXX_PCIE_CAP 0x70
34 #define CN6XXX_PCIE_DEVCAP 0x74
35 #define CN6XXX_PCIE_DEVCTL 0x78
36 #define CN6XXX_PCIE_LINKCAP 0x7C
37 #define CN6XXX_PCIE_LINKCTL 0x80
[all …]
/kernel/linux/linux-5.10/drivers/char/
Dsonypi.c54 module_param(minor, int, 0);
58 static int verbose; /* = 0 */
60 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
62 static int fnkeyinit; /* = 0 */
67 static int camera; /* = 0 */
72 static int compat; /* = 0 */
77 static unsigned long mask = 0xffffffff;
90 "set this to 0 if you think the automatic ioport check for sony-laptop is wrong");
97 #define SONYPI_IRQ_PORT 0x8034
99 #define SONYPI_TYPE1_BASE 0x50
[all …]
/kernel/linux/linux-4.19/drivers/char/
Dsonypi.c68 module_param(minor, int, 0);
72 static int verbose; /* = 0 */
74 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
76 static int fnkeyinit; /* = 0 */
81 static int camera; /* = 0 */
86 static int compat; /* = 0 */
91 static unsigned long mask = 0xffffffff;
104 "set this to 0 if you think the automatic ioport check for sony-laptop is wrong");
111 #define SONYPI_IRQ_PORT 0x8034
113 #define SONYPI_TYPE1_BASE 0x50
[all …]
/kernel/linux/linux-4.19/arch/sparc/kernel/
Dpci_sabre.c32 #define SABRE_UE_AFSR 0x0030UL
33 #define SABRE_UEAFSR_PDRD 0x4000000000000000UL /* Primary PCI DMA Read */
34 #define SABRE_UEAFSR_PDWR 0x2000000000000000UL /* Primary PCI DMA Write */
35 #define SABRE_UEAFSR_SDRD 0x0800000000000000UL /* Secondary PCI DMA Read */
36 #define SABRE_UEAFSR_SDWR 0x0400000000000000UL /* Secondary PCI DMA Write */
37 #define SABRE_UEAFSR_SDTE 0x0200000000000000UL /* Secondary DMA Translation Error */
38 #define SABRE_UEAFSR_PDTE 0x0100000000000000UL /* Primary DMA Translation Error */
39 #define SABRE_UEAFSR_BMSK 0x0000ffff00000000UL /* Bytemask */
40 #define SABRE_UEAFSR_OFF 0x00000000e0000000UL /* Offset (AFAR bits [5:3] */
41 #define SABRE_UEAFSR_BLK 0x0000000000800000UL /* Was block operation */
[all …]
/kernel/linux/linux-5.10/arch/sparc/kernel/
Dpci_sabre.c32 #define SABRE_UE_AFSR 0x0030UL
33 #define SABRE_UEAFSR_PDRD 0x4000000000000000UL /* Primary PCI DMA Read */
34 #define SABRE_UEAFSR_PDWR 0x2000000000000000UL /* Primary PCI DMA Write */
35 #define SABRE_UEAFSR_SDRD 0x0800000000000000UL /* Secondary PCI DMA Read */
36 #define SABRE_UEAFSR_SDWR 0x0400000000000000UL /* Secondary PCI DMA Write */
37 #define SABRE_UEAFSR_SDTE 0x0200000000000000UL /* Secondary DMA Translation Error */
38 #define SABRE_UEAFSR_PDTE 0x0100000000000000UL /* Primary DMA Translation Error */
39 #define SABRE_UEAFSR_BMSK 0x0000ffff00000000UL /* Bytemask */
40 #define SABRE_UEAFSR_OFF 0x00000000e0000000UL /* Offset (AFAR bits [5:3] */
41 #define SABRE_UEAFSR_BLK 0x0000000000800000UL /* Was block operation */
[all …]
/kernel/linux/linux-4.19/drivers/video/fbdev/
Dw100fb.h24 #define mmCHIP_ID 0x0000
25 #define mmREVISION_ID 0x0004
26 #define mmWRAP_BUF_A 0x0008
27 #define mmWRAP_BUF_B 0x000C
28 #define mmWRAP_TOP_DIR 0x0010
29 #define mmWRAP_START_DIR 0x0014
30 #define mmCIF_CNTL 0x0018
31 #define mmCFGREG_BASE 0x001C
32 #define mmCIF_IO 0x0020
33 #define mmCIF_READ_DBG 0x0024
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Dw100fb.h20 #define mmCHIP_ID 0x0000
21 #define mmREVISION_ID 0x0004
22 #define mmWRAP_BUF_A 0x0008
23 #define mmWRAP_BUF_B 0x000C
24 #define mmWRAP_TOP_DIR 0x0010
25 #define mmWRAP_START_DIR 0x0014
26 #define mmCIF_CNTL 0x0018
27 #define mmCFGREG_BASE 0x001C
28 #define mmCIF_IO 0x0020
29 #define mmCIF_READ_DBG 0x0024
[all …]

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