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/kernel/linux/linux-4.19/Documentation/media/uapi/v4l/
Dpipeline.dot4 …scaler [label="{<scaler_0> 0} | Host\nScaler | {<scaler_1> 1} ", shape=Mrecord, style=filled, fill…
5 …frontend [label="{<frontend_0> 0} | Host\nFrontend | {<frontend_1> 1}", shape=Mrecord, style=fille…
6 sensor [label="Sensor | {<sensor_0> 0}", shape=Mrecord, style=filled, fillcolor=aquamarine]
7 io [label="{<io_0> 0} | V4L I/O", shape=Mrecord, style=filled, fillcolor=aquamarine]
11 scaler:scaler_1 -> io:io_0 [color=blue, label="HQ: 1280x720\nHS: 1280x720"]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpipeline.dot6 …scaler [label="{<scaler_0> 0} | Host\nScaler | {<scaler_1> 1} ", shape=Mrecord, style=filled, fill…
7 …frontend [label="{<frontend_0> 0} | Host\nFrontend | {<frontend_1> 1}", shape=Mrecord, style=fille…
8 sensor [label="Sensor | {<sensor_0> 0}", shape=Mrecord, style=filled, fillcolor=aquamarine]
9 io [label="{<io_0> 0} | V4L I/O", shape=Mrecord, style=filled, fillcolor=aquamarine]
13 scaler:scaler_1 -> io:io_0 [color=blue, label="HQ: 1280x720\nHS: 1280x720"]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c23 DEFINE_RES_MEM(0xffe80000, 0x100),
24 DEFINE_RES_IRQ(evt2irq(0x700)),
25 DEFINE_RES_IRQ(evt2irq(0x720)),
26 DEFINE_RES_IRQ(evt2irq(0x760)),
27 DEFINE_RES_IRQ(evt2irq(0x740)),
32 .id = 0,
45 DEFINE_RES_MEM(0xffd80000, 0x30),
46 DEFINE_RES_IRQ(evt2irq(0x400)),
47 DEFINE_RES_IRQ(evt2irq(0x420)),
48 DEFINE_RES_IRQ(evt2irq(0x440)),
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/
Ddrm_edid.c63 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
97 #define LEVEL_DMT 0
110 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
112 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
113 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
116 { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC },
119 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
122 { "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
124 /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
125 { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dam4.h8 #define AM4_CLKCTRL_OFFSET 0x20
14 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
15 #define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
16 #define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
17 #define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
18 #define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
19 #define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
20 #define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
21 #define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
22 #define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/
Ddrm_edid.c60 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
96 #define LEVEL_DMT 0
109 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
113 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
114 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
117 { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC },
120 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
123 { "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
125 /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
126 { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
[all …]
/kernel/linux/linux-4.19/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c25 DEFINE_RES_MEM(0xffe80000, 0x100),
26 DEFINE_RES_IRQ(evt2irq(0x700)),
27 DEFINE_RES_IRQ(evt2irq(0x720)),
28 DEFINE_RES_IRQ(evt2irq(0x760)),
29 DEFINE_RES_IRQ(evt2irq(0x740)),
34 .id = 0,
47 DEFINE_RES_MEM(0xffd80000, 0x30),
48 DEFINE_RES_IRQ(evt2irq(0x400)),
49 DEFINE_RES_IRQ(evt2irq(0x420)),
50 DEFINE_RES_IRQ(evt2irq(0x440)),
[all …]
/kernel/linux/linux-4.19/arch/arc/boot/dts/
Daxs101.dts20 …targs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleb…
Daxs103_idu.dts23 …rlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals…
/kernel/linux/linux-4.19/arch/arm/mm/
Dcache-aurora-l2.h17 #define AURORA_SYNC_REG 0x700
18 #define AURORA_RANGE_BASE_ADDR_REG 0x720
19 #define AURORA_FLUSH_PHY_ADDR_REG 0x7f0
20 #define AURORA_INVAL_RANGE_REG 0x774
21 #define AURORA_CLEAN_RANGE_REG 0x7b4
22 #define AURORA_FLUSH_RANGE_REG 0x7f4
26 (0x3 << AURORA_ACR_REPLACEMENT_OFFSET)
28 (0 << AURORA_ACR_REPLACEMENT_OFFSET)
34 #define AURORA_ACR_FORCE_WRITE_POLICY_OFFSET 0
36 (0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
[all …]
/kernel/linux/linux-5.10/arch/arm/include/asm/hardware/
Dcache-aurora-l2.h17 #define AURORA_SYNC_REG 0x700
18 #define AURORA_RANGE_BASE_ADDR_REG 0x720
19 #define AURORA_FLUSH_PHY_ADDR_REG 0x7f0
20 #define AURORA_INVAL_RANGE_REG 0x774
21 #define AURORA_CLEAN_RANGE_REG 0x7b4
22 #define AURORA_FLUSH_RANGE_REG 0x7f4
26 (0x3 << AURORA_ACR_REPLACEMENT_OFFSET)
28 (0 << AURORA_ACR_REPLACEMENT_OFFSET)
37 #define AURORA_ACR_FORCE_WRITE_POLICY_OFFSET 0
39 (0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
[all …]
/kernel/linux/linux-5.10/Documentation/fb/
Dviafb.modes256 # 0 chars 7 lines
268 timings 14667 216 0 14 7 64 4 hsync high vsync high endmode
487 # 0 chars 0 lines
499 timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60"
524 hsync high vsync high endmode mode "1200x720-60"
530 timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50"
779 # 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock)
796 mode "1280x720-60"
/kernel/linux/linux-4.19/Documentation/fb/
Dviafb.modes256 # 0 chars 7 lines
268 timings 14667 216 0 14 7 64 4 hsync high vsync high endmode
487 # 0 chars 0 lines
499 timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60"
524 hsync high vsync high endmode mode "1200x720-60"
530 timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50"
779 # 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock)
796 mode "1280x720-60"
/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-exynos7-ufs.h12 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL 0x720
13 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
14 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
18 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
20 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x017, 0x84, PWR_MODE_ANY),
22 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
24 PHY_TRSV_REG_CFG(0x037, 0x40, PWR_MODE_ANY),
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/sis/
Dinit.h70 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f};
71 static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53};
72 static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */
73 static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54};
74 static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c};
75 static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e};
76 static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62};
77 static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35};
78 static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36};
79 static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61};
[all …]
/kernel/linux/linux-4.19/drivers/video/fbdev/sis/
Dinit.h70 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f};
71 static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53};
72 static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */
73 static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54};
74 static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c};
75 static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e};
76 static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62};
77 static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35};
78 static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36};
79 static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61};
[all …]
/kernel/linux/linux-4.19/include/dt-bindings/clock/
Dam4.h16 #define AM4_CLKCTRL_OFFSET 0x20
20 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
21 #define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
22 #define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
23 #define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
24 #define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
25 #define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
26 #define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
27 #define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
28 #define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
[all …]
/kernel/linux/linux-4.19/drivers/media/platform/qcom/venus/
Dcore.c70 int ret = 0; in venus_sys_error_handler()
117 for (i = 0; i < res->clks_num; i++) { in venus_clks_get()
123 return 0; in venus_clks_get()
132 for (i = 0; i < res->clks_num; i++) { in venus_clks_enable()
138 return 0; in venus_clks_enable()
178 return 0; in to_v4l2_codec_type()
191 return 0; in venus_enumerate_codecs()
209 for (i = 0; i < MAX_CODEC_NUM; i++) { in venus_enumerate_codecs()
246 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); in venus_probe()
251 core->irq = platform_get_irq(pdev, 0); in venus_probe()
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/radeon/
Dr600_reg.h31 #define R600_PCIE_PORT_INDEX 0x0038
32 #define R600_PCIE_PORT_DATA 0x003c
34 #define R600_RCU_INDEX 0x0100
35 #define R600_RCU_DATA 0x0104
37 #define R600_UVD_CTX_INDEX 0xf4a0
38 #define R600_UVD_CTX_DATA 0xf4a4
40 #define R600_MC_VM_FB_LOCATION 0x2180
41 #define R600_MC_FB_BASE_MASK 0x0000FFFF
42 #define R600_MC_FB_BASE_SHIFT 0
43 #define R600_MC_FB_TOP_MASK 0xFFFF0000
[all …]
/kernel/linux/linux-5.10/include/linux/usb/
Dusb338x.h30 #define SCRATCH 0x0b
47 #define USB3380_EP_CFG_MASK_IN ((0x3 << IN_ENDPOINT_TYPE) | \
49 #define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_ENDPOINT_TYPE) | \
56 #define DEVICE_CLASS 0
59 #define U1_SYSTEM_EXIT_LATENCY 0
62 #define U1_DEVICE_EXIT_LATENCY 0
66 #define USB_L1_LPM_SUPPORT 0
69 #define BEST_EFFORT_LATENCY_TOLERANCE 0
77 #define SERIAL_NUMBER_STRING_ENABLE 0
90 #define GPEP0_TIMEOUT_ENABLE 0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/sti/
Dsti_hda.c23 #define HDA_ANA_CFG 0x0000
24 #define HDA_ANA_SCALE_CTRL_Y 0x0004
25 #define HDA_ANA_SCALE_CTRL_CB 0x0008
26 #define HDA_ANA_SCALE_CTRL_CR 0x000C
27 #define HDA_ANA_ANC_CTRL 0x0010
28 #define HDA_ANA_SRC_Y_CFG 0x0014
29 #define HDA_COEFF_Y_PH1_TAP123 0x0018
30 #define HDA_COEFF_Y_PH1_TAP456 0x001C
31 #define HDA_COEFF_Y_PH2_TAP123 0x0020
32 #define HDA_COEFF_Y_PH2_TAP456 0x0024
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/sti/
Dsti_hda.c18 #define HDA_ANA_CFG 0x0000
19 #define HDA_ANA_SCALE_CTRL_Y 0x0004
20 #define HDA_ANA_SCALE_CTRL_CB 0x0008
21 #define HDA_ANA_SCALE_CTRL_CR 0x000C
22 #define HDA_ANA_ANC_CTRL 0x0010
23 #define HDA_ANA_SRC_Y_CFG 0x0014
24 #define HDA_COEFF_Y_PH1_TAP123 0x0018
25 #define HDA_COEFF_Y_PH1_TAP456 0x001C
26 #define HDA_COEFF_Y_PH2_TAP123 0x0020
27 #define HDA_COEFF_Y_PH2_TAP456 0x0024
[all …]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-shx3.c20 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
34 DEFINE_RES_MEM(0xffc30000, 0x100),
35 DEFINE_RES_IRQ(evt2irq(0x700)),
36 DEFINE_RES_IRQ(evt2irq(0x720)),
37 DEFINE_RES_IRQ(evt2irq(0x760)),
38 DEFINE_RES_IRQ(evt2irq(0x740)),
43 .id = 0,
57 DEFINE_RES_MEM(0xffc40000, 0x100),
58 DEFINE_RES_IRQ(evt2irq(0x780)),
59 DEFINE_RES_IRQ(evt2irq(0x7a0)),
[all …]
/kernel/linux/linux-4.19/arch/sh/kernel/cpu/sh4a/
Dsetup-shx3.c22 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
36 DEFINE_RES_MEM(0xffc30000, 0x100),
37 DEFINE_RES_IRQ(evt2irq(0x700)),
38 DEFINE_RES_IRQ(evt2irq(0x720)),
39 DEFINE_RES_IRQ(evt2irq(0x760)),
40 DEFINE_RES_IRQ(evt2irq(0x740)),
45 .id = 0,
59 DEFINE_RES_MEM(0xffc40000, 0x100),
60 DEFINE_RES_IRQ(evt2irq(0x780)),
61 DEFINE_RES_IRQ(evt2irq(0x7a0)),
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dr600_reg.h31 #define R600_PCIE_PORT_INDEX 0x0038
32 #define R600_PCIE_PORT_DATA 0x003c
34 #define R600_RCU_INDEX 0x0100
35 #define R600_RCU_DATA 0x0104
37 #define R600_UVD_CTX_INDEX 0xf4a0
38 #define R600_UVD_CTX_DATA 0xf4a4
40 #define R600_MC_VM_FB_LOCATION 0x2180
41 #define R600_MC_FB_BASE_MASK 0x0000FFFF
42 #define R600_MC_FB_BASE_SHIFT 0
43 #define R600_MC_FB_TOP_MASK 0xFFFF0000
[all …]

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