Searched +full:0 +full:xe450 (Results 1 – 5 of 5) sorted by relevance
2 * Rockchip USB2.0 PHY with Innosilicon IP block driver51 PHY_STATE_HS_ONLINE = 0,70 USB_CHG_STATE_UNDEFINED = 0,206 * struct rockchip_usb2phy: usb2.0 phy driver data.284 return 0; in rockchip_usb2phy_clk480m_prepare()336 init.flags = 0; in rockchip_usb2phy_clk480m_register()349 init.num_parents = 0; in rockchip_usb2phy_clk480m_register()362 if (ret < 0) in rockchip_usb2phy_clk480m_register()367 if (ret < 0) in rockchip_usb2phy_clk480m_register()370 return 0; in rockchip_usb2phy_clk480m_register()[all …]
3 * Rockchip USB2.0 PHY with Innosilicon IP block driver42 PHY_STATE_HS_ONLINE = 0,61 USB_CHG_STATE_UNDEFINED = 0,195 * struct rockchip_usb2phy - usb2.0 phy driver data.274 return 0; in rockchip_usb2phy_clk480m_prepare()326 init.flags = 0; in rockchip_usb2phy_clk480m_register()339 init.num_parents = 0; in rockchip_usb2phy_clk480m_register()352 if (ret < 0) in rockchip_usb2phy_clk480m_register()357 if (ret < 0) in rockchip_usb2phy_clk480m_register()360 return 0; in rockchip_usb2phy_clk480m_register()[all …]
7 title: Rockchip USB2.0 phy with inno IP block30 const: 033 const: 068 const: 092 const: 0135 reg = <0xe450 0x10>;139 #clock-cells = <0>;140 #phy-cells = <0>;143 #phy-cells = <0>;144 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;[all …]
41 #size-cells = <0>;69 cpu_l0: cpu@0 {72 reg = <0x0 0x0>;82 reg = <0x0 0x1>;92 reg = <0x0 0x2>;102 reg = <0x0 0x3>;112 reg = <0x0 0x100>;122 reg = <0x0 0x101>;152 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,153 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,[all …]
44 #size-cells = <0>;72 cpu_l0: cpu@0 {75 reg = <0x0 0x0>;87 reg = <0x0 0x1>;99 reg = <0x0 0x2>;111 reg = <0x0 0x3>;123 reg = <0x0 0x100>;135 reg = <0x0 0x101>;150 arm,psci-suspend-param = <0x0010000>;159 arm,psci-suspend-param = <0x1010000>;[all …]