Searched +full:7 +full:- +full:bit (Results 1 – 25 of 1152) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/ |
| D | trivial-devices.txt | 12 abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface 13 ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature … 14 ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems 15 adi,adt7461 +/-1C TDM Extended Temp Range I.C 16 adt7461 +/-1C TDM Extended Temp Range I.C 17 adi,adt7473 +/-1C TDM Extended Temp Range I.C 18 adi,adt7475 +/-1C TDM Extended Temp Range I.C 19 adi,adt7476 +/-1C TDM Extended Temp Range I.C 20 adi,adt7490 +/-1C TDM Extended Temp Range I.C 21 adi,adxl345 Three-Axis Digital Accelerometer [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/trivial-devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 28 - enum: 29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin 30 - ad,ad7414 31 # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems 32 - ad,adm9240 [all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/da9062/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) 2015-2017 Dialog Semiconductor 151 * Bit fields 158 #define DA9062AA_WRITE_MODE_MASK BIT(6) 159 #define DA9062AA_REVERT_SHIFT 7 160 #define DA9062AA_REVERT_MASK BIT(7) 166 #define DA9062AA_DVC_BUSY_MASK BIT(2) 172 #define DA9062AA_GPI1_MASK BIT(1) 174 #define DA9062AA_GPI2_MASK BIT(2) 176 #define DA9062AA_GPI3_MASK BIT(3) [all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/da9150/ |
| D | registers.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * DA9150 MFD Driver - Registers 160 #define DA9150_WRITE_MODE_MASK BIT(6) 161 #define DA9150_REVERT_SHIFT 7 162 #define DA9150_REVERT_MASK BIT(7) 172 #define DA9150_VFAULT_STAT_MASK BIT(0) 174 #define DA9150_TFAULT_STAT_MASK BIT(1) 178 #define DA9150_VDD33_STAT_MASK BIT(0) 180 #define DA9150_VDD33_SLEEP_MASK BIT(1) 181 #define DA9150_LFOSC_STAT_SHIFT 7 [all …]
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| /kernel/linux/linux-5.10/include/linux/soundwire/ |
| D | sdw_registers.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2 /* Copyright(c) 2015-17 Intel Corporation. */ 36 #define SDW_DP0_INT_TEST_FAIL BIT(0) 37 #define SDW_DP0_INT_PORT_READY BIT(1) 38 #define SDW_DP0_INT_BRA_FAILURE BIT(2) 39 #define SDW_DP0_SDCA_CASCADE BIT(3) 40 /* BIT(4) not allocated in SoundWire specification 1.2 */ 41 #define SDW_DP0_INT_IMPDEF1 BIT(5) 42 #define SDW_DP0_INT_IMPDEF2 BIT(6) 43 #define SDW_DP0_INT_IMPDEF3 BIT(7) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 9 * Copyright (C) 2013-2014 Silicon Image, Inc. 35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7) 36 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6) 37 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5) 38 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4) 39 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3) 40 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2) 41 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1) 42 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0) [all …]
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| /kernel/linux/linux-5.10/sound/soc/hisilicon/ |
| D | hi6210-i2s.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * linux/sound/soc/hisilicon/hi6210-i2s.h 29 #define HII2S_SW_RST_N__SW_RST_N BIT(0) 41 #define HII2S_IF_CLK_EN_CFG__THIRDMD_UPLINK_EN BIT(25) 42 #define HII2S_IF_CLK_EN_CFG__THIRDMD_DLINK_EN BIT(24) 43 #define HII2S_IF_CLK_EN_CFG__S3_IF_CLK_EN BIT(20) 44 #define HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN BIT(16) 45 #define HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN BIT(15) 46 #define HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN BIT(14) 47 #define HII2S_IF_CLK_EN_CFG__S2_IR_PGA_EN BIT(13) [all …]
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| /kernel/linux/linux-5.10/drivers/net/dsa/microchip/ |
| D | ksz8795_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 34 #define SW_NEW_BACKOFF BIT(7) 35 #define SW_GLOBAL_RESET BIT(6) 36 #define SW_FLUSH_DYN_MAC_TABLE BIT(5) 37 #define SW_FLUSH_STA_MAC_TABLE BIT(4) 38 #define SW_LINK_AUTO_AGING BIT(0) 42 #define SW_HUGE_PACKET BIT(6) 43 #define SW_TX_FLOW_CTRL_DISABLE BIT(5) 44 #define SW_RX_FLOW_CTRL_DISABLE BIT(4) 45 #define SW_CHECK_LENGTH BIT(3) [all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 8 * Copyright (C) 2013-2014 Silicon Image, Inc. 38 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7) 39 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6) 40 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5) 41 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4) 42 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3) 43 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2) 44 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1) 45 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0) 49 #define BIT_DPD_PWRON_PLL BIT(7) [all …]
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| /kernel/linux/linux-4.19/include/linux/mfd/da9062/ |
| D | registers.h | 2 * Copyright (C) 2015-2017 Dialog Semiconductor 160 * Bit fields 167 #define DA9062AA_WRITE_MODE_MASK BIT(6) 168 #define DA9062AA_REVERT_SHIFT 7 169 #define DA9062AA_REVERT_MASK BIT(7) 175 #define DA9062AA_DVC_BUSY_MASK BIT(2) 181 #define DA9062AA_GPI1_MASK BIT(1) 183 #define DA9062AA_GPI2_MASK BIT(2) 185 #define DA9062AA_GPI3_MASK BIT(3) 187 #define DA9062AA_GPI4_MASK BIT(4) [all …]
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| /kernel/linux/linux-4.19/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net> 25 5.2.1 Parity checking and packet re-synchronization 33 7. Hardware version 4 114 non-zero value will turn it ON. For hardware version 1 the default is ON. 118 calculating a parity bit for the last 3 bytes of each packet. The driver 145 4 bytes version: (after the arrow is the name given in the Dell-provided driver) 173 --------- 179 echo -n 0x16 > reg_10 183 bit 7 6 5 4 3 2 1 0 197 bit 7 6 5 4 3 2 1 0 [all …]
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| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net> 25 5.2.1 Parity checking and packet re-synchronization 33 7. Hardware version 4 114 non-zero value will turn it ON. For hardware version 1 the default is ON. 118 calculating a parity bit for the last 3 bytes of each packet. The driver 145 4 bytes version: (after the arrow is the name given in the Dell-provided driver) 173 --------- 179 echo -n 0x16 > reg_10 183 bit 7 6 5 4 3 2 1 0 197 bit 7 6 5 4 3 2 1 0 [all …]
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| /kernel/linux/linux-4.19/include/linux/mfd/da9150/ |
| D | registers.h | 2 * DA9150 MFD Driver - Registers 164 #define DA9150_WRITE_MODE_MASK BIT(6) 165 #define DA9150_REVERT_SHIFT 7 166 #define DA9150_REVERT_MASK BIT(7) 176 #define DA9150_VFAULT_STAT_MASK BIT(0) 178 #define DA9150_TFAULT_STAT_MASK BIT(1) 182 #define DA9150_VDD33_STAT_MASK BIT(0) 184 #define DA9150_VDD33_SLEEP_MASK BIT(1) 185 #define DA9150_LFOSC_STAT_SHIFT 7 186 #define DA9150_LFOSC_STAT_MASK BIT(7) [all …]
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| /kernel/linux/linux-4.19/drivers/net/wireless/ath/wil6210/ |
| D | txrx.h | 2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc. 37 return le32_to_cpu(addr->addr_low) | in wil_desc_addr() 38 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr() 44 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set() 45 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set() 48 /* Tx descriptor - MAC part 50 * bit 0.. 9 : lifetime_expiry_value:10 51 * bit 10 : interrupt_en:1 52 * bit 11 : status_en:1 53 * bit 12..13 : txss_override:2 [all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | BusLogic.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 6 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com> 12 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose 60 #define BLOGIC_MIN_AUTO_TAG_DEPTH 7 91 #define BLOGIC_CCB_GRP_ALLOCSIZE 7 160 (adapter->adapter_type == BLOGIC_MULTIMASTER) 163 (adapter->adapter_type == BLOGIC_FLASHPOINT) 189 BLOGIC_VESA_BUS, /* BT-4xx */ 190 BLOGIC_ISA_BUS, /* BT-5xx */ 191 BLOGIC_MCA_BUS, /* BT-6xx */ [all …]
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| /kernel/linux/linux-4.19/drivers/scsi/ |
| D | BusLogic.h | 5 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com> 19 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose 67 #define BLOGIC_MIN_AUTO_TAG_DEPTH 7 98 #define BLOGIC_CCB_GRP_ALLOCSIZE 7 167 (adapter->adapter_type == BLOGIC_MULTIMASTER) 170 (adapter->adapter_type == BLOGIC_FLASHPOINT) 196 BLOGIC_VESA_BUS, /* BT-4xx */ 197 BLOGIC_ISA_BUS, /* BT-5xx */ 198 BLOGIC_MCA_BUS, /* BT-6xx */ 199 BLOGIC_EISA_BUS, /* BT-7xx */ [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/ |
| D | txrx.h | 1 /* SPDX-License-Identifier: ISC */ 3 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 26 return le32_to_cpu(addr->addr_low) | in wil_desc_addr() 27 ((u64)le16_to_cpu(addr->addr_high) << 32); in wil_desc_addr() 33 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_addr_set() 34 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_addr_set() 37 /* Tx descriptor - MAC part 39 * bit 0.. 9 : lifetime_expiry_value:10 40 * bit 10 : interrupt_en:1 [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt7603/ |
| D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 10 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 24 PKT_TYPE_RX_EVENT = 7, 29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) 30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22) [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/mediatek/ |
| D | mtk_hdmi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 12 #define LR_SWAP BIT(0) 13 #define LFE_CC_SWAP BIT(1) 14 #define LSRS_SWAP BIT(2) 15 #define RLS_RRS_SWAP BIT(3) 16 #define LR_STATUS_SWAP BIT(4) 23 #define I2S_UV_V BIT(0) 24 #define I2S_UV_U BIT(1) 26 #define I2S_UV_CH_EN(x) BIT((x) + 2) 27 #define I2S_UV_TMDS_DEBUG BIT(6) [all …]
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | ni_stc.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Register descriptions for NI DAQ-STC chip 5 * COMEDI - Linux Control and Measurement Device Interface 6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org> 11 * DAQ-STC Technical Reference Manual 21 * Registers in the National Instruments DAQ-STC chip 25 #define NISTC_INTA_ACK_G0_GATE BIT(15) 26 #define NISTC_INTA_ACK_G0_TC BIT(14) 27 #define NISTC_INTA_ACK_AI_ERR BIT(13) 28 #define NISTC_INTA_ACK_AI_STOP BIT(12) [all …]
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| /kernel/linux/linux-4.19/drivers/staging/comedi/drivers/ |
| D | ni_stc.h | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Register descriptions for NI DAQ-STC chip 5 * COMEDI - Linux Control and Measurement Device Interface 6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org> 11 * DAQ-STC Technical Reference Manual 20 * Registers in the National Instruments DAQ-STC chip 24 #define NISTC_INTA_ACK_G0_GATE BIT(15) 25 #define NISTC_INTA_ACK_G0_TC BIT(14) 26 #define NISTC_INTA_ACK_AI_ERR BIT(13) 27 #define NISTC_INTA_ACK_AI_STOP BIT(12) [all …]
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| /kernel/linux/linux-4.19/sound/soc/hisilicon/ |
| D | hi6210-i2s.h | 2 * linux/sound/soc/hisilicon/hi6210-i2s.h 40 #define HII2S_SW_RST_N__SW_RST_N BIT(0) 52 #define HII2S_IF_CLK_EN_CFG__THIRDMD_UPLINK_EN BIT(25) 53 #define HII2S_IF_CLK_EN_CFG__THIRDMD_DLINK_EN BIT(24) 54 #define HII2S_IF_CLK_EN_CFG__S3_IF_CLK_EN BIT(20) 55 #define HII2S_IF_CLK_EN_CFG__S2_IF_CLK_EN BIT(16) 56 #define HII2S_IF_CLK_EN_CFG__S2_OL_MIXER_EN BIT(15) 57 #define HII2S_IF_CLK_EN_CFG__S2_OL_SRC_EN BIT(14) 58 #define HII2S_IF_CLK_EN_CFG__S2_IR_PGA_EN BIT(13) 59 #define HII2S_IF_CLK_EN_CFG__S2_IL_PGA_EN BIT(12) [all …]
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| /kernel/linux/linux-5.10/drivers/platform/x86/ |
| D | mlx-platform.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 5 * Copyright (C) 2016-2018 Mellanox Technologies 6 * Copyright (C) 2016-2018 Vadim Pasternak <vadimp@mellanox.com> 12 #include <linux/i2c-mux.h> 16 #include <linux/platform_data/i2c-mux-reg.h> 130 #define MLXPLAT_CPLD_AGGR_MASK_COMEX BIT(0) 132 #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) 140 #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4) 147 #define MLXPLAT_CPLD_AGGR_MASK_CARRIER BIT(1) 171 #define MLXPLAT_CPLD_NR_NONE -1 [all …]
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| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| D | tda1997x_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 /* Page 0x00 - General Control */ 125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */ 126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */ 127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */ 128 #define DETECT_5V_B BIT(1) /* 5V present on input B */ 129 #define DETECT_5V_A BIT(0) /* 5V present on input A */ 132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */ 133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */ 134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */ [all …]
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| /kernel/linux/linux-4.19/drivers/media/i2c/ |
| D | tda1997x_regs.h | 1 // SPDX-License-Identifier: GPL-2.0 6 /* Page 0x00 - General Control */ 125 #define DETECT_UTIL BIT(7) /* utility of HDMI level */ 126 #define DETECT_HPD BIT(6) /* HPD of HDMI level */ 127 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */ 128 #define DETECT_5V_B BIT(1) /* 5V present on input B */ 129 #define DETECT_5V_A BIT(0) /* 5V present on input A */ 132 #define INPUT_SEL_RST_FMT BIT(7) /* 1=reset format measurement */ 133 #define INPUT_SEL_RST_VDP BIT(2) /* 1=reset video data path */ 134 #define INPUT_SEL_OUT_MODE BIT(1) /* 0=loop 1=bypass */ [all …]
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