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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dcirrus,lochnagar.yaml95 gf-gpio2, gf-gpio3, gf-gpio7, codec-aif1-bclk,
97 codec-aif2-bclk, codec-aif2-rxdat, codec-aif2-lrclk,
98 codec-aif2-txdat, codec-aif3-bclk, codec-aif3-rxdat,
99 codec-aif3-lrclk, codec-aif3-txdat, dsp-aif1-bclk,
101 dsp-aif2-bclk, dsp-aif2-rxdat, dsp-aif2-lrclk,
102 dsp-aif2-txdat, psia1-bclk, psia1-rxdat, psia1-lrclk,
103 psia1-txdat, psia2-bclk, psia2-rxdat, psia2-lrclk,
104 psia2-txdat, gf-aif3-bclk, gf-aif3-rxdat,
105 gf-aif3-lrclk, gf-aif3-txdat, gf-aif4-bclk,
107 gf-aif1-bclk, gf-aif1-rxdat, gf-aif1-lrclk,
[all …]
/kernel/linux/linux-4.19/drivers/media/dvb-frontends/
Dz0194a.h19 u8 bclk = 0; in sharp_z0194a_set_symbol_rate() local
22 aclk = 0xb7; bclk = 0x47; } in sharp_z0194a_set_symbol_rate()
24 aclk = 0xb7; bclk = 0x4b; } in sharp_z0194a_set_symbol_rate()
26 aclk = 0xb7; bclk = 0x4f; } in sharp_z0194a_set_symbol_rate()
28 aclk = 0xb7; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
30 aclk = 0xb6; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
32 aclk = 0xb4; bclk = 0x51; } in sharp_z0194a_set_symbol_rate()
35 stv0299_writereg(fe, 0x14, bclk); in sharp_z0194a_set_symbol_rate()
Dbsbe1.h51 u8 bclk = 0; in alps_bsbe1_set_symbol_rate() local
53 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; } in alps_bsbe1_set_symbol_rate()
54 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; } in alps_bsbe1_set_symbol_rate()
55 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; } in alps_bsbe1_set_symbol_rate()
56 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
57 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
58 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; } in alps_bsbe1_set_symbol_rate()
61 stv0299_writereg(fe, 0x14, bclk); in alps_bsbe1_set_symbol_rate()
Dbsru6.h70 u8 bclk = 0; in alps_bsru6_set_symbol_rate() local
74 bclk = 0x47; in alps_bsru6_set_symbol_rate()
77 bclk = 0x4b; in alps_bsru6_set_symbol_rate()
80 bclk = 0x4f; in alps_bsru6_set_symbol_rate()
83 bclk = 0x53; in alps_bsru6_set_symbol_rate()
86 bclk = 0x53; in alps_bsru6_set_symbol_rate()
89 bclk = 0x51; in alps_bsru6_set_symbol_rate()
93 stv0299_writereg(fe, 0x14, bclk); in alps_bsru6_set_symbol_rate()
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dz0194a.h16 u8 bclk = 0; in sharp_z0194a_set_symbol_rate() local
19 aclk = 0xb7; bclk = 0x47; } in sharp_z0194a_set_symbol_rate()
21 aclk = 0xb7; bclk = 0x4b; } in sharp_z0194a_set_symbol_rate()
23 aclk = 0xb7; bclk = 0x4f; } in sharp_z0194a_set_symbol_rate()
25 aclk = 0xb7; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
27 aclk = 0xb6; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
29 aclk = 0xb4; bclk = 0x51; } in sharp_z0194a_set_symbol_rate()
32 stv0299_writereg(fe, 0x14, bclk); in sharp_z0194a_set_symbol_rate()
Dbsbe1.h37 u8 bclk = 0; in alps_bsbe1_set_symbol_rate() local
39 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; } in alps_bsbe1_set_symbol_rate()
40 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; } in alps_bsbe1_set_symbol_rate()
41 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; } in alps_bsbe1_set_symbol_rate()
42 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
43 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
44 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; } in alps_bsbe1_set_symbol_rate()
47 stv0299_writereg(fe, 0x14, bclk); in alps_bsbe1_set_symbol_rate()
Dbsru6.h56 u8 bclk = 0; in alps_bsru6_set_symbol_rate() local
60 bclk = 0x47; in alps_bsru6_set_symbol_rate()
63 bclk = 0x4b; in alps_bsru6_set_symbol_rate()
66 bclk = 0x4f; in alps_bsru6_set_symbol_rate()
69 bclk = 0x53; in alps_bsru6_set_symbol_rate()
72 bclk = 0x53; in alps_bsru6_set_symbol_rate()
75 bclk = 0x51; in alps_bsru6_set_symbol_rate()
79 stv0299_writereg(fe, 0x14, bclk); in alps_bsru6_set_symbol_rate()
/kernel/linux/linux-4.19/Documentation/sound/soc/
Ddai.rst15 The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
27 Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
29 controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
38 MSB is transmitted on the falling edge of the first BCLK after LRC
51 flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
Dclocking.rst25 as BCLK). This clock is used to drive the digital audio data across the link
34 - BCLK = MCLK / x, or
35 - BCLK = LRC * x, or
36 - BCLK = LRC * Channels * Word Size
39 it is best to configure BCLK to the lowest possible speed (depending on your
/kernel/linux/linux-5.10/Documentation/sound/soc/
Ddai.rst15 The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
27 Rx lines are used for audio transmission, while the bit clock (BCLK) and
29 controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
38 MSB is transmitted on the falling edge of the first BCLK after LRC
51 flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
Dclocking.rst25 as BCLK). This clock is used to drive the digital audio data across the link
34 - BCLK = MCLK / x, or
35 - BCLK = LRC * x, or
36 - BCLK = LRC * Channels * Word Size
39 it is best to configure BCLK to the lowest possible speed (depending on your
/kernel/linux/linux-5.10/drivers/media/pci/mantis/
Dmantis_vp1033.c110 u8 bclk = 0; in lgtdqcs001f_set_symbol_rate() local
114 bclk = 0x47; in lgtdqcs001f_set_symbol_rate()
117 bclk = 0x4b; in lgtdqcs001f_set_symbol_rate()
120 bclk = 0x4f; in lgtdqcs001f_set_symbol_rate()
123 bclk = 0x53; in lgtdqcs001f_set_symbol_rate()
126 bclk = 0x53; in lgtdqcs001f_set_symbol_rate()
129 bclk = 0x51; in lgtdqcs001f_set_symbol_rate()
132 stv0299_writereg(fe, 0x14, bclk); in lgtdqcs001f_set_symbol_rate()
/kernel/linux/linux-4.19/drivers/media/pci/mantis/
Dmantis_vp1033.c122 u8 bclk = 0; in lgtdqcs001f_set_symbol_rate() local
126 bclk = 0x47; in lgtdqcs001f_set_symbol_rate()
129 bclk = 0x4b; in lgtdqcs001f_set_symbol_rate()
132 bclk = 0x4f; in lgtdqcs001f_set_symbol_rate()
135 bclk = 0x53; in lgtdqcs001f_set_symbol_rate()
138 bclk = 0x53; in lgtdqcs001f_set_symbol_rate()
141 bclk = 0x51; in lgtdqcs001f_set_symbol_rate()
144 stv0299_writereg(fe, 0x14, bclk); in lgtdqcs001f_set_symbol_rate()
/kernel/linux/linux-5.10/sound/soc/samsung/
Dneo1973_wm8753.c28 unsigned int pll_out = 0, bclk = 0; in neo1973_hifi_hw_params() local
40 bclk = WM8753_BCLK_DIV_4; in neo1973_hifi_hw_params()
44 bclk = WM8753_BCLK_DIV_2; in neo1973_hifi_hw_params()
48 bclk = WM8753_BCLK_DIV_16; in neo1973_hifi_hw_params()
52 bclk = WM8753_BCLK_DIV_8; in neo1973_hifi_hw_params()
56 bclk = WM8753_BCLK_DIV_4; in neo1973_hifi_hw_params()
60 bclk = WM8753_BCLK_DIV_2; in neo1973_hifi_hw_params()
77 /* set codec BCLK division for sample rate */ in neo1973_hifi_hw_params()
78 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8753_BCLKDIV, bclk); in neo1973_hifi_hw_params()
/kernel/linux/linux-4.19/drivers/iio/adc/
Dstm32-adc-core.c61 * @bclk: bus clock common for all ADCs, depends on part used
70 struct clk *bclk; member
169 if (!priv->bclk) { in stm32h7_adc_clk_sel()
204 rate = clk_get_rate(priv->bclk); in stm32h7_adc_clk_sel()
456 priv->bclk = devm_clk_get(&pdev->dev, "bus"); in stm32_adc_probe()
457 if (IS_ERR(priv->bclk)) { in stm32_adc_probe()
458 ret = PTR_ERR(priv->bclk); in stm32_adc_probe()
460 priv->bclk = NULL; in stm32_adc_probe()
467 if (priv->bclk) { in stm32_adc_probe()
468 ret = clk_prepare_enable(priv->bclk); in stm32_adc_probe()
[all …]
/kernel/linux/linux-4.19/sound/soc/samsung/
Dneo1973_wm8753.c36 unsigned int pll_out = 0, bclk = 0; in neo1973_hifi_hw_params() local
48 bclk = WM8753_BCLK_DIV_4; in neo1973_hifi_hw_params()
52 bclk = WM8753_BCLK_DIV_2; in neo1973_hifi_hw_params()
56 bclk = WM8753_BCLK_DIV_16; in neo1973_hifi_hw_params()
60 bclk = WM8753_BCLK_DIV_8; in neo1973_hifi_hw_params()
64 bclk = WM8753_BCLK_DIV_4; in neo1973_hifi_hw_params()
68 bclk = WM8753_BCLK_DIV_2; in neo1973_hifi_hw_params()
85 /* set codec BCLK division for sample rate */ in neo1973_hifi_hw_params()
86 ret = snd_soc_dai_set_clkdiv(codec_dai, WM8753_BCLKDIV, bclk); in neo1973_hifi_hw_params()
/kernel/linux/linux-4.19/sound/soc/codecs/
Dwm8960.c133 int bclk; member
612 * - 10 * bclk = sysclk / bclk_divs
614 * If we cannot find an exact match for (sysclk, lrclk, bclk)
615 * triplet, we relax the bclk such that bclk is chosen as the
616 * closest available frequency greater than expected bclk.
622 * @bclk_idx: bclk_divs index for found bclk
626 * >=0, in case we could derive bclk and lrclk from sysclk using
633 int sysclk, bclk, lrclk; in wm8960_configure_sysclk() local
640 bclk = wm8960->bclk; in wm8960_configure_sysclk()
652 diff = sysclk - bclk * bclk_divs[k] / 10; in wm8960_configure_sysclk()
[all …]
Dwm9081.c155 int bclk; member
662 * gives us a suitable DAC configuration, plus BCLK. in configure_clock()
668 if (wm9081->master && wm9081->bclk) { in configure_clock()
669 /* Make sure we can generate CLK_SYS and BCLK in configure_clock()
675 if (target >= wm9081->bclk && in configure_clock()
1021 /* If TDM is set up then that fixes our BCLK. */ in wm9081_hw_params()
1025 wm9081->bclk = wm9081->fs * wm9081->tdm_width * slots; in wm9081_hw_params()
1027 /* Otherwise work out a BCLK from the sample size */ in wm9081_hw_params()
1028 wm9081->bclk = 2 * wm9081->fs; in wm9081_hw_params()
1032 wm9081->bclk *= 16; in wm9081_hw_params()
[all …]
/kernel/linux/linux-5.10/drivers/staging/greybus/
Daudio_apbridgea.h13 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK
14 * - WCLK changes on the falling edge of BCLK
16 * - TX data is sent on the falling edge of BCLK
17 * - RX data is received/latched on the rising edge of BCLK
/kernel/linux/linux-4.19/drivers/gpu/drm/msm/hdmi/
Dhdmi_phy_8996.c135 static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk, in pll_get_integloop_gain() argument
138 int digclk_divsel = bclk >= HDMI_DIG_FREQ_BIT_CLK_THRESHOLD ? 1 : 2; in pll_get_integloop_gain()
173 static int pll_get_post_div(struct hdmi_8996_post_divider *pd, u64 bclk) in pll_get_post_div() argument
192 vco = bclk >> half_rate_mode; in pll_get_post_div()
229 u64 bclk; in pll_calculate() local
244 bclk = ((u64)pix_clk) * 10; in pll_calculate()
246 if (bclk > HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD) in pll_calculate()
251 ret = pll_get_post_div(&pd, bclk); in pll_calculate()
269 integloop_gain = pll_get_integloop_gain(frac_start, bclk, in pll_calculate()
292 if (bclk > HDMI_DIG_FREQ_BIT_CLK_THRESHOLD) in pll_calculate()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi_phy_8996.c128 static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk, in pll_get_integloop_gain() argument
131 int digclk_divsel = bclk >= HDMI_DIG_FREQ_BIT_CLK_THRESHOLD ? 1 : 2; in pll_get_integloop_gain()
166 static int pll_get_post_div(struct hdmi_8996_post_divider *pd, u64 bclk) in pll_get_post_div() argument
185 vco = bclk >> half_rate_mode; in pll_get_post_div()
222 u64 bclk; in pll_calculate() local
237 bclk = ((u64)pix_clk) * 10; in pll_calculate()
239 if (bclk > HDMI_HIGH_FREQ_BIT_CLK_THRESHOLD) in pll_calculate()
244 ret = pll_get_post_div(&pd, bclk); in pll_calculate()
262 integloop_gain = pll_get_integloop_gain(frac_start, bclk, in pll_calculate()
285 if (bclk > HDMI_DIG_FREQ_BIT_CLK_THRESHOLD) in pll_calculate()
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm9081.c151 int bclk; member
658 * gives us a suitable DAC configuration, plus BCLK. in configure_clock()
664 if (wm9081->master && wm9081->bclk) { in configure_clock()
665 /* Make sure we can generate CLK_SYS and BCLK in configure_clock()
671 if (target >= wm9081->bclk && in configure_clock()
1017 /* If TDM is set up then that fixes our BCLK. */ in wm9081_hw_params()
1021 wm9081->bclk = wm9081->fs * wm9081->tdm_width * slots; in wm9081_hw_params()
1023 /* Otherwise work out a BCLK from the sample size */ in wm9081_hw_params()
1024 wm9081->bclk = 2 * wm9081->fs; in wm9081_hw_params()
1028 wm9081->bclk *= 16; in wm9081_hw_params()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/
Dmediatek,iommu.txt71 - "bclk": the block clock of m4u.
72 Here is the list which require this "bclk":
75 if there is no this "bclk".
94 clock-names = "bclk";
/kernel/linux/linux-4.19/drivers/staging/greybus/
Daudio_apbridgea.h37 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK
38 * - WCLK changes on the falling edge of BCLK
40 * - TX data is sent on the falling edge of BCLK
41 * - RX data is received/latched on the rising edge of BCLK
/kernel/linux/linux-4.19/sound/hda/
Dhdac_i915.c31 * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
34 * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
36 * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
37 * BCLK = CDCLK * M / N

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