| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cacheinfo.c | 55 int cpu1; in fill_cpumask_siblings() local
57 for_each_possible_cpu(cpu1) in fill_cpumask_siblings()
58 if (cpus_are_siblings(cpu, cpu1)) in fill_cpumask_siblings()
59 cpumask_set_cpu(cpu1, cpu_map); in fill_cpumask_siblings()
64 int cpu1; in fill_cpumask_cluster() local
67 for_each_possible_cpu(cpu1) in fill_cpumask_cluster()
68 if (cpu_cluster(&cpu_data[cpu1]) == cluster) in fill_cpumask_cluster()
69 cpumask_set_cpu(cpu1, cpu_map); in fill_cpumask_cluster()
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| D | bmips_vec.S | 32 * Alternate CPU1 startup vector for BMIPS4350
34 * On some systems the bootloader has already started CPU1 and configured
54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */
87 /* if the NMI bit is clear, assume this is a CPU1 reset instead */
167 * CPU1 reset vector (used for the initial boot only)
190 /* initialize CPU1's local I-cache */
251 * CPU1 warm restart vector (used for second and subsequent boots).
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| /kernel/linux/linux-4.19/arch/mips/kernel/ |
| D | cacheinfo.c | 66 int cpu1; in fill_cpumask_siblings() local
68 for_each_possible_cpu(cpu1) in fill_cpumask_siblings()
69 if (cpus_are_siblings(cpu, cpu1)) in fill_cpumask_siblings()
70 cpumask_set_cpu(cpu1, cpu_map); in fill_cpumask_siblings()
75 int cpu1; in fill_cpumask_cluster() local
78 for_each_possible_cpu(cpu1) in fill_cpumask_cluster()
79 if (cpu_cluster(&cpu_data[cpu1]) == cluster) in fill_cpumask_cluster()
80 cpumask_set_cpu(cpu1, cpu_map); in fill_cpumask_cluster()
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| D | bmips_vec.S | 32 * Alternate CPU1 startup vector for BMIPS4350
34 * On some systems the bootloader has already started CPU1 and configured
54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */
87 /* if the NMI bit is clear, assume this is a CPU1 reset instead */
167 * CPU1 reset vector (used for the initial boot only)
190 /* initialize CPU1's local I-cache */
251 * CPU1 warm restart vector (used for second and subsequent boots).
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap-smp.c | 149 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device. in omap4_secondary_init()
151 * init and for CPU1, a secure PPA API provided. CPU0 must be ON in omap4_secondary_init()
152 * while executing NS_SMP API on CPU1 and PPA version must be 1.4.0+. in omap4_secondary_init()
201 * wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to in omap4_boot_secondary()
206 * 4.3.4.2 Power States of CPU0 and CPU1 in omap4_boot_secondary()
216 * Because the ROM Code is based on the r1pX GIC, the CPU1 in omap4_boot_secondary()
219 * 1) Before doing the CPU1 wakeup, CPU0 must disable in omap4_boot_secondary()
221 * 2) CPU1 must re-enable the GIC distributor on in omap4_boot_secondary()
302 * We may need to reset CPU1 before configuring, otherwise kexec boot can end
304 * occasionally fail to bring up CPU1 on 4430 if CPU1 fails to enter deeper
[all …]
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| D | cpuidle44xx.c | 128 * CPU0 has to wait and stay ON until CPU1 is OFF state. in omap_enter_idle_coupled()
130 * of triggeing all the possible low power modes once CPU1 is in omap_enter_idle_coupled()
138 * CPU1 could have already entered & exited idle in omap_enter_idle_coupled()
142 * waiting for CPU1 off. in omap_enter_idle_coupled()
190 /* Wakeup CPU1 only if it is not offlined */ in omap_enter_idle_coupled()
239 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
247 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
256 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
274 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
282 /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
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| /kernel/linux/linux-4.19/arch/arm/mach-omap2/ |
| D | omap-smp.c | 154 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device. in omap4_secondary_init()
156 * init and for CPU1, a secure PPA API provided. CPU0 must be ON in omap4_secondary_init()
157 * while executing NS_SMP API on CPU1 and PPA version must be 1.4.0+. in omap4_secondary_init()
218 * wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to in omap4_boot_secondary()
223 * 4.3.4.2 Power States of CPU0 and CPU1 in omap4_boot_secondary()
233 * Because the ROM Code is based on the r1pX GIC, the CPU1 in omap4_boot_secondary()
236 * 1) Before doing the CPU1 wakeup, CPU0 must disable in omap4_boot_secondary()
238 * 2) CPU1 must re-enable the GIC distributor on in omap4_boot_secondary()
325 * We may need to reset CPU1 before configuring, otherwise kexec boot can end
327 * occasionally fail to bring up CPU1 on 4430 if CPU1 fails to enter deeper
[all …]
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| D | cpuidle44xx.c | 130 * CPU0 has to wait and stay ON until CPU1 is OFF state. in omap_enter_idle_coupled()
132 * of triggeing all the possible low power modes once CPU1 is in omap_enter_idle_coupled()
140 * CPU1 could have already entered & exited idle in omap_enter_idle_coupled()
144 * waiting for CPU1 off. in omap_enter_idle_coupled()
182 /* Wakeup CPU1 only if it is not offlined */ in omap_enter_idle_coupled()
230 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
238 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
247 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
265 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
273 /* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
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| /kernel/linux/linux-5.10/tools/memory-model/Documentation/ |
| D | recipes.txt | 81 void CPU1(void)
89 The basic rule guarantees that if CPU0() acquires mylock before CPU1(),
107 void CPU1(void)
116 mylock before CPU1(), then both r0 and r1 must be set to the value 0.
138 void CPU1(void)
171 void CPU1(void)
226 void CPU1(void)
261 void CPU1(void)
303 void CPU1(void)
371 void CPU1(void)
[all …]
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| /kernel/linux/linux-4.19/tools/memory-model/Documentation/ |
| D | recipes.txt | 81 void CPU1(void)
89 The basic rule guarantees that if CPU0() acquires mylock before CPU1(),
107 void CPU1(void)
116 mylock before CPU1(), then both r0 and r1 must be set to the value 0.
138 void CPU1(void)
171 void CPU1(void)
226 void CPU1(void)
261 void CPU1(void)
303 void CPU1(void)
371 void CPU1(void)
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5422-odroidhc1.dts | 60 <&cpu1 0 2>,
76 <&cpu1 3 8>,
86 cpu1_thermal: cpu1-thermal {
109 <&cpu1 0 2>,
120 <&cpu1 3 8>,
153 <&cpu1 0 2>,
164 <&cpu1 3 8>,
197 <&cpu1 0 2>,
208 <&cpu1 3 8>,
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| D | exynos5422-odroidxu3-lite.dts | 49 <&cpu1 3 7>,
60 <&cpu1 3 7>,
71 <&cpu1 3 7>,
82 <&cpu1 3 7>,
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| D | aspeed-bmc-opp-zaius.dts | 322 /* CPU1 PRM 0.7V */
323 /* CPU1 PRM 1.2V CH03 */
324 /* CPU1 PRM 0.8V */
325 /* CPU1 PRM 1.2V CH47 */
431 /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
432 /* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
433 /* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
434 /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
435 /* CPU1 VR ISL68137 0.8V PMBUS @60h */
464 * CPU1 debug
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| D | exynos5422-odroidxu3-common.dtsi | 115 <&cpu1 0 2>,
131 <&cpu1 3 8>,
141 cpu1_thermal: cpu1-thermal {
193 <&cpu1 0 2>,
204 <&cpu1 3 8>,
266 <&cpu1 0 2>,
277 <&cpu1 3 8>,
339 <&cpu1 0 2>,
350 <&cpu1 3 8>,
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| D | exynos5420-arndale-octa.dts | 103 <&cpu1 0 2>,
119 <&cpu1 3 6>,
135 <&cpu1 6 11>,
174 <&cpu1 0 2>,
186 <&cpu1 3 6>,
198 <&cpu1 6 11>,
237 <&cpu1 0 2>,
249 <&cpu1 3 6>,
261 <&cpu1 6 11>,
300 <&cpu1 0 2>,
[all …]
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| /kernel/linux/linux-4.19/tools/testing/selftests/powerpc/benchmarks/ |
| D | context_switch.c | 180 static void pipe_setup(int cpu1, int cpu2) in pipe_setup() argument
223 static void yield_setup(int cpu1, int cpu2) in yield_setup() argument
225 if (cpu1 != cpu2) { in yield_setup()
325 static void futex_setup(int cpu1, int cpu2) in futex_setup() argument
407 fprintf(stderr, "Usage: context_switch2 <options> CPU1 CPU2\n\n"); in usage()
423 int cpu1; in main() local
473 cpu1 = cpu2 = pick_online_cpu(); in main()
475 cpu1 = atoi(argv[optind++]); in main()
489 cpu1, cpu2, touch_fp ? "yes" : "no", touch_altivec ? "yes" : "no", in main()
497 actions->setup(cpu1, cpu2); in main()
[all …]
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| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/benchmarks/ |
| D | context_switch.c | 176 static void pipe_setup(int cpu1, int cpu2) in pipe_setup() argument
219 static void yield_setup(int cpu1, int cpu2) in yield_setup() argument
221 if (cpu1 != cpu2) { in yield_setup()
321 static void futex_setup(int cpu1, int cpu2) in futex_setup() argument
403 fprintf(stderr, "Usage: context_switch2 <options> CPU1 CPU2\n\n"); in usage()
419 int cpu1; in main() local
469 cpu1 = cpu2 = pick_online_cpu(); in main()
471 cpu1 = atoi(argv[optind++]); in main()
491 cpu1, cpu2, touch_fp ? "yes" : "no", touch_altivec ? "yes" : "no", in main()
499 actions->setup(cpu1, cpu2); in main()
[all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | aspeed-bmc-opp-zaius.dts | 277 /* CPU1 PRM 0.7V */
278 /* CPU1 PRM 1.2V CH03 */
279 /* CPU1 PRM 0.8V */
280 /* CPU1 PRM 1.2V CH47 */
321 /* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
322 /* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
323 /* CPU1 VR ISL68137 0.8V PMBUS @61h */
324 /* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
354 * CPU1 debug
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| D | am572x-idk-common.dtsi | 38 cpu1-led {
39 label = "status1:red:cpu1";
42 linux,default-trigger = "cpu1";
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-system.txt | 6 - cpu1-start-addr : CPU1 start address in hex.
12 cpu1-start-addr = <0xffd080c4>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-system.txt | 6 - cpu1-start-addr : CPU1 start address in hex.
12 cpu1-start-addr = <0xffd080c4>;
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| /kernel/linux/linux-5.10/Documentation/scheduler/ |
| D | sched-capacity.rst | 61 - work_per_hz(CPU1) = W/2
67 - capacity(CPU1) = C/2
69 To draw the parallel with Arm big.LITTLE, CPU0 would be a big while CPU1 would
80 CPU1 work ^
86 work W in T units of time. On the other hand, CPU1 has half the capacity of
96 - max_freq(CPU1) = 2/3 * F
101 - capacity(CPU1) = C/3
111 workload on CPU1
112 CPU1 work ^
190 - capacity(CPU1) = C/3
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12b.dtsi | 23 cpu = <&cpu1>;
56 cpu1: cpu@1 { label
121 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
130 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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| /kernel/linux/linux-4.19/arch/sparc/include/asm/ |
| D | mmu_context_64.h | 112 * set cpu1's bit in cpu_vm_mask in switch_mm()
114 * reset cpu_vm_mask to just cpu1 in switch_mm()
121 * before the TSB grow performed on cpu1. cpu1 did not cross-call in switch_mm()
123 * only had cpu1 set in it. in switch_mm()
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | mmu_context_64.h | 112 * set cpu1's bit in cpu_vm_mask in switch_mm()
114 * reset cpu_vm_mask to just cpu1 in switch_mm()
121 * before the TSB grow performed on cpu1. cpu1 did not cross-call in switch_mm()
123 * only had cpu1 set in it. in switch_mm()
|