| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/ |
| D | mvpp2_prs.c | 22 static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) in mvpp2_prs_hw_write() argument
26 if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) in mvpp2_prs_hw_write()
30 pe->tcam[MVPP2_PRS_TCAM_INV_WORD] &= ~MVPP2_PRS_TCAM_INV_MASK; in mvpp2_prs_hw_write()
33 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
35 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]); in mvpp2_prs_hw_write()
38 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
40 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam[i]); in mvpp2_prs_hw_write()
46 int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, in mvpp2_prs_init_from_hw() argument
54 memset(pe, 0, sizeof(*pe)); in mvpp2_prs_init_from_hw()
55 pe->index = tid; in mvpp2_prs_init_from_hw()
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| /kernel/linux/linux-4.19/drivers/net/ethernet/marvell/mvpp2/ |
| D | mvpp2_prs.c | 22 static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) in mvpp2_prs_hw_write() argument
26 if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) in mvpp2_prs_hw_write()
30 pe->tcam[MVPP2_PRS_TCAM_INV_WORD] &= ~MVPP2_PRS_TCAM_INV_MASK; in mvpp2_prs_hw_write()
33 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
35 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam[i]); in mvpp2_prs_hw_write()
38 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
40 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]); in mvpp2_prs_hw_write()
46 int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, in mvpp2_prs_init_from_hw() argument
54 memset(pe, 0, sizeof(*pe)); in mvpp2_prs_init_from_hw()
55 pe->index = tid; in mvpp2_prs_init_from_hw()
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| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | eeh_pe.c | 2 * The file intends to implement PE based on the information from
6 * PE is only meaningful in one PHB domain.
39 * eeh_set_pe_aux_size - Set PE auxillary data size
40 * @size: PE auxillary data size
42 * Set PE auxillary data size
53 * eeh_pe_alloc - Allocate PE
55 * @type: PE type
57 * Allocate PE instance dynamically.
61 struct eeh_pe *pe; in eeh_pe_alloc() local
70 /* Allocate PHB PE */ in eeh_pe_alloc()
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| D | eeh_driver.c | 95 printk(KERN_INFO "EEH: PE#%x (PCI %s): %pV\n", edev->pe_config_addr, in eeh_edev_info()
117 !eeh_pe_passed(edev->pe)); in eeh_edev_actionable()
231 if (edev->pe && (edev->pe->state & EEH_PE_CFG_RESTRICTED)) in eeh_dev_save_state()
244 struct eeh_pe *pe; in eeh_set_channel_state() local
247 eeh_for_each_pe(root, pe) in eeh_set_channel_state()
248 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_set_channel_state()
255 struct eeh_pe *pe; in eeh_set_irq_state() local
258 eeh_for_each_pe(root, pe) { in eeh_set_irq_state()
259 eeh_pe_for_each_dev(pe, edev, tmp) { in eeh_set_irq_state()
311 !eeh_dev_removed(edev), !eeh_pe_passed(edev->pe)); in eeh_pe_report_edev()
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| D | eeh.c | 102 * PE would be created there.
108 * EEH allowed maximal frozen times. If one particular PE's
109 * frozen count in last hour exceeds this limit, the PE will
143 u64 slot_resets; /* PE reset */
271 static void *eeh_dump_pe_log(struct eeh_pe *pe, void *flag) in eeh_dump_pe_log() argument
276 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_dump_pe_log()
285 * @pe: EEH PE
293 void eeh_slot_error_detail(struct eeh_pe *pe, int severity) in eeh_slot_error_detail() argument
306 * When the @severity is EEH_LOG_PERM, the PE is going to be in eeh_slot_error_detail()
308 * the PE will be closed. The drivers rely on working IO path in eeh_slot_error_detail()
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| D | eeh_event.c | 55 struct eeh_pe *pe; in eeh_event_handler() local
73 /* We might have event without binding PE */ in eeh_event_handler()
74 pe = event->pe; in eeh_event_handler()
75 if (pe) { in eeh_event_handler()
76 if (pe->type & EEH_PE_PHB) in eeh_event_handler()
78 pe->phb->global_number); in eeh_event_handler()
81 "PHB#%x-PE#%x\n", in eeh_event_handler()
82 pe->phb->global_number, pe->addr); in eeh_event_handler()
83 eeh_handle_normal_event(pe); in eeh_event_handler()
121 * @pe: EEH PE
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | eeh_pe.c | 3 * The file intends to implement PE based on the information from
7 * PE is only meaningful in one PHB domain.
26 * eeh_set_pe_aux_size - Set PE auxillary data size
27 * @size: PE auxillary data size
29 * Set PE auxillary data size
40 * eeh_pe_alloc - Allocate PE
42 * @type: PE type
44 * Allocate PE instance dynamically.
48 struct eeh_pe *pe; in eeh_pe_alloc() local
57 /* Allocate PHB PE */ in eeh_pe_alloc()
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| D | eeh_driver.c | 90 if (eeh_pe_passed(edev->pe)) in eeh_edev_actionable()
207 if (edev->pe && (edev->pe->state & EEH_PE_CFG_RESTRICTED)) in eeh_dev_save_state()
219 struct eeh_pe *pe; in eeh_set_channel_state() local
222 eeh_for_each_pe(root, pe) in eeh_set_channel_state()
223 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_set_channel_state()
230 struct eeh_pe *pe; in eeh_set_irq_state() local
233 eeh_for_each_pe(root, pe) { in eeh_set_irq_state()
234 eeh_pe_for_each_dev(pe, edev, tmp) { in eeh_set_irq_state()
293 !eeh_dev_removed(edev), !eeh_pe_passed(edev->pe)); in eeh_pe_report_edev()
304 struct eeh_pe *pe; in eeh_pe_report() local
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| D | eeh.c | 89 * PE would be created there.
95 * EEH allowed maximal frozen times. If one particular PE's
96 * frozen count in last hour exceeds this limit, the PE will
137 u64 slot_resets; /* PE reset */
176 edev->pe->phb->global_number, edev->bdfn >> 8, in eeh_dump_dev_log()
179 edev->pe->phb->global_number, edev->bdfn >> 8, in eeh_dump_dev_log()
269 static void *eeh_dump_pe_log(struct eeh_pe *pe, void *flag) in eeh_dump_pe_log() argument
274 eeh_pe_for_each_dev(pe, edev, tmp) in eeh_dump_pe_log()
283 * @pe: EEH PE
291 void eeh_slot_error_detail(struct eeh_pe *pe, int severity) in eeh_slot_error_detail() argument
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| D | eeh_event.c | 60 /* We might have event without binding PE */ in eeh_event_handler()
61 if (event->pe) in eeh_event_handler()
62 eeh_handle_normal_event(event->pe); in eeh_event_handler()
96 * @pe: EEH PE
102 int __eeh_send_failure_event(struct eeh_pe *pe) in __eeh_send_failure_event() argument
112 event->pe = pe; in __eeh_send_failure_event()
115 * Mark the PE as recovering before inserting it in the queue. in __eeh_send_failure_event()
116 * This prevents the PE from being free()ed by a hotplug driver in __eeh_send_failure_event()
117 * while the PE is sitting in the event queue. in __eeh_send_failure_event()
119 if (pe) { in __eeh_send_failure_event()
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| /kernel/linux/linux-5.10/net/netfilter/ipvs/ |
| D | ip_vs_pe.c | 14 /* IPVS pe list */
20 /* Get pe in the pe list by name */
23 struct ip_vs_pe *pe; in __ip_vs_pe_getbyname() local
29 list_for_each_entry_rcu(pe, &ip_vs_pe, n_list) { in __ip_vs_pe_getbyname()
31 if (pe->module && in __ip_vs_pe_getbyname()
32 !try_module_get(pe->module)) { in __ip_vs_pe_getbyname()
33 /* This pe is just deleted */ in __ip_vs_pe_getbyname()
36 if (strcmp(pe_name, pe->name)==0) { in __ip_vs_pe_getbyname()
39 return pe; in __ip_vs_pe_getbyname()
41 module_put(pe->module); in __ip_vs_pe_getbyname()
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| /kernel/linux/linux-4.19/net/netfilter/ipvs/ |
| D | ip_vs_pe.c | 13 /* IPVS pe list */
19 /* Get pe in the pe list by name */
22 struct ip_vs_pe *pe; in __ip_vs_pe_getbyname() local
28 list_for_each_entry_rcu(pe, &ip_vs_pe, n_list) { in __ip_vs_pe_getbyname()
30 if (pe->module && in __ip_vs_pe_getbyname()
31 !try_module_get(pe->module)) { in __ip_vs_pe_getbyname()
32 /* This pe is just deleted */ in __ip_vs_pe_getbyname()
35 if (strcmp(pe_name, pe->name)==0) { in __ip_vs_pe_getbyname()
38 return pe; in __ip_vs_pe_getbyname()
40 module_put(pe->module); in __ip_vs_pe_getbyname()
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/powernv/ |
| D | pci-ioda.c | 53 static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
56 void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, in pe_level_printk() argument
68 if (pe->flags & PNV_IODA_PE_DEV) in pe_level_printk()
69 strlcpy(pfix, dev_name(&pe->pdev->dev), sizeof(pfix)); in pe_level_printk()
70 else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) in pe_level_printk()
72 pci_domain_nr(pe->pbus), pe->pbus->number); in pe_level_printk()
74 else if (pe->flags & PNV_IODA_PE_VF) in pe_level_printk()
76 pci_domain_nr(pe->parent_dev->bus), in pe_level_printk()
77 (pe->rid & 0xff00) >> 8, in pe_level_printk()
78 PCI_SLOT(pe->rid), PCI_FUNC(pe->rid)); in pe_level_printk()
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| D | eeh-powernv.c | 69 struct eeh_pe *pe; in pnv_eeh_ei_write() local
89 /* Retrieve PE */ in pnv_eeh_ei_write()
90 pe = eeh_pe_get(hose, pe_no); in pnv_eeh_ei_write()
91 if (!pe) in pnv_eeh_ei_write()
95 ret = eeh_ops->err_inject(pe, type, func, addr, mask); in pnv_eeh_ei_write()
155 * to clear frozen PE during PCI config access. in pnv_eeh_enable_phbs()
300 /* for VFs we use the PF's PE as the upstream PE */ in pnv_eeh_get_upstream_pe()
305 /* otherwise use the PE of our parent bridge */ in pnv_eeh_get_upstream_pe()
338 if (!edev || edev->pe) in pnv_eeh_probe()
378 /* Create PE */ in pnv_eeh_probe()
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| D | npu-dma.c | 33 * the PCI device, but callers don't need that actually as the PE in get_pci_dev()
95 * Returns the PE assoicated with the PCI device of the given
104 struct pnv_ioda_pe *pe; in get_gpu_pci_dev_and_pe() local
117 pe = &phb->ioda.pe_array[pdn->pe_number]; in get_gpu_pci_dev_and_pe()
122 return pe; in get_gpu_pci_dev_and_pe()
265 struct pnv_ioda_pe *pe[NV_NPU_MAX_PE_NUM]; member
283 if (!npucomp->pe_num || !npucomp->pe[0] || in pnv_npu_peers_create_table_userspace()
284 !npucomp->pe[0]->table_group.ops || in pnv_npu_peers_create_table_userspace()
285 !npucomp->pe[0]->table_group.ops->create_table) in pnv_npu_peers_create_table_userspace()
288 return npucomp->pe[0]->table_group.ops->create_table( in pnv_npu_peers_create_table_userspace()
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| /kernel/linux/linux-4.19/arch/powerpc/platforms/powernv/ |
| D | pci-ioda.c | 58 void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, in pe_level_printk() argument
70 if (pe->flags & PNV_IODA_PE_DEV) in pe_level_printk()
71 strlcpy(pfix, dev_name(&pe->pdev->dev), sizeof(pfix)); in pe_level_printk()
72 else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) in pe_level_printk()
74 pci_domain_nr(pe->pbus), pe->pbus->number); in pe_level_printk()
76 else if (pe->flags & PNV_IODA_PE_VF) in pe_level_printk()
78 pci_domain_nr(pe->parent_dev->bus), in pe_level_printk()
79 (pe->rid & 0xff00) >> 8, in pe_level_printk()
80 PCI_SLOT(pe->rid), PCI_FUNC(pe->rid)); in pe_level_printk()
83 printk("%spci %s: [PE# %.2x] %pV", in pe_level_printk()
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| D | eeh-powernv.c | 78 * P7IOC blocks PCI config access to frozen PE, but PHB3 in pnv_eeh_init()
92 * PE#0 should be regarded as valid by EEH core in pnv_eeh_init()
94 * have the reserved PE#255 and PE#127 for PHB3 in pnv_eeh_init()
96 * PE#0 as valid for PHB3 and P7IOC. in pnv_eeh_init()
132 struct eeh_pe *pe; in pnv_eeh_ei_write() local
152 /* Retrieve PE */ in pnv_eeh_ei_write()
153 pe = eeh_pe_get(hose, pe_no, 0); in pnv_eeh_ei_write()
154 if (!pe) in pnv_eeh_ei_write()
158 ret = eeh_ops->err_inject(pe, type, func, addr, mask); in pnv_eeh_ei_write()
260 * to clear frozen PE during PCI config access. in pnv_eeh_post_init()
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| /kernel/linux/linux-4.19/arch/powerpc/platforms/pseries/ |
| D | eeh_pseries.c | 88 eeh_rmv_from_parent_pe(edev); /* Remove as it is adding to bus pe */ in pseries_pcibios_bus_add_device()
89 eeh_add_to_parent_pe(edev); /* Add as VF PE type */ in pseries_pcibios_bus_add_device()
119 ibm_configure_pe = rtas_token("ibm,configure-pe"); in pseries_eeh_init()
122 * ibm,configure-pe and ibm,configure-bridge have the same semantics, in pseries_eeh_init()
123 * however ibm,configure-pe can be faster. If we can't find in pseries_eeh_init()
124 * ibm,configure-pe then fall back to using ibm,configure-bridge. in pseries_eeh_init()
249 struct eeh_pe pe; in pseries_eeh_probe() local
256 if (!edev || edev->pe) in pseries_eeh_probe()
290 /* Initialize the fake PE */ in pseries_eeh_probe()
291 memset(&pe, 0, sizeof(struct eeh_pe)); in pseries_eeh_probe()
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| /kernel/linux/linux-4.19/arch/powerpc/include/asm/ |
| D | eeh.h | 43 #define EEH_VALID_PE_ZERO 0x10 /* PE#0 is valid */
49 * Delay for PE reset, all in ms
59 * The struct is used to trace PE related EEH functionality.
61 * be created against particular PE. In nature, PEs correlate
64 * PE has EEH errors.
66 * Also, one particular PE might be composed of PCI device, PCI
68 * the information. Further more, one particular PE is only meaingful
73 #define EEH_PE_PHB (1 << 1) /* PHB PE */
74 #define EEH_PE_DEVICE (1 << 2) /* Device PE */
75 #define EEH_PE_BUS (1 << 3) /* Bus PE */
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | eeh.h | 34 * Delay for PE reset, all in ms
44 * The struct is used to trace PE related EEH functionality.
46 * be created against particular PE. In nature, PEs correlate
49 * PE has EEH errors.
51 * Also, one particular PE might be composed of PCI device, PCI
53 * the information. Further more, one particular PE is only meaingful
58 #define EEH_PE_PHB (1 << 1) /* PHB PE */
59 #define EEH_PE_DEVICE (1 << 2) /* Device PE */
60 #define EEH_PE_BUS (1 << 3) /* Bus PE */
61 #define EEH_PE_VF (1 << 4) /* VF PE */
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/pseries/ |
| D | eeh_pseries.c | 72 * parent PE in in pseries_eeh_init_edev(). in pseries_pcibios_bus_add_device()
74 struct eeh_pe *physfn_pe = pci_dev_to_eeh_dev(pdev->physfn)->pe; in pseries_pcibios_bus_add_device()
78 eeh_pe_tree_remove(edev); /* Remove as it is adding to bus pe */ in pseries_pcibios_bus_add_device()
79 eeh_pe_tree_insert(edev, physfn_pe); /* Add as VF PE type */ in pseries_pcibios_bus_add_device()
91 * pe_config_addr) as a handle to a given PE. This function finds the
108 * part of a PE or not. ret[0] being zero indicates it's not. in pseries_eeh_get_pe_config_addr()
116 /* Retrieve the associated PE config address with function 0 */ in pseries_eeh_get_pe_config_addr()
121 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", in pseries_eeh_get_pe_config_addr()
134 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n", in pseries_eeh_get_pe_config_addr()
158 * Reset the specified PHB/PE
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| /kernel/linux/linux-4.19/arch/alpha/include/asm/ |
| D | core_marvel.h | 57 #define EV7_IPE(pe) ((~((long)(pe)) & EV7_PE_MASK) << 35) argument
59 #define EV7_CSR_PHYS(pe, off) (EV7_IPE(pe) | (0x7FFCUL << 20) | (off)) argument
60 #define EV7_CSRS_PHYS(pe) (EV7_CSR_PHYS(pe, 0UL)) argument
62 #define EV7_CSR_KERN(pe, off) (EV7_KERN_ADDR(EV7_CSR_PHYS(pe, off))) argument
63 #define EV7_CSRS_KERN(pe) (EV7_KERN_ADDR(EV7_CSRS_PHYS(pe))) argument
249 #define IO7_IPE(pe) (EV7_IPE(pe)) argument
252 #define IO7_HOSE(pe, port) (IO7_IPE(pe) | IO7_IPORT(port)) argument
254 #define IO7_MEM_PHYS(pe, port) (IO7_HOSE(pe, port) | 0x00000000UL) argument
255 #define IO7_CONF_PHYS(pe, port) (IO7_HOSE(pe, port) | 0xFE000000UL) argument
256 #define IO7_IO_PHYS(pe, port) (IO7_HOSE(pe, port) | 0xFF000000UL) argument
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| /kernel/linux/linux-5.10/arch/alpha/include/asm/ |
| D | core_marvel.h | 57 #define EV7_IPE(pe) ((~((long)(pe)) & EV7_PE_MASK) << 35) argument
59 #define EV7_CSR_PHYS(pe, off) (EV7_IPE(pe) | (0x7FFCUL << 20) | (off)) argument
60 #define EV7_CSRS_PHYS(pe) (EV7_CSR_PHYS(pe, 0UL)) argument
62 #define EV7_CSR_KERN(pe, off) (EV7_KERN_ADDR(EV7_CSR_PHYS(pe, off))) argument
63 #define EV7_CSRS_KERN(pe) (EV7_KERN_ADDR(EV7_CSRS_PHYS(pe))) argument
249 #define IO7_IPE(pe) (EV7_IPE(pe)) argument
252 #define IO7_HOSE(pe, port) (IO7_IPE(pe) | IO7_IPORT(port)) argument
254 #define IO7_MEM_PHYS(pe, port) (IO7_HOSE(pe, port) | 0x00000000UL) argument
255 #define IO7_CONF_PHYS(pe, port) (IO7_HOSE(pe, port) | 0xFE000000UL) argument
256 #define IO7_IO_PHYS(pe, port) (IO7_HOSE(pe, port) | 0xFF000000UL) argument
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| /kernel/linux/linux-5.10/drivers/misc/cxl/ |
| D | trace.h | 20 { CXL_PSL9_DSISR_An_PE, "PE" }, \
30 { CXL_PSL_DSISR_An_PE, "PE" }, \
71 __field(u16, pe)
77 __entry->pe = ctx->pe;
80 TP_printk("afu%i.%i pe=%i",
83 __entry->pe
96 __field(u16, pe)
106 __entry->pe = ctx->pe;
113 TP_printk("afu%i.%i pid=%i pe=%i wed=0x%016llx irqs=%i amr=0x%llx",
117 __entry->pe,
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_pmu.c | 64 struct amdgpu_pmu_entry *pe = container_of(event->pmu, in amdgpu_perf_start() local
74 switch (pe->pmu_perf_type) { in amdgpu_perf_start()
77 pe->adev->df.funcs->pmc_start(pe->adev, hwc->config, 1); in amdgpu_perf_start()
79 pe->adev->df.funcs->pmc_start(pe->adev, hwc->config, 0); in amdgpu_perf_start()
93 struct amdgpu_pmu_entry *pe = container_of(event->pmu, in amdgpu_perf_read() local
102 switch (pe->pmu_perf_type) { in amdgpu_perf_read()
104 pe->adev->df.funcs->pmc_get_count(pe->adev, hwc->config, in amdgpu_perf_read()
120 struct amdgpu_pmu_entry *pe = container_of(event->pmu, in amdgpu_perf_stop() local
127 switch (pe->pmu_perf_type) { in amdgpu_perf_stop()
129 pe->adev->df.funcs->pmc_stop(pe->adev, hwc->config, 0); in amdgpu_perf_stop()
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