Searched full:ppis (Results 1 – 25 of 41) sorted by relevance
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| /kernel/linux/linux-4.19/drivers/perf/ |
| D | arm_pmu_acpi.c | 51 * a fixed value in HW (for both SPIs and PPIs) that we cannot change in arm_pmu_acpi_register_irq()
110 * corresponding GSI once (e.g. when we have PPIs). in arm_pmu_acpi_parse_irqs()
149 * the PMU (e.g. we don't have mismatched PPIs).
169 pr_warn("mismatched PPIs detected\n"); in pmu_irq_matches()
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| D | arm_pmu_platform.c | 138 pr_warn("multiple PPIs or mismatched SPI/PPI detected\n"); in pmu_parse_irqs()
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| /kernel/linux/linux-5.10/drivers/perf/ |
| D | arm_pmu_acpi.c | 48 * a fixed value in HW (for both SPIs and PPIs) that we cannot change in arm_pmu_acpi_register_irq()
177 * corresponding GSI once (e.g. when we have PPIs). in arm_pmu_acpi_parse_irqs()
216 * the PMU (e.g. we don't have mismatched PPIs).
236 pr_warn("mismatched PPIs detected\n"); in pmu_irq_matches()
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| D | arm_pmu_platform.c | 137 pr_warn("multiple PPIs or mismatched SPI/PPI detected\n"); in pmu_parse_irqs()
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.txt | 7 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
9 have PPIs or SGIs.
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| D | ti,omap4-wugen-mpu | 20 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
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| D | nvidia,tegra20-ictlr.txt | 27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
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| D | arm,gic-v3.txt | 32 interrupt types other than PPI or PPIs that are not partitionned,
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,omap4-wugen-mpu | 20 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
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| D | arm,gic.yaml | 17 Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
19 have PPIs or SGIs.
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| D | nvidia,tegra20-ictlr.txt | 27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
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| D | arm,gic-v3.yaml | 63 interrupt types other than PPI or PPIs that are not partitionned,
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
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| /kernel/linux/linux-4.19/drivers/acpi/arm64/ |
| D | gtdt.c | 89 * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
93 * So we only handle the non-secure timer PPIs,
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| /kernel/linux/linux-5.10/drivers/acpi/arm64/ |
| D | gtdt.c | 86 * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
90 * So we only handle the non-secure timer PPIs,
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.txt | 8 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
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| /kernel/linux/linux-5.10/arch/arm64/kvm/vgic/ |
| D | vgic-init.c | 200 * configure all PPIs as level-triggered. in kvm_vgic_vcpu_init()
216 /* PPIs */ in kvm_vgic_vcpu_init()
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| D | vgic.c | 93 /* SGIs and PPIs */ in vgic_get_irq()
424 * @cpuid: The CPU for PPIs
580 * @vcpu: Pointer to the VCPU (used for PPIs)
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| /kernel/linux/linux-4.19/virt/kvm/arm/vgic/ |
| D | vgic-init.c | 221 * configure all PPIs as level-triggered. in kvm_vgic_vcpu_init()
237 /* PPIs */ in kvm_vgic_vcpu_init()
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| D | vgic.c | 104 /* SGIs and PPIs */ in vgic_get_irq()
404 * @cpuid: The CPU for PPIs
560 * @vcpu: Pointer to the VCPU (used for PPIs)
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-xgene-sb.c | 195 /* Skip SGIs and PPIs*/ in xgene_gpio_sb_domain_alloc()
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| /kernel/linux/linux-5.10/include/kvm/ |
| D | arm_vgic.h | 97 struct kvm_vcpu *vcpu; /* SGIs and PPIs: The VCPU
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| /kernel/linux/linux-4.19/Documentation/virtual/kvm/devices/ |
| D | arm-vgic-v3.txt | 242 PPIs are reported per VCPU as specified in the mpidr field, and SPIs are
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| /kernel/linux/linux-4.19/include/kvm/ |
| D | arm_vgic.h | 107 struct kvm_vcpu *vcpu; /* SGIs and PPIs: The VCPU
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| /kernel/linux/linux-4.19/drivers/gpio/ |
| D | gpio-xgene-sb.c | 206 /* Skip SGIs and PPIs*/ in xgene_gpio_sb_domain_alloc()
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