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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/
Dat91-clock.txt8 - compatible : shall be one of the following:
98 - #size-cells : shall be 0 (reg is used to encode clk id).
99 - #address-cells : shall be 1 (reg is used to encode clk id).
114 - #clock-cells : from common clock binding; shall be set to 0.
128 - #clock-cells : from common clock binding; shall be set to 0.
129 - clocks : shall encode the main osc source clk sources (see atmel datasheet).
143 - #clock-cells : from common clock binding; shall be set to 0.
144 - clocks : shall encode the slow clk sources (see atmel datasheet).
155 - #size-cells : shall be 0 (reg is used to encode clk id).
156 - #address-cells : shall be 1 (reg is used to encode clk id).
[all …]
Dxgene.txt8 - compatible : shall be one of the following:
17 - reg : shall be the physical PLL register address for the pll clock.
18 - clocks : shall be the input parent clock phandle for the clock. This should
20 - #clock-cells : shall be set to 1.
21 - clock-output-names : shall be the name of the PLL referenced by derive
24 - clock-names : shall be the name of the PLL. If missing, use the device name.
27 - reg : shall be the physical register address for the pmd clock.
28 - clocks : shall be the input parent clock phandle for the clock.
29 - #clock-cells : shall be set to 1.
30 - clock-output-names : shall be the name of the clock referenced by derive
[all …]
Dvt8500.txt8 - compatible : shall be one of the following:
16 - reg : shall be the control register offset from PMC base for the pll clock.
17 - clocks : shall be the input parent clock phandle for the clock. This should
19 - #clock-cells : from common clock binding; shall be set to 0.
22 - clocks : shall be the input parent clock phandle for the clock. This should
24 - #clock-cells : from common clock binding; shall be set to 0.
36 - enable-reg : shall be the register offset from PMC base for the enable
38 - enable-bit : shall be the bit within enable-reg to enable/disable the clock.
44 - divisor-reg : shall be the register offset from PMC base for the divisor
47 - divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
Dsilabs,si5351.txt15 - compatible: shall be one of the following:
20 - reg: i2c device address, shall be 0x60 or 0x61.
21 - #clock-cells: from common clock binding; shall be set to 1.
23 handles, shall be xtal reference clock or xtal and clkin for
26 - #address-cells: shall be set to 1.
27 - #size-cells: shall be set to 0.
43 - silabs,clock-source: source clock of the output divider stage N, shall be
48 - silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}.
53 - silabs,disable-state : clock output disable state, shall be
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/davinci/
Dda8xx-cfgchip.txt13 - compatible: shall be "ti,da830-usb-phy-clocks".
14 - #clock-cells: from common clock binding; shall be set to 1.
16 - clock-names: shall be "fck", "usb_refclkin", "auxclk"
24 - compatible: shall be "ti,da830-tbclksync".
25 - #clock-cells: from common clock binding; shall be set to 0.
27 - clock-names: shall be "fck"
32 - compatible: shall be "ti,da830-div4p5ena".
33 - #clock-cells: from common clock binding; shall be set to 0.
35 - clock-names: shall be "pll0_pllout"
40 - compatible: shall be "ti,da850-async1-clksrc".
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ti/davinci/
Dda8xx-cfgchip.txt13 - compatible: shall be "ti,da830-usb-phy-clocks".
14 - #clock-cells: from common clock binding; shall be set to 1.
16 - clock-names: shall be "fck", "usb_refclkin", "auxclk"
24 - compatible: shall be "ti,da830-tbclksync".
25 - #clock-cells: from common clock binding; shall be set to 0.
27 - clock-names: shall be "fck"
32 - compatible: shall be "ti,da830-div4p5ena".
33 - #clock-cells: from common clock binding; shall be set to 0.
35 - clock-names: shall be "pll0_pllout"
40 - compatible: shall be "ti,da850-async1-clksrc".
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dxgene.txt8 - compatible : shall be one of the following:
17 - reg : shall be the physical PLL register address for the pll clock.
18 - clocks : shall be the input parent clock phandle for the clock. This should
20 - #clock-cells : shall be set to 1.
21 - clock-output-names : shall be the name of the PLL referenced by derive
24 - clock-names : shall be the name of the PLL. If missing, use the device name.
27 - reg : shall be the physical register address for the pmd clock.
28 - clocks : shall be the input parent clock phandle for the clock.
29 - #clock-cells : shall be set to 1.
30 - clock-output-names : shall be the name of the clock referenced by derive
[all …]
Dvt8500.txt8 - compatible : shall be one of the following:
16 - reg : shall be the control register offset from PMC base for the pll clock.
17 - clocks : shall be the input parent clock phandle for the clock. This should
19 - #clock-cells : from common clock binding; shall be set to 0.
22 - clocks : shall be the input parent clock phandle for the clock. This should
24 - #clock-cells : from common clock binding; shall be set to 0.
36 - enable-reg : shall be the register offset from PMC base for the enable
38 - enable-bit : shall be the bit within enable-reg to enable/disable the clock.
44 - divisor-reg : shall be the register offset from PMC base for the divisor
47 - divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
Dsilabs,si5351.txt15 - compatible: shall be one of the following:
20 - reg: i2c device address, shall be 0x60 or 0x61.
21 - #clock-cells: from common clock binding; shall be set to 1.
23 handles, shall be xtal reference clock or xtal and clkin for
26 - #address-cells: shall be set to 1.
27 - #size-cells: shall be set to 0.
43 - silabs,clock-source: source clock of the output divider stage N, shall be
48 - silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}.
53 - silabs,disable-state : clock output disable state, shall be
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/
Dopen-pic.txt14 shall be <string> and the value shall include "open-pic".
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
20 as an Open PIC. No property value shall be defined.
23 interrupt source. The type shall be a <u32> and the value shall be 2.
26 address. The type shall be <u32> and the value shall be 0. As such,
32 shall not be reset during runtime initialization. No property value shall
34 initialization related to interrupt sources shall be limited to sources
74 // The PIC shall not be reset.
Dimg,pdc-intc.txt11 The type shall be <string> and the value shall include "img,pdc-intc".
14 addressable register space. The type shall be <prop-encoded-array>.
17 as an interrupt controller. No property value shall be defined.
20 interrupt source. The type shall be a <u32> and the value shall be 2.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
Dimg,meta-intc.txt9 The type shall be <string> and the value shall include "img,meta-intc".
15 as an interrupt controller. No property value shall be defined.
18 interrupt source. The type shall be a <u32> and the value shall be 2.
21 address. The type shall be <u32> and the value shall be 0. As such,
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dopen-pic.txt14 shall be <string> and the value shall include "open-pic".
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
20 as an Open PIC. No property value shall be defined.
23 interrupt source. The type shall be a <u32> and the value shall be 2.
26 address. The type shall be <u32> and the value shall be 0. As such,
32 shall not be reset during runtime initialization. No property value shall
34 initialization related to interrupt sources shall be limited to sources
74 // The PIC shall not be reset.
Dimg,pdc-intc.txt11 The type shall be <string> and the value shall include "img,pdc-intc".
14 addressable register space. The type shall be <prop-encoded-array>.
17 as an interrupt controller. No property value shall be defined.
20 interrupt source. The type shall be a <u32> and the value shall be 2.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/
Dsunxi-nand.txt5 - reg : shall contain registers location and length for data and reg.
6 - interrupts : shall define the nand controller interrupt.
7 - #address-cells: shall be set to 1. Encode the nand CS.
8 - #size-cells : shall be set to 0.
9 - clocks : shall reference nand controller clocks.
10 - clock-names : nand controller internal clock names. Shall contain :
15 - dmas : shall reference DMA channel associated to the NAND controller.
16 - dma-names : shall be "rxtx".
24 - allwinner,rb : shall contain the native Ready/Busy ids.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dusb-device.txt12 A combined node shall be used instead of a device node and an interface node
22 The textual representation of VID and PID shall be in lower case hexadecimal
31 - #address-cells: shall be 2
32 - #size-cells: shall be 0
38 number. The textual representation of VID, PID, CN and IN shall be in lower
51 The textual representation of VID and PID shall be in lower case hexadecimal
60 - #address-cells: shall be 1
61 - #size-cells: shall be 0
65 - #address-cells: shall be 1
66 - #size-cells: shall be 0
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/
Dusb-device.txt12 A combined node shall be used instead of a device node and an interface node
22 The textual representation of VID and PID shall be in lower case hexadecimal
31 - #address-cells: shall be 2
32 - #size-cells: shall be 0
38 number. The textual representation of VID, PID, CN and IN shall be in lower
51 The textual representation of VID and PID shall be in lower case hexadecimal
60 - #address-cells: shall be 1
61 - #size-cells: shall be 0
65 - #address-cells: shall be 1
66 - #size-cells: shall be 0
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/perf/
Dapm-xgene-pmu.txt14 - compatible : Shall be "apm,xgene-pmu" for revision 1 or
19 - reg : First resource shall be the CPU bus PMU resource.
23 - compatible : Shall be "apm,xgene-pmu-l3c".
24 - reg : First resource shall be the L3C PMU resource.
27 - compatible : Shall be "apm,xgene-pmu-iob".
28 - reg : First resource shall be the IOB PMU resource.
31 - compatible : Shall be "apm,xgene-pmu-mcb".
32 - reg : First resource shall be the MCB PMU resource.
36 - compatible : Shall be "apm,xgene-pmu-mc".
37 - reg : First resource shall be the MC PMU resource.
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt14 - compatible : Shall be "apm,xgene-edac".
23 - reg : First resource shall be the CPU bus (PCP) resource.
28 - compatible : Shall be "apm,xgene-edac-mc".
29 - reg : First resource shall be the memory controller unit
34 - compatible : Shall be "apm,xgene-edac-pmd" or
36 - reg : First resource shall be the PMD resource.
40 - compatible : Shall be "apm,xgene-edac-l3" or
42 - reg : First resource shall be the L3 EDAC resource.
45 - compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or
48 - reg : First resource shall be the SoC EDAC resource.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt14 - compatible : Shall be "apm,xgene-edac".
23 - reg : First resource shall be the CPU bus (PCP) resource.
28 - compatible : Shall be "apm,xgene-edac-mc".
29 - reg : First resource shall be the memory controller unit
34 - compatible : Shall be "apm,xgene-edac-pmd" or
36 - reg : First resource shall be the PMD resource.
40 - compatible : Shall be "apm,xgene-edac-l3" or
42 - reg : First resource shall be the L3 EDAC resource.
45 - compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or
48 - reg : First resource shall be the SoC EDAC resource.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/perf/
Dapm-xgene-pmu.txt14 - compatible : Shall be "apm,xgene-pmu" for revision 1 or
19 - reg : First resource shall be the CPU bus PMU resource.
23 - compatible : Shall be "apm,xgene-pmu-l3c".
24 - reg : First resource shall be the L3C PMU resource.
27 - compatible : Shall be "apm,xgene-pmu-iob".
28 - reg : First resource shall be the IOB PMU resource.
31 - compatible : Shall be "apm,xgene-pmu-mcb".
32 - reg : First resource shall be the MCB PMU resource.
36 - compatible : Shall be "apm,xgene-pmu-mc".
37 - reg : First resource shall be the MC PMU resource.
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/
Damlogic.txt16 Boards with the Amlogic Meson6 SoC shall have the following properties:
20 Boards with the Amlogic Meson8 SoC shall have the following properties:
24 Boards with the Amlogic Meson8b SoC shall have the following properties:
28 Boards with the Amlogic Meson8m2 SoC shall have the following properties:
32 Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
36 Boards with the Amlogic Meson GXL S905X SoC shall have the following properties:
40 Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
44 Boards with the Amlogic Meson GXL S805X SoC shall have the following properties:
48 Boards with the Amlogic Meson GXL S905W SoC shall have the following properties:
52 Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
[all …]
Dspear.txt4 Boards with the ST SPEAr600 SoC shall have the following properties:
8 Boards with the ST SPEAr300 SoC shall have the following properties:
12 Boards with the ST SPEAr310 SoC shall have the following properties:
16 Boards with the ST SPEAr320 SoC shall have the following properties:
20 Boards with the ST SPEAr1310 SoC shall have the following properties:
24 Boards with the ST SPEAr1340 SoC shall have the following properties:
/kernel/linux/linux-5.10/LICENSES/dual/
DApache-2.024 "License" shall mean the terms and conditions for use, reproduction, and
27 "Licensor" shall mean the copyright owner or entity authorized by the
30 "Legal Entity" shall mean the union of the acting entity and all other
38 "You" (or "Your") shall mean an individual or Legal Entity exercising
41 "Source" form shall mean the preferred form for making modifications,
45 "Object" form shall mean any form resulting from mechanical transformation
49 "Work" shall mean the work of authorship, whether in Source or Object form,
54 "Derivative Works" shall mean any work, whether in Source or Object form,
58 Derivative Works shall not include works that remain separable from, or
62 "Contribution" shall mean any work of authorship, including the original
[all …]
/kernel/linux/linux-4.19/LICENSES/other/
DApache-2.020 "License" shall mean the terms and conditions for use, reproduction, and
23 "Licensor" shall mean the copyright owner or entity authorized by the
26 "Legal Entity" shall mean the union of the acting entity and all other
34 "You" (or "Your") shall mean an individual or Legal Entity exercising
37 "Source" form shall mean the preferred form for making modifications,
41 "Object" form shall mean any form resulting from mechanical transformation
45 "Work" shall mean the work of authorship, whether in Source or Object form,
50 "Derivative Works" shall mean any work, whether in Source or Object form,
54 Derivative Works shall not include works that remain separable from, or
58 "Contribution" shall mean any work of authorship, including the original
[all …]

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