| /kernel/linux/linux-5.10/tools/testing/selftests/kvm/include/ |
| D | evmcs.h | 251 static inline int evmcs_vmptrst(uint64_t *value) in evmcs_vmptrst() argument
253 *value = current_vp_assist->current_nested_vmcs & in evmcs_vmptrst()
259 static inline int evmcs_vmread(uint64_t encoding, uint64_t *value) in evmcs_vmread() argument
263 *value = current_evmcs->guest_rip; in evmcs_vmread()
266 *value = current_evmcs->guest_rsp; in evmcs_vmread()
269 *value = current_evmcs->guest_rflags; in evmcs_vmread()
272 *value = current_evmcs->host_ia32_pat; in evmcs_vmread()
275 *value = current_evmcs->host_ia32_efer; in evmcs_vmread()
278 *value = current_evmcs->host_cr0; in evmcs_vmread()
281 *value = current_evmcs->host_cr3; in evmcs_vmread()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/ |
| D | fw.h | 246 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ argument
247 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
248 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ argument
249 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
250 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ argument
251 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
252 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ argument
253 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
262 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ argument
263 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
[all …]
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| D | tx.h | 12 #define SET_TX_DESC_TXPKTSIZE(txdesc, value) \ argument
13 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0))
14 #define SET_TX_DESC_OFFSET(txdesc, value) \ argument
15 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16))
16 #define SET_TX_DESC_PKT_OFFSET(txdesc, value) \ argument
17 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24))
18 #define SET_TX_DESC_QSEL(txdesc, value) \ argument
19 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8))
20 #define SET_TX_DESC_BMC(txdesc, value) \ argument
21 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24))
[all …]
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| /kernel/linux/linux-4.19/drivers/video/fbdev/riva/ |
| D | nvreg.h | 34 #define SetBF(mask,value) ((value) << (0?mask)) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
38 | SetBF(mask,value)))
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
51 #define DEVICE_DEF(device,mask,value) \ argument
52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/riva/ |
| D | nvreg.h | 34 #define SetBF(mask,value) ((value) << (0?mask)) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
38 | SetBF(mask,value)))
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
51 #define DEVICE_DEF(device,mask,value) \ argument
52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument
[all …]
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| /kernel/linux/linux-4.19/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwxgmac2_dma.c | 13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local
16 writel(value | XGMAC_SWR, ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset()
18 return readl_poll_timeout(ioaddr + XGMAC_DMA_MODE, value, in dwxgmac2_dma_reset()
19 !(value & XGMAC_SWR), 0, 100000); in dwxgmac2_dma_reset()
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local
28 value |= XGMAC_AAL; in dwxgmac2_dma_init()
30 writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init()
36 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() local
39 value |= XGMAC_PBLx8; in dwxgmac2_dma_init_chan()
41 writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwxgmac2_dma.c | 13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local
16 writel(value | XGMAC_SWR, ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset()
18 return readl_poll_timeout(ioaddr + XGMAC_DMA_MODE, value, in dwxgmac2_dma_reset()
19 !(value & XGMAC_SWR), 0, 100000); in dwxgmac2_dma_reset()
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local
28 value |= XGMAC_AAL; in dwxgmac2_dma_init()
31 value |= XGMAC_EAME; in dwxgmac2_dma_init()
33 writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init()
39 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() local
42 value |= XGMAC_PBLx8; in dwxgmac2_dma_init_chan()
[all …]
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| D | dwmac4_core.c | 27 u32 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_core_init() local
29 value |= GMAC_CORE_INIT; in dwmac4_core_init()
32 value |= GMAC_CONFIG_TE; in dwmac4_core_init()
34 value &= hw->link.speed_mask; in dwmac4_core_init()
37 value |= hw->link.speed1000; in dwmac4_core_init()
40 value |= hw->link.speed100; in dwmac4_core_init()
43 value |= hw->link.speed10; in dwmac4_core_init()
48 writel(value, ioaddr + GMAC_CONFIG); in dwmac4_core_init()
51 value = GMAC_INT_DEFAULT_ENABLE; in dwmac4_core_init()
54 value |= GMAC_PCS_IRQ_DEFAULT; in dwmac4_core_init()
[all …]
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| /kernel/linux/linux-5.10/tools/power/x86/intel-speed-select/ |
| D | isst-display.c | 85 char *value) in format_and_print_txt() argument
102 if (header && value) { in format_and_print_txt()
104 fprintf(outf, "%s:%s\n", header, value); in format_and_print_txt()
112 static void format_and_print(FILE *outf, int level, char *header, char *value) in format_and_print() argument
119 format_and_print_txt(outf, level, header, value); in format_and_print()
139 if (value) { in format_and_print()
144 fprintf(outf, "\"%s\"", value); in format_and_print()
196 char value[512]; in _isst_pbf_display_information() local
202 snprintf(value, sizeof(value), "%d", in _isst_pbf_display_information()
204 format_and_print(outf, disp_level + 1, header, value); in _isst_pbf_display_information()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_mem_input_v.c | 42 uint32_t value = 0; in set_flip_control() local
44 value = dm_read_reg( in set_flip_control()
48 set_reg_field_value(value, 1, in set_flip_control()
55 value); in set_flip_control()
63 uint32_t value = 0; in program_pri_addr_c() local
69 set_reg_field_value(value, temp, in program_pri_addr_c()
76 value); in program_pri_addr_c()
79 value = 0; in program_pri_addr_c()
83 set_reg_field_value(value, temp, in program_pri_addr_c()
90 value); in program_pri_addr_c()
[all …]
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| D | dce110_opp_regamma_v.c | 37 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() local
43 value, in power_on_lut()
49 value, in power_on_lut()
56 value, in power_on_lut()
62 value, in power_on_lut()
68 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut()
71 value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut()
72 if (get_reg_field_value(value, in power_on_lut()
75 get_reg_field_value(value, in power_on_lut()
86 uint32_t value; in set_bypass_input_gamma() local
[all …]
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| D | dce110_opp_csc_v.c | 52 * value = UNDERLAY_SATURATION_MAX /UNDERLAY_SATURATION_DIVIDER
127 uint32_t value = 0; in program_color_matrix_v() local
131 value, in program_color_matrix_v()
137 value, in program_color_matrix_v()
142 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
145 uint32_t value = 0; in program_color_matrix_v() local
149 value, in program_color_matrix_v()
155 value, in program_color_matrix_v()
160 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
163 uint32_t value = 0; in program_color_matrix_v() local
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_mem_input_v.c | 42 uint32_t value = 0; in set_flip_control() local
44 value = dm_read_reg( in set_flip_control()
48 set_reg_field_value(value, 1, in set_flip_control()
55 value); in set_flip_control()
63 uint32_t value = 0; in program_pri_addr_c() local
69 set_reg_field_value(value, temp, in program_pri_addr_c()
76 value); in program_pri_addr_c()
79 value = 0; in program_pri_addr_c()
83 set_reg_field_value(value, temp, in program_pri_addr_c()
90 value); in program_pri_addr_c()
[all …]
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| D | dce110_opp_regamma_v.c | 39 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() local
45 value, in power_on_lut()
51 value, in power_on_lut()
58 value, in power_on_lut()
64 value, in power_on_lut()
70 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut()
73 value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut()
74 if (get_reg_field_value(value, in power_on_lut()
77 get_reg_field_value(value, in power_on_lut()
88 uint32_t value; in set_bypass_input_gamma() local
[all …]
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| D | dce110_opp_csc_v.c | 52 * value = UNDERLAY_SATURATION_MAX /UNDERLAY_SATURATION_DIVIDER
127 uint32_t value = 0; in program_color_matrix_v() local
131 value, in program_color_matrix_v()
137 value, in program_color_matrix_v()
142 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
145 uint32_t value = 0; in program_color_matrix_v() local
149 value, in program_color_matrix_v()
155 value, in program_color_matrix_v()
160 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
163 uint32_t value = 0; in program_color_matrix_v() local
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/tegra/ |
| D | xusb-tegra210.c | 264 u32 value; in tegra210_pex_uphy_enable() local
280 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
281 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK << in tegra210_pex_uphy_enable()
283 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL << in tegra210_pex_uphy_enable()
285 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
287 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
288 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK << in tegra210_pex_uphy_enable()
290 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL << in tegra210_pex_uphy_enable()
292 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
294 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
[all …]
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| /kernel/linux/linux-4.19/drivers/media/pci/cx25821/ |
| D | cx25821-medusa-video.c | 34 u32 value = 0; in medusa_enable_bluefield_output() local
73 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output()
74 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
76 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
77 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output()
79 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output()
80 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output()
82 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
83 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output()
90 u32 value = 0; in medusa_initialize_ntsc() local
[all …]
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| /kernel/linux/linux-5.10/drivers/media/pci/cx25821/ |
| D | cx25821-medusa-video.c | 24 u32 value = 0; in medusa_enable_bluefield_output() local
63 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output()
64 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
66 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
67 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output()
69 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output()
70 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output()
72 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
73 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output()
80 u32 value = 0; in medusa_initialize_ntsc() local
[all …]
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| /kernel/linux/linux-4.19/arch/mips/include/asm/octeon/ |
| D | cvmx-fau.h | 57 * bit will be set. Otherwise the value of the register before
62 int64_t value:63; member
67 * bit will be set. Otherwise the value of the register before
72 int32_t value:31; member
77 * bit will be set. Otherwise the value of the register before
82 int16_t value:15; member
87 * bit will be set. Otherwise the value of the register before
92 int8_t value:7; member
97 * the error bit will be set. Otherwise the value of the
121 * @noadd: 0 = Store value is atomically added to the current value
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/octeon/ |
| D | cvmx-fau.h | 57 * bit will be set. Otherwise the value of the register before
62 int64_t value:63; member
67 * bit will be set. Otherwise the value of the register before
72 int32_t value:31; member
77 * bit will be set. Otherwise the value of the register before
82 int16_t value:15; member
87 * bit will be set. Otherwise the value of the register before
92 int8_t value:7; member
97 * the error bit will be set. Otherwise the value of the
121 * @noadd: 0 = Store value is atomically added to the current value
[all …]
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| /kernel/linux/linux-4.19/drivers/phy/tegra/ |
| D | xusb-tegra210.c | 256 u32 value; in tegra210_pex_uphy_enable() local
272 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
273 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK << in tegra210_pex_uphy_enable()
275 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL << in tegra210_pex_uphy_enable()
277 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
279 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
280 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK << in tegra210_pex_uphy_enable()
282 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL << in tegra210_pex_uphy_enable()
284 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
286 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 15 /* Vendor ID Low byte, default value: 0x01 */
18 /* Vendor ID High byte, default value: 0x00 */
21 /* Device ID Low byte, default value: 0x60 */
24 /* Device ID High byte, default value: 0x86 */
27 /* Device Revision, default value: 0x10 */
30 /* OTP DBYTE510, default value: 0x00 */
33 /* System Control #1, default value: 0x00 */
44 /* System Control DPD, default value: 0x90 */
54 /* Dual link Control, default value: 0x00 */
65 /* PWD Software Reset, default value: 0x20 */
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/ |
| D | sil-sii8620.h | 18 /* Vendor ID Low byte, default value: 0x01 */
21 /* Vendor ID High byte, default value: 0x00 */
24 /* Device ID Low byte, default value: 0x60 */
27 /* Device ID High byte, default value: 0x86 */
30 /* Device Revision, default value: 0x10 */
33 /* OTP DBYTE510, default value: 0x00 */
36 /* System Control #1, default value: 0x00 */
47 /* System Control DPD, default value: 0x90 */
57 /* Dual link Control, default value: 0x00 */
68 /* PWD Software Reset, default value: 0x20 */
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_getparam.c | 17 int value; in i915_getparam_ioctl() local
27 value = i915->drm.pdev->device; in i915_getparam_ioctl()
30 value = i915->drm.pdev->revision; in i915_getparam_ioctl()
33 value = i915->ggtt.num_fences; in i915_getparam_ioctl()
36 value = !!i915->overlay; in i915_getparam_ioctl()
39 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
43 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
47 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
51 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
55 value = HAS_LLC(i915); in i915_getparam_ioctl()
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/tegra/ |
| D | sor.c | 399 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl() local
401 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
403 return value; in tegra_sor_readl()
406 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument
409 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
410 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
448 u32 value; in tegra_clk_sor_pad_set_parent() local
450 value = tegra_sor_readl(sor, SOR_CLK_CNTRL); in tegra_clk_sor_pad_set_parent()
451 value &= ~SOR_CLK_CNTRL_DP_CLK_SEL_MASK; in tegra_clk_sor_pad_set_parent()
455 value |= SOR_CLK_CNTRL_DP_CLK_SEL_SINGLE_PCLK; in tegra_clk_sor_pad_set_parent()
[all …]
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