| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | palmas_gpadc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * palmas-adc.c -- TI PALMAS GPADC. 27 #define MOD_NAME "palmas-gpadc" 30 #define PALMAS_GPADC_TRIMINVALID -1 80 * struct palmas_gpadc - the palmas_gpadc structure 94 * This is the palmas_gpadc structure to store run-time information 98 struct device *dev; member 139 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument 143 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion() 148 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion() [all …]
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| D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 11 #include <linux/dma-mapping.h> 15 #include <linux/iio/timer/stm32-lptim-trigger.h> 16 #include <linux/iio/timer/stm32-timer-trigger.h> 29 #include "stm32-adc-core.h" 34 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */ 55 /* extsel - trigger mux selection value */ 81 * struct stm32_adc_trig_info - ADC trigger info [all …]
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| D | max1241.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * MAX1241 low-power, 12-bit serial ADC 5 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf 42 static int max1241_read(struct max1241 *adc) in max1241_read() argument 58 .rx_buf = &adc->data, in max1241_read() 63 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read() 71 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local 75 mutex_lock(&adc->lock); in max1241_read_raw() 77 if (adc->shutdown) { in max1241_read_raw() 78 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw() [all …]
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| D | stm32-dfsdm-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is the ADC part of the STM32 DFSDM driver 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 10 #include <linux/dma-mapping.h> 11 #include <linux/iio/adc/stm32-dfsdm-adc.h> 13 #include <linux/iio/hw-consumer.h> 15 #include <linux/iio/timer/stm32-lptim-trigger.h> 16 #include <linux/iio/timer/stm32-timer-trigger.h> 27 #include "stm32-dfsdm.h" 42 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */ [all …]
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| D | mcp3911.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Driver for Microchip MCP3911, Two-channel Analog Front End 57 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument 61 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read() 62 ret = spi_write_then_read(adc->spi, ®, 1, val, len); in mcp3911_read() 67 *val >>= ((4 - len) * 8); in mcp3911_read() 68 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%x\n", *val, in mcp3911_read() 73 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) in mcp3911_write() argument 75 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write() 77 val <<= (3 - len) * 8; in mcp3911_write() [all …]
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| D | lpc18xx_adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * IIO ADC driver for NXP LPC18xx ADC 8 * - Hardware triggers 9 * - Burst mode 10 * - Interrupts 11 * - DMA 27 /* LPC18XX ADC registers and bits */ 45 struct device *dev; member 70 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument 75 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan() [all …]
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| D | ingenic-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ADC driver for the Ingenic JZ47xx SoCs 4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu> 6 * based on drivers/mfd/jz4740-adc.c 9 #include <dt-bindings/iio/adc/ingenic,adc.h> 98 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); 112 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local 114 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd() 117 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd() 124 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd() [all …]
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| D | qcom-spmi-adc5.c | 1 // SPDX-License-Identifier: GPL-2.0 21 #include <dt-bindings/iio/qcom,spmi-vadc.h> 22 #include "qcom-vadc-common.h" 103 * struct adc5_channel_prop - ADC channel property. 112 * @avg_samples: ability to provide single result from the ADC 132 * struct adc5_chip - ADC private structure. 134 * @dev: SPMI ADC5 device. 135 * @base: base address for the ADC peripheral. 136 * @nchannels: number of ADC channels. 137 * @chan_props: array of ADC channel properties. [all …]
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| D | rn5t618-adc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * ADC driver for the RICOH RN5T618 power management chip family 26 /* average 4-time conversion mode */ 37 struct device *dev; member 75 ret = regmap_bulk_read(rn5t618->regmap, reg, data, sizeof(data)); in rn5t618_read_adc_reg() 86 struct rn5t618_adc_data *adc = data; in rn5t618_adc_irq() local 91 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0); in rn5t618_adc_irq() 92 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0); in rn5t618_adc_irq() 94 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r); in rn5t618_adc_irq() 96 dev_err(adc->dev, "failed to read IRQ status: %d\n", ret); in rn5t618_adc_irq() [all …]
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| D | qcom-pm8xxx-xoadc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * specific-purpose and general purpose ADC converters and channels. 24 #include "qcom-vadc-common.h" 28 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC: 29 * drivers/misc/pmic8058-xoadc.c 30 * drivers/hwmon/pm8xxx-adc.c 58 /* Proper ADC registers */ 100 * On a later ADC the decimation factors are defined as 156 * struct xoadc_channel - encodes channel properties and defaults 163 * @prescale: the channels have hard-coded prescale ratios defined [all …]
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| D | mxs-lradc-adc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Freescale MXS LRADC ADC driver 18 #include <linux/mfd/mxs-lradc.h> 43 "mxs-lradc-channel0", 44 "mxs-lradc-channel1", 45 "mxs-lradc-channel2", 46 "mxs-lradc-channel3", 47 "mxs-lradc-channel4", 48 "mxs-lradc-channel5", 52 "mxs-lradc-thresh0", [all …]
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| D | ti-adc084s021.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Driver for Texas Instruments' ADC084S021 ADC chip. 39 __be16 rx_buf[5]; /* First 16-bits are trash */ 68 * Read an ADC channel and return its value. 70 * @adc: The ADC SPI data. 73 static int adc084s021_adc_conversion(struct adc084s021 *adc, void *data) in adc084s021_adc_conversion() argument 75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion() 80 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion() 85 *(p + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion() 94 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local [all …]
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| /kernel/linux/linux-4.19/drivers/iio/adc/ |
| D | palmas_gpadc.c | 2 * palmas-adc.c -- TI PALMAS GPADC. 30 #define MOD_NAME "palmas-gpadc" 33 #define PALMAS_GPADC_TRIMINVALID -1 83 * struct palmas_gpadc - the palmas_gpadc structure 97 * This is the palmas_gpadc structure to store run-time information 102 struct device *dev; member 143 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument 147 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion() 152 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion() 156 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion() [all …]
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| D | stm32-dfsdm-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is the ADC part of the STM32 DFSDM driver 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 10 #include <linux/dma-mapping.h> 11 #include <linux/iio/adc/stm32-dfsdm-adc.h> 13 #include <linux/iio/hw-consumer.h> 22 #include "stm32-dfsdm.h" 48 int (*init)(struct device *dev, struct iio_dev *indio_dev); 58 /* ADC specific */ 110 for (p = list; p && p->name; p++) in stm32_dfsdm_str2val() [all …]
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| D | lpc18xx_adc.c | 2 * IIO ADC driver for NXP LPC18xx ADC 11 * - Hardware triggers 12 * - Burst mode 13 * - Interrupts 14 * - DMA 30 /* LPC18XX ADC registers and bits */ 48 struct device *dev; member 73 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument 78 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan() 79 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan() [all …]
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| D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 11 #include <linux/dma-mapping.h> 15 #include <linux/iio/timer/stm32-lptim-trigger.h> 16 #include <linux/iio/timer/stm32-timer-trigger.h> 28 #include "stm32-adc-core.h" 33 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */ 53 /* extsel - trigger mux selection value */ 79 * struct stm32_adc_trig_info - ADC trigger info [all …]
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| D | ti-adc084s021.c | 4 * Driver for Texas Instruments' ADC084S021 ADC chip. 41 __be16 rx_buf[5]; /* First 16-bits are trash */ 70 * Read an ADC channel and return its value. 72 * @adc: The ADC SPI data. 75 static int adc084s021_adc_conversion(struct adc084s021 *adc, void *data) in adc084s021_adc_conversion() argument 77 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion() 82 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion() 87 *(p + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion() 96 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local 105 ret = regulator_enable(adc->reg); in adc084s021_read_raw() [all …]
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| D | qcom-pm8xxx-xoadc.c | 6 * specific-purpose and general purpose ADC converters and channels. 23 #include "qcom-vadc-common.h" 27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC: 28 * drivers/misc/pmic8058-xoadc.c 29 * drivers/hwmon/pm8xxx-adc.c 57 /* Proper ADC registers */ 99 * On a later ADC the decimation factors are defined as 155 * struct xoadc_channel - encodes channel properties and defaults 162 * @prescale: the channels have hard-coded prescale ratios defined 167 * ADC code to the value that IIO expects, in uV or millicelsius [all …]
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| D | mxs-lradc-adc.c | 2 * Freescale MXS LRADC ADC driver 27 #include <linux/mfd/mxs-lradc.h> 52 "mxs-lradc-channel0", 53 "mxs-lradc-channel1", 54 "mxs-lradc-channel2", 55 "mxs-lradc-channel3", 56 "mxs-lradc-channel4", 57 "mxs-lradc-channel5", 61 "mxs-lradc-thresh0", 62 "mxs-lradc-thresh1", [all …]
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| D | ti-adc12138.c | 2 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver 54 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp. 130 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument 134 .tx_buf = adc->tx_buf, in adc12138_mode_programming() 135 .rx_buf = adc->rx_buf, in adc12138_mode_programming() 141 if (adc->id != adc12138) in adc12138_mode_programming() 144 adc->tx_buf[0] = mode; in adc12138_mode_programming() 146 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming() 150 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming() 155 static int adc12138_read_status(struct adc12138 *adc) in adc12138_read_status() argument [all …]
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| /kernel/linux/linux-4.19/arch/arm/plat-samsung/ |
| D | adc.c | 1 // SPDX-License-Identifier: GPL-1.0+ 5 // Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> 7 // Samsung ADC device core 22 #include <plat/regs-adc.h> 23 #include <plat/adc.h> 25 /* This driver is designed to control the usage of the ADC block between 81 #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) 83 static inline void s3c_adc_convert(struct adc_device *adc) in s3c_adc_convert() argument 85 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_convert() 88 writel(con, adc->regs + S3C2410_ADCCON); in s3c_adc_convert() [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | adc.c | 1 // SPDX-License-Identifier: GPL-1.0+ 5 // Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> 7 // Samsung ADC device core 22 #include "regs-adc.h" 23 #include <linux/soc/samsung/s3c-adc.h> 25 /* This driver is designed to control the usage of the ADC block between 81 #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) 83 static inline void s3c_adc_convert(struct adc_device *adc) in s3c_adc_convert() argument 85 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_convert() 88 writel(con, adc->regs + S3C2410_ADCCON); in s3c_adc_convert() [all …]
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| /kernel/linux/linux-4.19/drivers/mfd/ |
| D | jz4740-adc.c | 2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> 3 * JZ4740 SoC ADC driver 14 * This driver synchronizes access to the JZ4740 ADC core between the 31 #include <linux/jz4740-adc.h> 74 status = readb(gc->reg_base + JZ_REG_ADC_STATUS); in jz4740_adc_irq_demux() 78 generic_handle_irq(gc->irq_base + i); in jz4740_adc_irq_demux() 83 /* Refcounting for the ADC clock is done in here instead of in the clock 86 static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc) in jz4740_adc_clk_enable() argument 88 if (atomic_inc_return(&adc->clk_ref) == 1) in jz4740_adc_clk_enable() 89 clk_prepare_enable(adc->clk); in jz4740_adc_clk_enable() [all …]
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| /kernel/linux/linux-5.10/drivers/hwmon/ |
| D | adcxx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 * ADC<bb><c>S<sss>, where 18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf 32 #include <linux/hwmon-sysfs.h> 47 static ssize_t adcxx_show(struct device *dev, in adcxx_show() argument 50 struct spi_device *spi = to_spi_device(dev); in adcxx_show() 52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local 58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show() 59 return -ERESTARTSYS; in adcxx_show() 61 if (adc->channels == 1) { in adcxx_show() [all …]
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| /kernel/linux/linux-4.19/drivers/hwmon/ |
| D | adcxx.c | 10 * ADC<bb><c>S<sss>, where 17 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf 45 #include <linux/hwmon-sysfs.h> 60 static ssize_t adcxx_read(struct device *dev, in adcxx_read() argument 63 struct spi_device *spi = to_spi_device(dev); in adcxx_read() 65 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_read() local 71 if (mutex_lock_interruptible(&adc->lock)) in adcxx_read() 72 return -ERESTARTSYS; in adcxx_read() 74 if (adc->channels == 1) { in adcxx_read() 77 tx_buf[0] = attr->index << 3; /* other bits are don't care */ in adcxx_read() [all …]
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