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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/
Darm,arch_timer.txt1 * ARM architected timer
3 ARM cores may have a per-core architected timer, which provides per-cpu timers,
4 or a memory mapped architected timer, which provides up to 8 frames with a
5 physical and optional virtual timer per frame.
7 The per-core architected timer is attached to a GIC to deliver its
8 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
11 ** CP15 Timer node properties:
13 - compatible : Should at least contain one of
14 "arm,armv7-timer"
15 "arm,armv8-timer"
[all …]
Darm,armv7m-systick.txt1 * ARMv7M System Timer
3 ARMv7-M includes a system timer, known as SysTick. Current driver only
7 - compatible : Should be "arm,armv7m-systick"
8 - reg : The address range of the timer
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM SysTick
16 systick: timer@e000e010 {
17 compatible = "arm,armv7m-systick";
22 systick: timer@e000e010 {
23 compatible = "arm,armv7m-systick";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Darm,arch_timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
[all …]
Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM memory mapped architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
15 frames with a physical and optional virtual timer per frame.
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
[all …]
Darm,armv7m-systick.txt1 * ARMv7M System Timer
3 ARMv7-M includes a system timer, known as SysTick. Current driver only
7 - compatible : Should be "arm,armv7m-systick"
8 - reg : The address range of the timer
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM SysTick
16 systick: timer@e000e010 {
17 compatible = "arm,armv7m-systick";
22 systick: timer@e000e010 {
23 compatible = "arm,armv7m-systick";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
[all …]
Decx-2000.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a15";
[all …]
Dxenvm-4.2.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
10 /dts-v1/;
13 model = "XENVM-4.2";
14 compatible = "xen,xenvm-4.2", "xen,xenvm";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
4 #include "bcm2835-rpi-common.dtsi"
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
15 compatible = "brcm,bcm2836-l1-intc";
17 interrupt-controller;
18 #interrupt-cells = <2>;
19 interrupt-parent = <&local_intc>;
23 arm-pmu {
24 compatible = "arm,cortex-a7-pmu";
[all …]
Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
3 #include "bcm2835-rpi-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
[all …]
Dmt8127.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 interrupt-parent = <&sysirq>;
18 #address-cells = <1>;
19 #size-cells = <0>;
20 enable-method = "mediatek,mt81xx-tz-smp";
24 compatible = "arm,cortex-a7";
[all …]
Defm32gg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
9 #include "armv7-m.dtsi"
10 #include "dt-bindings/clock/efm32-cmu.h"
13 #address-cells = <1>;
14 #size-cells = <1>;
31 compatible = "energymicro,efm32-adc";
39 compatible = "energymicro,efm32-gpio";
42 gpio-controller;
43 #gpio-cells = <2>;
[all …]
/kernel/linux/linux-4.19/arch/arm/oprofile/
Dcommon.c42 { "armv7_cortex_a8", "arm/armv7" },
43 { "armv7_cortex_a9", "arm/armv7-ca9" },
67 oprofile_add_trace(frame->pc); in report_trace()
68 (*depth)--; in report_trace()
78 * (struct frame_tail *)(xxx->fp)-1
103 return buftail[0].fp-1; in user_backtrace()
108 struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; in arm_backtrace()
117 while (depth-- && tail && !((unsigned long) tail & 3)) in arm_backtrace()
123 /* provide backtrace support also in timer mode: */ in oprofile_arch_init()
124 ops->backtrace = arm_backtrace; in oprofile_arch_init()
/kernel/linux/linux-5.10/arch/arm/oprofile/
Dcommon.c42 { "armv7_cortex_a8", "arm/armv7" },
43 { "armv7_cortex_a9", "arm/armv7-ca9" },
67 oprofile_add_trace(frame->pc); in report_trace()
68 (*depth)--; in report_trace()
78 * (struct frame_tail *)(xxx->fp)-1
103 return buftail[0].fp-1; in user_backtrace()
108 struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; in arm_backtrace()
117 while (depth-- && tail && !((unsigned long) tail & 3)) in arm_backtrace()
123 /* provide backtrace support also in timer mode: */ in oprofile_arch_init()
124 ops->backtrace = arm_backtrace; in oprofile_arch_init()
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dxenvm-4.2.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
10 /dts-v1/;
13 model = "XENVM-4.2";
14 compatible = "xen,xenvm-4.2", "xen,xenvm";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
13 compatible = "brcm,bcm2836-l1-intc";
15 interrupt-controller;
16 #interrupt-cells = <2>;
17 interrupt-parent = <&local_intc>;
21 arm-pmu {
22 compatible = "arm,cortex-a7-pmu";
23 interrupt-parent = <&local_intc>;
27 timer {
[all …]
Dbcm2837.dtsi9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 compatible = "brcm,bcm2836-l1-intc";
14 interrupt-controller;
15 #interrupt-cells = <2>;
16 interrupt-parent = <&local_intc>;
20 arm-pmu {
21 compatible = "arm,cortex-a53-pmu";
22 interrupt-parent = <&local_intc>;
26 timer {
27 compatible = "arm,armv7-timer";
[all …]
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
29 compatible = "arm,cortex-a7";
32 enable-method = "renesas,r9a06g032-smp";
33 cpu-release-addr = <0 0x4000c204>;
[all …]
Decx-2000.dts2 * Copyright 2011-2012 Calxeda, Inc.
17 /dts-v1/;
23 model = "Calxeda ECX-2000";
24 compatible = "calxeda,ecx-2000";
25 #address-cells = <2>;
26 #size-cells = <2>;
27 clock-ranges;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a15";
[all …]
Dmt8127.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&sysirq>;
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "mediatek,mt81xx-tz-smp";
23 compatible = "arm,cortex-a7";
28 compatible = "arm,cortex-a7";
33 compatible = "arm,cortex-a7";
[all …]
Defm32gg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf
9 #include "armv7-m.dtsi"
10 #include "dt-bindings/clock/efm32-cmu.h"
13 #address-cells = <1>;
14 #size-cells = <1>;
31 compatible = "energymicro,efm32-adc";
39 compatible = "energymicro,efm32-gpio";
42 gpio-controller;
43 #gpio-cells = <2>;
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-omap2/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 ccflags-y := -I$(srctree)/$(src)/include \
7 -I$(srctree)/arch/arm/plat-omap/include
10 obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \
12 omap_device.o omap-headsmp.o sram.o
14 hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
16 clock-common = clock.o
17 secure-common = omap-smc.o omap-secure.o
19 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
20 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-y := timer.o
10 obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
11 obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
12 obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
13 obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
14 obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
15 obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
16 obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
17 obj-$(CONFIG_ARCH_R7S9210) += setup-r7s9210.o
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-shmobile/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-y := timer.o
10 obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
11 obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
12 obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
13 obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
14 obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
15 obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
16 obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
19 cpu-y := platsmp.o headsmp.o
[all …]
/kernel/linux/linux-5.10/drivers/clocksource/
Darm_arch_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
88 * Architected system timer support.
96 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
99 writel_relaxed(val, timer->base + CNTP_CTL); in arch_timer_reg_write()
102 writel_relaxed(val, timer->base + CNTP_TVAL); in arch_timer_reg_write()
106 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
109 writel_relaxed(val, timer->base + CNTV_CTL); in arch_timer_reg_write()
112 writel_relaxed(val, timer->base + CNTV_TVAL); in arch_timer_reg_write()
127 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_read() local
130 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
[all …]

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