Home
last modified time | relevance | path

Searched +full:aspm +full:- +full:no +full:- +full:l0s (Results 1 – 25 of 36) sorted by relevance

12

/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pci/
Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
[all …]
Dbrcm,stb-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
18 - brcm,bcm7278-pcie # Broadcom 7278 Arm
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/ath/ath5k/
Dpci.c2 * Copyright (c) 2008-2009 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
21 #include <linux/pci-aspm.h>
34 { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/
46 { PCI_VDEVICE(ATHEROS, 0x001a) }, /* 2413 Griffin-lite */
48 { PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */
58 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv; in ath5k_pci_read_cachesize()
61 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); in ath5k_pci_read_cachesize()
80 struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; in ath5k_pci_eeprom_read()
86 if (ah->ah_version == AR5K_AR5210) { in ath5k_pci_eeprom_read()
[all …]
/kernel/linux/linux-4.19/drivers/char/xillybus/
Dxillybus_pcie.c15 #include <linux/pci-aspm.h>
57 pci_dma_sync_single_for_cpu(ep->pdev, in xilly_dma_sync_single_for_cpu_pci()
68 pci_dma_sync_single_for_device(ep->pdev, in xilly_dma_sync_single_for_device_pci()
78 pci_unmap_single(data->device, data->dma_addr, in xilly_pci_unmap()
79 data->size, data->direction); in xilly_pci_unmap()
103 return -ENOMEM; in xilly_map_single_pci()
107 addr = pci_map_single(ep->pdev, ptr, size, pci_direction); in xilly_map_single_pci()
109 if (pci_dma_mapping_error(ep->pdev, addr)) { in xilly_map_single_pci()
111 return -ENODEV; in xilly_map_single_pci()
114 this->device = ep->pdev; in xilly_map_single_pci()
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
Dpcie-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
33 #include "pcie-designware.h"
35 #include <soc/tegra/bpmp-abi.h>
322 writel_relaxed(value, pcie->appl_base + reg); in appl_writel()
327 return readl_relaxed(pcie->appl_base + reg); in appl_readl()
342 * NOTE:- Since this scenario is uncommon and link as such is not in apply_bad_link_workaround()
344 * transitioning to Gen-2 speed in apply_bad_link_workaround()
346 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); in apply_bad_link_workaround()
350 if (pcie->init_link_width > current_link_width) { in apply_bad_link_workaround()
351 dev_warn(pci->dev, "PCIe link is bad, width reduced\n"); in apply_bad_link_workaround()
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/
Dpcie-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2009 - 2019 Broadcom */
34 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
175 #define IDX_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_INDEX])
176 #define DATA_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_DATA])
177 #define PCIE_RGR1_SW_INIT_1(pcie) (pcie->reg_offsets[RGR1_SW_INIT_1])
267 int nr; /* No. of MSI available, depends on chip */
294 * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE
302 return (log2_in - 12) + 0x1c; in brcm_pcie_encode_ibar_size()
305 return log2_in - 15; in brcm_pcie_encode_ibar_size()
[all …]
Dpcie-rockchip-host.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
40 #include "pcie-rockchip.h"
79 if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent)) in rockchip_pcie_valid_device()
90 if (rockchip->legacy_phy) in rockchip_pcie_lane_map()
91 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map()
96 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map()
108 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
135 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
[all …]
/kernel/linux/linux-4.19/include/uapi/linux/
Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
27 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
28 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
51 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
122 /* 0x35-0x3b are reserved */
128 /* Header type 1 (PCI-to-PCI bridges) */
156 /* 0x35-0x3b is reserved */
158 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
Dar9002_hw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271); in ar9002_hw_init_mode_regs()
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271); in ar9002_hw_init_mode_regs()
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg); in ar9002_hw_init_mode_regs()
35 INIT_INI_ARRAY(&ah->iniPcieSerdes, in ar9002_hw_init_mode_regs()
39 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1); in ar9002_hw_init_mode_regs()
40 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1); in ar9002_hw_init_mode_regs()
42 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2); in ar9002_hw_init_mode_regs()
43 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2); in ar9002_hw_init_mode_regs()
[all …]
Dar9003_hw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
45 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
47 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], in ar9003_hw_init_mode_regs()
51 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
53 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], in ar9003_hw_init_mode_regs()
57 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
61 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], in ar9003_hw_init_mode_regs()
63 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], in ar9003_hw_init_mode_regs()
67 INIT_INI_ARRAY(&ah->iniModesRxGain, in ar9003_hw_init_mode_regs()
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/ath/ath9k/
Dar9002_hw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
29 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271); in ar9002_hw_init_mode_regs()
30 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271); in ar9002_hw_init_mode_regs()
31 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg); in ar9002_hw_init_mode_regs()
35 INIT_INI_ARRAY(&ah->iniPcieSerdes, in ar9002_hw_init_mode_regs()
39 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1); in ar9002_hw_init_mode_regs()
40 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1); in ar9002_hw_init_mode_regs()
42 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2); in ar9002_hw_init_mode_regs()
43 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2); in ar9002_hw_init_mode_regs()
[all …]
Dar9003_hw.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
45 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
47 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], in ar9003_hw_init_mode_regs()
51 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
53 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], in ar9003_hw_init_mode_regs()
57 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], in ar9003_hw_init_mode_regs()
61 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], in ar9003_hw_init_mode_regs()
63 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], in ar9003_hw_init_mode_regs()
67 INIT_INI_ARRAY(&ah->iniModesRxGain, in ar9003_hw_init_mode_regs()
[all …]
/kernel/linux/linux-4.19/drivers/pci/controller/
Dpcie-rockchip-host.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
40 #include "pcie-rockchip.h"
75 if (bus->number == rockchip->root_bus_nr && dev > 0) in rockchip_pcie_valid_device()
82 if (bus->primary == rockchip->root_bus_nr && dev > 0) in rockchip_pcie_valid_device()
93 if (rockchip->legacy_phy) in rockchip_pcie_lane_map()
94 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map()
99 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map()
111 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
[all …]
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpcie-sh7786.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Express Support for the SH7786
5 * Copyright (C) 2009 - 2011 Paul Mundt
15 #include <linux/dma-mapping.h>
21 #include "pcie-sh7786.h"
47 .end = 0xfd000000 + SZ_8M - 1,
52 .end = 0xc0000000 + SZ_512M - 1,
57 .end = 0x10000000 + SZ_64M - 1,
62 .end = 0xfe100000 + SZ_1M - 1,
71 .end = 0xfd800000 + SZ_8M - 1,
[all …]
/kernel/linux/linux-4.19/arch/sh/drivers/pci/
Dpcie-sh7786.c2 * Low-Level PCI Express Support for the SH7786
4 * Copyright (C) 2009 - 2011 Paul Mundt
23 #include "pcie-sh7786.h"
47 .end = 0xfd000000 + SZ_8M - 1,
52 .end = 0xc0000000 + SZ_512M - 1,
57 .end = 0x10000000 + SZ_64M - 1,
62 .end = 0xfe100000 + SZ_1M - 1,
71 .end = 0xfd800000 + SZ_8M - 1,
76 .end = 0xa0000000 + SZ_512M - 1,
81 .end = 0x30000000 + SZ_256M - 1,
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlegacy/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 #include <linux/dma-mapping.h>
39 return -ETIMEDOUT; in _il_poll_bit()
48 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_set_bit()
50 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_set_bit()
59 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_clear_bit()
61 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_clear_bit()
79 * to/from host DRAM when sleeping/waking for power-saving. in _il_grab_nic_access()
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlegacy/
Dcommon.c5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
37 #include <linux/dma-mapping.h>
57 return -ETIMEDOUT; in _il_poll_bit()
66 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_set_bit()
68 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_set_bit()
77 spin_lock_irqsave(&p->reg_lock, reg_flags); in il_clear_bit()
79 spin_unlock_irqrestore(&p->reg_lock, reg_flags); in il_clear_bit()
97 * to/from host DRAM when sleeping/waking for power-saving. in _il_grab_nic_access()
138 return -ETIMEDOUT; in il_poll_bit()
[all …]
/kernel/linux/linux-4.19/drivers/net/wireless/intel/iwlwifi/pcie/
Dtrans.c8 * Copyright(c) 2007 - 2015 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
32 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36 * Copyright(c) 2005 - 2015 Intel Corporation. All rights reserved.
37 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
38 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
59 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
70 #include <linux/pci-aspm.h>
80 #include "iwl-drv.h"
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/atheros/atl1c/
Datl1c_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
14 * atl1c_pci_tbl - PCI Device ID Table
35 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
65 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { in atl1c_pcie_patch()
74 /* aspm/PCIE setting only for l2cb 1.0 */ in atl1c_pcie_patch()
75 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { in atl1c_pcie_patch()
88 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { in atl1c_pcie_patch()
98 /* FIXME: no need any more ? */
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/atheros/atl1c/
Datl1c_main.c2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI"
29 * atl1c_pci_tbl - PCI Device ID Table
50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
81 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { in atl1c_pcie_patch()
90 /* aspm/PCIE setting only for l2cb 1.0 */ in atl1c_pcie_patch()
91 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { in atl1c_pcie_patch()
104 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { in atl1c_pcie_patch()
[all …]
/kernel/linux/linux-4.19/drivers/net/ethernet/atheros/alx/
Dhw.c28 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
58 return -ETIMEDOUT; in alx_wait_mdio_idle()
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
175 spin_lock(&hw->mdio_lock); in alx_read_phy_reg()
177 spin_unlock(&hw->mdio_lock); in alx_read_phy_reg()
186 spin_lock(&hw->mdio_lock); in alx_write_phy_reg()
188 spin_unlock(&hw->mdio_lock); in alx_write_phy_reg()
197 spin_lock(&hw->mdio_lock); in alx_read_phy_ext()
199 spin_unlock(&hw->mdio_lock); in alx_read_phy_ext()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/atheros/alx/
Dhw.c28 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
58 return -ETIMEDOUT; in alx_wait_mdio_idle()
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
104 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_write_phy_core()
175 spin_lock(&hw->mdio_lock); in alx_read_phy_reg()
177 spin_unlock(&hw->mdio_lock); in alx_read_phy_reg()
186 spin_lock(&hw->mdio_lock); in alx_write_phy_reg()
188 spin_unlock(&hw->mdio_lock); in alx_write_phy_reg()
197 spin_lock(&hw->mdio_lock); in alx_read_phy_ext()
199 spin_unlock(&hw->mdio_lock); in alx_read_phy_ext()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/realtek/
Dr8169_main.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
38 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
39 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
40 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
41 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
42 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
43 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
44 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
[all …]

12