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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/serial/
Dslave-device.txt14 - compatible : A string reflecting the vendor and specific device the node
19 - max-speed : The maximum baud rate the device operates at. This should
23 baud rates.
24 - current-speed : The current baud rate the device operates at. This should
26 the baud rate of the slave device.
28 * device supports auto-baud
31 * device baud rate is configured by its firmware but
41 compatible = "brcm,bcm43341-bt";
42 interrupt-parent = <&gpio>;
/kernel/linux/linux-4.19/drivers/net/hamradio/
Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
61 #define AUTO_ENAB 0x20 /* Auto Enables */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
145 /* Write Register 12 (lower byte of baud rate generator time constant) */
147 /* Write Register 13 (upper byte of baud rate generator time constant) */
150 #define BRENABL 1 /* Baud rate generator enable */
151 #define BRSRC 2 /* Baud rate generator source */
153 #define AUTOECHO 8 /* Auto Echo */
[all …]
/kernel/linux/linux-5.10/drivers/net/hamradio/
Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
61 #define AUTO_ENAB 0x20 /* Auto Enables */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
145 /* Write Register 12 (lower byte of baud rate generator time constant) */
147 /* Write Register 13 (upper byte of baud rate generator time constant) */
150 #define BRENABL 1 /* Baud rate generator enable */
151 #define BRSRC 2 /* Baud rate generator source */
153 #define AUTOECHO 8 /* Auto Echo */
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dmxs-auart.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
11 * Copyright 2008-2010 Freescale Semiconductor, Inc.
34 #include <linux/dma-mapping.h>
140 * RW. Receive Timeout Counter Value: number of 8-bit-time to wait before
142 * input is idle, then the watchdog counter will decrement each bit-time. Note
143 * 7-bit-time is added to the programmed value, so a value of zero will set
144 * the counter to 7-bit-time, a value of 0x1 gives 15-bit-time and so on. Also
148 * value is 0x3 (31 bit-time).
151 /* TIMEOUT = (100*7+1)*(1/BAUD) */
[all …]
Dsuncore.c1 // SPDX-License-Identifier: GPL-2.0
32 drv->minor = sunserial_current_minor; in sunserial_register_minors()
33 drv->nr += count; in sunserial_register_minors()
35 if (drv->nr == count) in sunserial_register_minors()
39 drv->tty_driver->name_base = drv->minor - 64; in sunserial_register_minors()
47 drv->nr -= count; in sunserial_unregister_minors()
48 sunserial_current_minor -= count; in sunserial_unregister_minors()
50 if (drv->nr == 0) in sunserial_unregister_minors()
61 drv->cons = con; in sunserial_console_match()
78 con->index = line; in sunserial_console_match()
[all …]
Dmax310x.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
49 #define MAX310X_HDPIXDELAY_REG (0x0d) /* Auto transceiver delays */
63 #define MAX310X_BRGCFG_REG (0x1b) /* Baud rate generator conf */
64 #define MAX310X_BRGDIVLSB_REG (0x1c) /* Baud rate divisor LSB */
65 #define MAX310X_BRGDIVMSB_REG (0x1d) /* Baud rate divisor MSB */
102 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
115 #define MAX310X_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */
116 #define MAX310X_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */
119 #define MAX310X_MODE1_AUTOSLEEP_BIT (1 << 6) /* Auto sleep enable */
[all …]
Dmilbeaut_usio.c1 // SPDX-License-Identifier: GPL-2.0
15 #define USIO_NAME "mlb-usio-uart"
67 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_stop_tx()
68 port->membase + MLB_USIO_REG_FCR); in mlb_usio_stop_tx()
69 writeb(readb(port->membase + MLB_USIO_REG_SCR) & ~MLB_USIO_SCR_TBIE, in mlb_usio_stop_tx()
70 port->membase + MLB_USIO_REG_SCR); in mlb_usio_stop_tx()
75 struct circ_buf *xmit = &port->state->xmit; in mlb_usio_tx_chars()
78 writew(readw(port->membase + MLB_USIO_REG_FCR) & ~MLB_USIO_FCR_FTIE, in mlb_usio_tx_chars()
79 port->membase + MLB_USIO_REG_FCR); in mlb_usio_tx_chars()
80 writeb(readb(port->membase + MLB_USIO_REG_SCR) & in mlb_usio_tx_chars()
[all …]
Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
94 #define AUTO_ENAB 0x20 /* Auto Enables */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
181 /* Write Register 12 (lower byte of baud rate generator time constant) */
183 /* Write Register 13 (upper byte of baud rate generator time constant) */
186 #define BRENAB 1 /* Baud rate generator enable */
187 #define BRSRC 2 /* Baud rate generator source */
[all …]
Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
113 #define AUTO_ENAB 0x20 /* Auto Enables */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
154 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
156 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
200 /* Write Register 12 (Lower Byte of Baud Rate Generator Time Constant) */
202 /* Write Register 13 (Upper Byte of Baud Rate Generator Time Constant) */
205 #define BRENABL 1 /* Baud rate generator enable */
[all …]
Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
86 #define AUTO_ENAB 0x20 /* Auto Enables */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
130 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
183 /* Write Register 12 (lower byte of baud rate generator time constant) */
185 /* Write Register 13 (upper byte of baud rate generator time constant) */
188 #define BRENAB 1 /* Baud rate generator enable */
189 #define BRSRC 2 /* Baud rate generator source */
[all …]
Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
[all …]
/kernel/linux/linux-4.19/drivers/tty/serial/
Dmxs-auart.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
11 * Copyright 2008-2010 Freescale Semiconductor, Inc.
38 #include <linux/dma-mapping.h>
144 * RW. Receive Timeout Counter Value: number of 8-bit-time to wait before
146 * input is idle, then the watchdog counter will decrement each bit-time. Note
147 * 7-bit-time is added to the programmed value, so a value of zero will set
148 * the counter to 7-bit-time, a value of 0x1 gives 15-bit-time and so on. Also
152 * value is 0x3 (31 bit-time).
155 /* TIMEOUT = (100*7+1)*(1/BAUD) */
[all …]
Dsuncore.c1 // SPDX-License-Identifier: GPL-2.0
32 drv->minor = sunserial_current_minor; in sunserial_register_minors()
33 drv->nr += count; in sunserial_register_minors()
35 if (drv->nr == count) in sunserial_register_minors()
39 drv->tty_driver->name_base = drv->minor - 64; in sunserial_register_minors()
47 drv->nr -= count; in sunserial_unregister_minors()
48 sunserial_current_minor -= count; in sunserial_unregister_minors()
50 if (drv->nr == 0) in sunserial_unregister_minors()
61 drv->cons = con; in sunserial_console_match()
78 con->index = line; in sunserial_console_match()
[all …]
Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
94 #define AUTO_ENAB 0x20 /* Auto Enables */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
181 /* Write Register 12 (lower byte of baud rate generator time constant) */
183 /* Write Register 13 (upper byte of baud rate generator time constant) */
186 #define BRENAB 1 /* Baud rate generator enable */
187 #define BRSRC 2 /* Baud rate generator source */
[all …]
Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
113 #define AUTO_ENAB 0x20 /* Auto Enables */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
154 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
156 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
200 /* Write Register 12 (Lower Byte of Baud Rate Generator Time Constant) */
202 /* Write Register 13 (Upper Byte of Baud Rate Generator Time Constant) */
205 #define BRENABL 1 /* Baud rate generator enable */
[all …]
Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
86 #define AUTO_ENAB 0x20 /* Auto Enables */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
130 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
183 /* Write Register 12 (lower byte of baud rate generator time constant) */
185 /* Write Register 13 (upper byte of baud rate generator time constant) */
188 #define BRENAB 1 /* Baud rate generator enable */
189 #define BRSRC 2 /* Baud rate generator source */
[all …]
Dmax310x.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2016 Alexander Shiyan <shc_work@mail.ru>
49 #define MAX310X_HDPIXDELAY_REG (0x0d) /* Auto transceiver delays */
63 #define MAX310X_BRGCFG_REG (0x1b) /* Baud rate generator conf */
64 #define MAX310X_BRGDIVLSB_REG (0x1c) /* Baud rate divisor LSB */
65 #define MAX310X_BRGDIVMSB_REG (0x1d) /* Baud rate divisor MSB */
102 #define MAX310X_SPCHR_MULTIDROP_BIT (1 << 5) /* 9-bit multidrop addr char */
115 #define MAX310X_MODE1_TXHIZ_BIT (1 << 2) /* TX pin three-state */
116 #define MAX310X_MODE1_RTSHIZ_BIT (1 << 3) /* RTS pin three-state */
119 #define MAX310X_MODE1_AUTOSLEEP_BIT (1 << 6) /* Auto sleep enable */
[all …]
Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dserial.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Rob Herring <robh@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 where N is the port number (non-negative decimal integer) as printed on the
26 cts-gpios:
32 dcd-gpios:
38 dsr-gpios:
44 dtr-gpios:
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/jsm/
Djsm_neo.c1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
43 /* Turn on auto CTS flow control */ in neo_set_cts_flow_control()
47 /* Turn off auto Xon flow control */ in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
[all …]
/kernel/linux/linux-4.19/drivers/tty/serial/jsm/
Djsm_neo.c1 // SPDX-License-Identifier: GPL-2.0+
25 * a non-destructive, read-only location on the Neo card.
27 * In this case, we are reading the DVID (Read-only Device Identification)
32 readb(bd->re_map_membase + 0x8D); in neo_pci_posting_flush()
38 ier = readb(&ch->ch_neo_uart->ier); in neo_set_cts_flow_control()
39 efr = readb(&ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
41 jsm_dbg(PARAM, &ch->ch_bd->pci_dev, "Setting CTSFLOW\n"); in neo_set_cts_flow_control()
43 /* Turn on auto CTS flow control */ in neo_set_cts_flow_control()
47 /* Turn off auto Xon flow control */ in neo_set_cts_flow_control()
51 writeb(0, &ch->ch_neo_uart->efr); in neo_set_cts_flow_control()
[all …]
/kernel/linux/linux-4.19/drivers/usb/serial/
Dcp210x.c1 // SPDX-License-Identifier: GPL-2.0
9 * control thanks to Munir Nassar nassarmu@real-time.com
55 { USB_DEVICE(0x045B, 0x0053) }, /* Renesas RX610 RX-Stick */
56 { USB_DEVICE(0x0471, 0x066A) }, /* AKTAKOM ACE-1001 cable */
57 { USB_DEVICE(0x0489, 0xE000) }, /* Pirelli Broadband S.p.A, DP-L10 SIP/GSM Mobile */
58 { USB_DEVICE(0x0489, 0xE003) }, /* Pirelli Broadband S.p.A, DP-L10 SIP/GSM Mobile */
61 { USB_DEVICE(0x08e6, 0x5501) }, /* Gemalto Prox-PU/CU contactless smartcard reader */
65 { USB_DEVICE(0x0BED, 0x1100) }, /* MEI (TM) Cashflow-SC Bill/Voucher Acceptor */
70 { USB_DEVICE(0x0FDE, 0xCA05) }, /* OWL Wireless Electricity Monitor CM-160 */
71 { USB_DEVICE(0x10A6, 0xAA26) }, /* Knock-off DCU-11 cable */
[all …]
/kernel/linux/linux-5.10/drivers/net/wan/
Dz85230.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
82 #define AUTO_ENAB 0x20 /* Auto Enables */
112 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
121 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
123 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
166 /* Write Register 12 (lower byte of baud rate generator time constant) */
168 /* Write Register 13 (upper byte of baud rate generator time constant) */
171 #define BRENABL 1 /* Baud rate generator enable */
172 #define BRSRC 2 /* Baud rate generator source */
[all …]
/kernel/linux/linux-4.19/Documentation/isdn/
DREADME1 README for the ISDN-subsystem
8 of the ISDN-subsystem.
10 For using the ISDN-subsystem, some additional userlevel programs are
16 /pub/isdn4linux/isdn4k-utils-<VersionNumber>.tar.gz
19 We also have set up a mailing-list:
21 The isdn4linux-project originates in Germany, and therefore by historical
22 reasons, the mailing-list's primary language is german. However mails
29 To write to the mailing-list, write to isdn4linux@listserv.isdn4linux.de
48 to Euro(EDSS1)-type lines. Usually it is simply the phone number.
51 applies to German 1TR6-type lines. This is a one-digit string,
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/8250/
D8250_fintek.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
104 outb(reg, pdata->base_port + ADDR_PORT); in sio_read_reg()
105 return inb(pdata->base_port + DATA_PORT); in sio_read_reg()
110 outb(reg, pdata->base_port + ADDR_PORT); in sio_write_reg()
111 outb(data, pdata->base_port + DATA_PORT); in sio_write_reg()
126 return -EBUSY; in fintek_8250_enter_key()
148 return -ENODEV; in fintek_8250_check_id()
151 return -ENODEV; in fintek_8250_check_id()
165 return -ENODEV; in fintek_8250_check_id()
[all …]

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