Searched +full:clocks +full:- +full:bindings (Results 1 – 25 of 1054) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/ |
| D | dra7-atl.txt | 1 Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
5 functional clock but can be configured to provide different clocks.
7 signals - can compensate the drift between the two ws signal.
9 In order to provide the support for ATL and it's output clocks (which can be used
10 internally within the SoC or external components) two sets of bindings is needed:
14 To be able to integrate the ATL clocks with DT clock tree.
15 Provides ccf level representation of the ATL clocks to be used by drivers.
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
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| D | composite.txt | 3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped composite clock with multiple different sub-types;
16 The binding must provide a list of the component clocks that shall be
17 merged to this clock. The component clocks shall be of one of the
18 "ti,*composite*-clock" types.
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
21 [2] Documentation/devicetree/bindings/clock/ti/mux.txt
22 [3] Documentation/devicetree/bindings/clock/ti/divider.txt
23 [4] Documentation/devicetree/bindings/clock/ti/gate.txt
26 - compatible : shall be: "ti,composite-clock"
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ti/ |
| D | dra7-atl.txt | 1 Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
5 functional clock but can be configured to provide different clocks.
7 signals - can compensate the drift between the two ws signal.
9 In order to provide the support for ATL and it's output clocks (which can be used
10 internally within the SoC or external components) two sets of bindings is needed:
14 To be able to integrate the ATL clocks with DT clock tree.
15 Provides ccf level representation of the ATL clocks to be used by drivers.
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
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| D | composite.txt | 3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped composite clock with multiple different sub-types;
16 The binding must provide a list of the component clocks that shall be
17 merged to this clock. The component clocks shall be of one of the
18 "ti,*composite*-clock" types.
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
21 [2] Documentation/devicetree/bindings/clock/ti/mux.txt
22 [3] Documentation/devicetree/bindings/clock/ti/divider.txt
23 [4] Documentation/devicetree/bindings/clock/ti/gate.txt
26 - compatible : shall be: "ti,composite-clock"
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/ |
| D | brcm,bcm-vc4.txt | 8 - compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4"
11 - compatible: Should be one of "brcm,bcm2835-pixelvalve0",
12 "brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2"
13 - reg: Physical base address and length of the PV's registers
14 - interrupts: The interrupt number
15 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
18 - compatible: Should be "brcm,bcm2835-hvs"
19 - reg: Physical base address and length of the HVS's registers
20 - interrupts: The interrupt number
21 See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | arm,scpi.txt | 2 ----------------------------------------------------------
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
22 See Documentation/devicetree/bindings/mailbox/mailbox.txt
24 client driver bindings.
26 Clock bindings for the clocks based on SCPI Message Protocol
27 ------------------------------------------------------------
34 - compatible : should be "arm,scpi-clocks"
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| D | sp810.txt | 2 -----------------------
6 - compatible: standard compatible string for a Primecell peripheral,
7 see Documentation/devicetree/bindings/arm/primecell.yaml
11 - reg: standard registers property, physical address and size
14 - clock-names: from the common clock bindings, for more details see
15 Documentation/devicetree/bindings/clock/clock-bindings.txt;
18 - clocks: from the common clock bindings, phandle and clock
19 specifier pairs for the entries of clock-names property
21 - #clock-cells: from the common clock bindings;
24 - clock-output-names: from the common clock bindings;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/ |
| D | arm,scpi.txt | 2 ----------------------------------------------------------
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
22 See Documentation/devicetree/bindings/mailbox/mailbox.txt
24 client driver bindings.
26 Clock bindings for the clocks based on SCPI Message Protocol
27 ------------------------------------------------------------
34 - compatible : should be "arm,scpi-clocks"
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| D | sp810.txt | 2 -----------------------
6 - compatible: standard compatible string for a Primecell peripheral,
7 see Documentation/devicetree/bindings/arm/primecell.txt
11 - reg: standard registers property, physical address and size
14 - clock-names: from the common clock bindings, for more details see
15 Documentation/devicetree/bindings/clock/clock-bindings.txt;
18 - clocks: from the common clock bindings, phandle and clock
19 specifier pairs for the entries of clock-names property
21 - #clock-cells: from the common clock bindings;
24 - clock-output-names: from the common clock bindings;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | maxim,max77686.txt | 3 This is a part of device tree bindings of MAX77686/MAX77802/MAX77620
4 multi-function device. More information can be found in MFD DT binding
6 bindings/mfd/max77686.txt for MAX77686 and
7 bindings/mfd/max77802.txt for MAX77802 and
8 bindings/mfd/max77620.txt for MAX77620.
11 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
12 dt-bindings/clock/maxim,max77686.h.
16 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
17 dt-bindings/clock/maxim,max77802.h.
20 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
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| D | samsung,s5pv210-clock.txt | 9 - compatible: should be one of following:
10 - "samsung,s5pv210-clock" : for clock controller of Samsung
12 - "samsung,s5p6442-clock" : for clock controller of Samsung
15 - reg: physical base address of the controller and length of memory mapped
18 - #clock-cells: should be 1.
20 All available clocks are defined as preprocessor macros in
21 dt-bindings/clock/s5pv210.h header and can be used in device tree sources.
23 External clocks:
25 There are several clocks that are generated outside the SoC. It is expected
26 that they are defined using standard clock bindings with following
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| D | exynos4-clock.txt | 9 - compatible: should be one of the following.
10 - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
11 - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
13 - reg: physical base address of the controller and length of memory mapped
16 - #clock-cells: should be 1.
21 All available clocks are defined as preprocessor macros in
22 dt-bindings/clock/exynos4.h header and can be used in device
27 clock: clock-controller@10030000 {
28 compatible = "samsung,exynos4210-clock";
30 #clock-cells = <1>;
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | maxim,max77686.txt | 3 This is a part of device tree bindings of MAX77686/MAX77802/MAX77620
4 multi-function device. More information can be found in MFD DT binding
6 bindings/mfd/max77686.txt for MAX77686 and
7 bindings/mfd/max77802.txt for MAX77802 and
8 bindings/mfd/max77620.txt for MAX77620.
11 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
12 dt-bindings/clock/maxim,max77686.h.
16 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
17 dt-bindings/clock/maxim,max77802.h.
20 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
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| D | samsung,s5pv210-clock.txt | 9 - compatible: should be one of following:
10 - "samsung,s5pv210-clock" : for clock controller of Samsung
12 - "samsung,s5p6442-clock" : for clock controller of Samsung
15 - reg: physical base address of the controller and length of memory mapped
18 - #clock-cells: should be 1.
20 All available clocks are defined as preprocessor macros in
21 dt-bindings/clock/s5pv210.h header and can be used in device tree sources.
23 External clocks:
25 There are several clocks that are generated outside the SoC. It is expected
26 that they are defined using standard clock bindings with following
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| D | exynos4-clock.txt | 9 - compatible: should be one of the following.
10 - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.
11 - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.
13 - reg: physical base address of the controller and length of memory mapped
16 - #clock-cells: should be 1.
21 All available clocks are defined as preprocessor macros in
22 dt-bindings/clock/exynos4.h header and can be used in device
27 clock: clock-controller@10030000 {
28 compatible = "samsung,exynos4210-clock";
30 #clock-cells = <1>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/mediatek/ |
| D | scpsys.txt | 10 The driver implements the Generic PM domain bindings described in
11 power/power-domain.yaml. It provides the power domains defined in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt6765-power.h
15 - include/dt-bindings/power/mt2701-power.h
16 - include/dt-bindings/power/mt2712-power.h
17 - include/dt-bindings/power/mt7622-power.h
20 - compatible: Should be one of:
21 - "mediatek,mt2701-scpsys"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-am654-serdes.txt | 4 - compatible: Should be "ti,phy-am654-serdes"
5 - reg : Address and length of the register set for the device.
6 - #phy-cells: determine the number of cells that should be given in the
9 include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes
12 0 - USB3
13 1 - PCIe0 Lane0
14 2 - ICSS2 SGMII Lane0
16 0 - PCIe1 Lane0
17 1 - PCIe0 Lane1
18 2 - ICSS2 SGMII Lane1
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/mediatek/ |
| D | scpsys.txt | 10 The driver implements the Generic PM domain bindings described in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt2701-power.h
15 - include/dt-bindings/power/mt2712-power.h
16 - include/dt-bindings/power/mt7622-power.h
19 - compatible: Should be one of:
20 - "mediatek,mt2701-scpsys"
21 - "mediatek,mt2712-scpsys"
22 - "mediatek,mt6797-scpsys"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/bcm/ |
| D | brcm,bcm2835-pm.txt | 4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
9 - compatible: Should be "brcm,bcm2835-pm"
10 - reg: Specifies base physical address and size of the two
13 - clocks: a) v3d: The V3D clock from CPRMAN
17 - #reset-cells: Should be 1. This property follows the reset controller
18 bindings[1].
19 - #power-domain-cells: Should be 1. This property follows the power domain
20 bindings[2].
24 - timeout-sec: Contains the watchdog timeout in seconds
25 - system-power-controller: Whether the watchdog is controlling the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | ingenic,lcd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4770-lcd
21 - ingenic,jz4780-lcd
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/media/ |
| D | mediatek-mdp.txt | 6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | mediatek-mdp.txt | 6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/msm/ |
| D | mdp5.txt | 5 This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
6 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
11 - compatible:
12 * "qcom,mdss" - MDSS
13 - reg: Physical base address and length of the controller's registers.
14 - reg-names: The names of register regions. The following regions are required:
17 - interrupts: The interrupt signal from MDSS.
18 - interrupt-controller: identifies the node as an interrupt controller.
19 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
21 - power-domains: a power domain consumer specifier according to
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