| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sram/ |
| D | sram.txt | 1 Generic on-chip SRAM
7 - compatible : mmio-sram or atmel,sama5d2-securam
9 - reg : SRAM iomem address range
11 Reserving sram areas:
12 ---------------------
14 Each child of the sram node specifies a region of reserved memory. Each
18 Following the generic-names recommended practice, node names should
22 Required properties in the sram node:
24 - #address-cells, #size-cells : should use the same values as the root node
25 - ranges : standard definition, should translate from local addresses
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| D | sunxi-sram.txt | 1 Allwinnner SoC SRAM controllers
2 -----------------------------------------------------
4 The SRAM controller found on most Allwinner devices is represented by
5 a regular node for the SRAM controller itself, with sub-nodes
6 reprensenting the SRAM handled by the SRAM controller.
9 ---------------
12 - compatible : should be:
13 - "allwinner,sun4i-a10-sram-controller" (deprecated)
14 - "allwinner,sun4i-a10-system-control"
15 - "allwinner,sun5i-a13-system-control"
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sram/ |
| D | sram.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sram/sram.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
15 Each child of the sram node specifies a region of reserved memory. Each
19 Following the generic-names recommended practice, node names should
25 pattern: "^sram(@.*)?"
30 - mmio-sram
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| D | allwinner,sun4i-a10-system-control.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 System Control Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The SRAM controller found on most Allwinner devices is represented
15 by a regular node for the SRAM controller itself, with sub-nodes
16 representing the SRAM handled by the SRAM controller.
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/sunxi/ |
| D | smp-sram.txt | 1 Allwinner SRAM for smp bringup:
2 ------------------------------------------------
4 Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
9 Therefore a reserved section sub-node has to be added to the mmio-sram
12 Note that this is separate from the Allwinner SRAM controller found in
13 ../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to
14 any device.
16 Also there are no "secure-only" properties. The implementation should
17 check if this SRAM is usable first.
19 Required sub-node properties:
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| /kernel/linux/linux-5.10/drivers/crypto/ccree/ |
| D | cc_sram_mgr.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
8 * cc_sram_mgr_init() - Initializes SRAM pool.
9 * The pool starts right at the beginning of SRAM.
12 * @drvdata: Associated device driver context
20 struct device *dev = drvdata_to_dev(drvdata); in cc_sram_mgr_init()
22 if (drvdata->hw_rev < CC_HW_REV_712) { in cc_sram_mgr_init()
26 dev_err(dev, "Invalid SRAM offset 0x%x\n", start); in cc_sram_mgr_init()
27 return -EINVAL; in cc_sram_mgr_init()
31 drvdata->sram_free_offset = start; in cc_sram_mgr_init()
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| D | cc_sram_mgr.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
13 #define NULL_SRAM_ADDR ((u32)-1)
16 * cc_sram_mgr_init() - Initializes SRAM pool.
17 * The first X bytes of SRAM are reserved for ROM usage, hence, pool
20 * @drvdata: Associated device driver context
28 * cc_sram_alloc() - Allocate buffer from SRAM pool.
30 * @drvdata: Associated device driver context
34 * Address offset in SRAM or NULL_SRAM_ADDR for failure.
39 * cc_set_sram_desc() - Create const descriptors sequence to
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | cache_sram.txt | 1 * Freescale PQ3 and QorIQ based Cache SRAM
5 as SRAM. This cache SRAM representation in the device
6 tree should be done as under:-
10 - compatible : should be "fsl,p2020-cache-sram"
11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
12 - reg : offset and length of the cache-sram.
16 cache-sram@fff00000 {
17 fsl,cache-sram-ctlr-handle = <&L2>;
19 compatible = "fsl,p2020-cache-sram";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | cache_sram.txt | 1 * Freescale PQ3 and QorIQ based Cache SRAM
5 as SRAM. This cache SRAM representation in the device
6 tree should be done as under:-
10 - compatible : should be "fsl,p2020-cache-sram"
11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
12 - reg : offset and length of the cache-sram.
16 cache-sram@fff00000 {
17 fsl,cache-sram-ctlr-handle = <&L2>;
19 compatible = "fsl,p2020-cache-sram";
|
| /kernel/linux/linux-5.10/drivers/soc/sunxi/ |
| D | sunxi_sram.c | 2 * Allwinner SoCs SRAM Controller Driver
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
76 SUNXI_SRAM_MAP(1, 1, "usb-otg")),
87 .compatible = "allwinner,sun4i-a10-sram-a3-a4",
91 .compatible = "allwinner,sun4i-a10-sram-c1",
95 .compatible = "allwinner,sun4i-a10-sram-d",
99 .compatible = "allwinner,sun50i-a64-sram-c",
105 static struct device *sram_dev;
119 seq_puts(s, "Allwinner sunXi SRAM\n"); in sunxi_sram_show()
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| /kernel/linux/linux-5.10/drivers/memory/ |
| D | ti-emif-pm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI AM33XX SRAM EMIF Driver
5 * Copyright (C) 2016-2017 Texas Instruments Inc.
17 #include <linux/sram.h>
18 #include <linux/ti-emif-sram.h>
22 #define TI_EMIF_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
43 return (emif_data->ti_emif_sram_virt + in sram_suspend_address()
50 return ((unsigned long)emif_data->ti_emif_sram_phys + in sram_resume_address()
56 gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt, in ti_emif_free_sram()
58 gen_pool_free(emif_data->sram_pool_data, in ti_emif_free_sram()
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
11 for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
34 bool "Atmel (Multi-port DDR-)SDRAM Controller"
39 This driver is for Atmel SDRAM Controller or Atmel Multi-port
40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
42 LP-DDR memories.
53 Used to configure the EBI (external bus interface) when the device-
70 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
74 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
75 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
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| /kernel/linux/linux-4.19/drivers/crypto/ccree/ |
| D | cc_sram_mgr.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
8 * struct cc_sram_ctx -Internal RAM context manager
9 * @sram_free_offset: the offset to the non-allocated area
16 * cc_sram_mgr_fini() - Cleanup SRAM pool.
18 * @drvdata: Associated device driver context
23 kfree(drvdata->sram_mgr_handle); in cc_sram_mgr_fini()
27 * cc_sram_mgr_init() - Initializes SRAM pool.
28 * The pool starts right at the beginning of SRAM.
31 * @drvdata: Associated device driver context
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| /kernel/linux/linux-4.19/drivers/soc/sunxi/ |
| D | sunxi_sram.c | 2 * Allwinner SoCs SRAM Controller Driver
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
76 SUNXI_SRAM_MAP(1, 1, "usb-otg")),
87 .compatible = "allwinner,sun4i-a10-sram-a3-a4",
91 .compatible = "allwinner,sun4i-a10-sram-c1",
95 .compatible = "allwinner,sun4i-a10-sram-d",
99 .compatible = "allwinner,sun50i-a64-sram-c",
105 static struct device *sram_dev;
119 seq_puts(s, "Allwinner sunXi SRAM\n"); in sunxi_sram_show()
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| /kernel/linux/linux-4.19/drivers/memory/ |
| D | ti-emif-pm.c | 2 * TI AM33XX SRAM EMIF Driver
4 * Copyright (C) 2016-2017 Texas Instruments Inc.
25 #include <linux/sram.h>
26 #include <linux/ti-emif-sram.h>
30 #define TI_EMIF_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
51 return (emif_data->ti_emif_sram_virt + in sram_suspend_address()
58 return ((unsigned long)emif_data->ti_emif_sram_phys + in sram_resume_address()
64 gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt, in ti_emif_free_sram()
66 gen_pool_free(emif_data->sram_pool_data, in ti_emif_free_sram()
67 emif_data->ti_emif_sram_data_virt, in ti_emif_free_sram()
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| D | Kconfig | 19 bool "Atmel (Multi-port DDR-)SDRAM Controller"
23 This driver is for Atmel SDRAM Controller or Atmel Multi-port
24 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
26 LP-DDR memories.
36 Used to configure the EBI (external bus interface) when the device-
46 is intended to provide a glue-less interface to a variety of
60 functions of the driver includes re-configuring AC timing
71 memory drives like NOR, NAND, OneNAND, SRAM.
88 tristate "Texas Instruments EMIF SRAM driver"
89 depends on (SOC_AM33XX || SOC_AM43XX) && SRAM
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/ |
| D | arm,scmi.txt | 2 ----------------------------------------------------------
11 the device tree.
17 - compatible : shall be "arm,scmi"
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
31 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
40 Each protocol supported shall have a sub-node with corresponding compatible
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | sram.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * OMAP SRAM detection and management
9 * Copyright (C) 2009-2012 Texas Instruments
10 * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
28 #include "sram.h"
47 #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
55 * SRAM varies. The default accessible size for all device types is 2k. A GP
56 * device allows ARM11 but not other initiators for full size. This
64 writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ in is_sram_locked()
65 writel_relaxed(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ in is_sram_locked()
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| /kernel/linux/linux-4.19/arch/arm/mach-omap2/ |
| D | sram.c | 3 * OMAP SRAM detection and management
8 * Copyright (C) 2009-2012 Texas Instruments
9 * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
31 #include "sram.h"
50 #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
58 * SRAM varies. The default accessible size for all device types is 2k. A GP
59 * device allows ARM11 but not other initiators for full size. This
67 writel_relaxed(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */ in is_sram_locked()
68 writel_relaxed(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ in is_sram_locked()
69 writel_relaxed(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ in is_sram_locked()
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| /kernel/linux/linux-5.10/arch/arm/mach-rockchip/ |
| D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
52 struct device *dev = get_cpu_device(cpu); in rockchip_get_core_reset()
55 /* The cpu device is only available after the initial core bringup */ in rockchip_get_core_reset()
57 np = dev->of_node; in rockchip_get_core_reset()
92 ret = -1; in pmu_set_power_domain()
121 pr_err("%s: sram or pmu missing for cpu boot\n", __func__); in rockchip_boot_secondary()
122 return -ENXIO; in rockchip_boot_secondary()
128 return -ENXIO; in rockchip_boot_secondary()
146 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary()
159 * rockchip_smp_prepare_sram - populate necessary sram block
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| /kernel/linux/linux-4.19/arch/arm/mach-rockchip/ |
| D | platsmp.c | 61 struct device *dev = get_cpu_device(cpu); in rockchip_get_core_reset()
64 /* The cpu device is only available after the initial core bringup */ in rockchip_get_core_reset()
66 np = dev->of_node; in rockchip_get_core_reset()
101 ret = -1; in pmu_set_power_domain()
130 pr_err("%s: sram or pmu missing for cpu boot\n", __func__); in rockchip_boot_secondary()
131 return -ENXIO; in rockchip_boot_secondary()
137 return -ENXIO; in rockchip_boot_secondary()
155 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary()
168 * rockchip_smp_prepare_sram - populate necessary sram block
169 * Starting cores execute the code residing at the start of the on-chip sram
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | allwinner,sun4i-a10-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
10 - $ref: "ethernet-controller.yaml#"
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
18 const: allwinner,sun4i-a10-emac
29 allwinner,sram:
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | arm,scmi.txt | 2 ----------------------------------------------------------
11 the device tree.
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 3 EMIF - External Memory Interface - is an SDRAM controller used in
11 - compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
14 "ti,emif-am3352"
15 "ti,emif-am4372"
16 "ti,emif-dra7xx"
17 "ti,emif-keystone"
19 - phy-type : <u32> indicating the DDR phy type. Following are the
24 - device-handle : phandle to a "lpddr2" node representing the memory part
26 - ti,hwmods : For TI hwmods processing and omap device creation
29 - interrupts : interrupt used by the controller
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 3 EMIF - External Memory Interface - is an SDRAM controller used in
11 - compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
14 "ti,emif-am3352"
15 "ti,emif-am4372"
16 "ti,emif-dra7xx"
17 "ti,emif-keystone"
19 - phy-type : <u32> indicating the DDR phy type. Following are the
24 - device-handle : phandle to a "lpddr2" node representing the memory part
26 - ti,hwmods : For TI hwmods processing and omap device creation
29 - interrupts : interrupt used by the controller
[all …]
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