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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/crypto/
Dst,stm32-hash.txt4 - compatible: Should contain entries for this and backward compatible
6 - "st,stm32f456-hash" for stm32 F456.
7 - "st,stm32f756-hash" for stm32 F756.
8 - reg: The address and length of the peripheral registers space
9 - interrupts: the interrupt specifier for the HASH
10 - clocks: The input clock of the HASH instance
13 - resets: The input reset of the HASH instance
14 - dmas: DMA specifiers for the HASH. See the DMA client binding,
15 Documentation/devicetree/bindings/dma/dma.txt
16 - dma-names: DMA request name. Should be "in" if a dma is present.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dst,stm32-hash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lionel Debieve <lionel.debieve@st.com>
15 - st,stm32f456-hash
16 - st,stm32f756-hash
33 dma-names:
35 - const: in
37 dma-maxburst:
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/kernel/linux/linux-5.10/drivers/dma/
Dzx_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
22 #include "virt-dma.h"
24 #define DRIVER_NAME "zx-dma"
26 #define DMA_MAX_SIZE (0x10000 - 512)
142 val = readl_relaxed(phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
145 writel_relaxed(val, phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
147 val = 0x1 << phy->idx; in zx_dma_terminate_chan()
148 writel_relaxed(val, d->base + REG_ZX_TC_IRQ_RAW); in zx_dma_terminate_chan()
149 writel_relaxed(val, d->base + REG_ZX_SRC_ERR_IRQ_RAW); in zx_dma_terminate_chan()
[all …]
Duniphier-xdmac.c1 // SPDX-License-Identifier: GPL-2.0
3 * External DMA controller driver for UniPhier SoCs
18 #include "virt-dma.h"
115 /* xc->vc.lock must be held by caller */
121 vd = vchan_next_desc(&xc->vc); in uniphier_xdmac_next_desc()
125 list_del(&vd->node); in uniphier_xdmac_next_desc()
130 /* xc->vc.lock must be held by caller */
139 src_addr = xd->nodes[xd->cur_node].src; in uniphier_xdmac_chan_start()
140 dst_addr = xd->nodes[xd->cur_node].dst; in uniphier_xdmac_chan_start()
141 its = xd->nodes[xd->cur_node].burst_size; in uniphier_xdmac_chan_start()
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Didma64.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Core driver for the Intel integrated DMA 64-bit
12 #include <linux/dma-mapping.h>
19 #include <linux/dma/idma64.h>
26 /* ---------------------------------------------------------------------- */
30 return &chan->dev->device; in chan2dev()
33 /* ---------------------------------------------------------------------- */
41 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
42 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask); in idma64_off()
43 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask); in idma64_off()
[all …]
Dat_hdmac_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Header file for the Atmel AHB DMA Controller driver
10 #include <linux/platform_data/dma-atmel.h>
16 #define AT_DMA_IF_BIGEND(i) (0x1 << (i)) /* AHB-Lite Interface i in Big-endian mode */
81 #define ATC_DSCR_IF(i) (0x3 & (i)) /* Dsc feched via AHB-Lite Interface i */
120 #define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */
121 #define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */
126 #define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */
127 #define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */
131 #define ATC_FC_MEM2MEM (0x0 << 21) /* Mem-to-Mem (DMA) */
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Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
22 #include <linux/dma/pxa-dma.h>
25 #include "virt-dma.h"
36 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
38 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
39 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
64 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
71 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
74 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
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/kernel/linux/linux-4.19/drivers/dma/
Dzx_dma.c11 #include <linux/dma-mapping.h>
25 #include "virt-dma.h"
27 #define DRIVER_NAME "zx-dma"
29 #define DMA_MAX_SIZE (0x10000 - 512)
145 val = readl_relaxed(phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
148 writel_relaxed(val, phy->base + REG_ZX_CTRL); in zx_dma_terminate_chan()
150 val = 0x1 << phy->idx; in zx_dma_terminate_chan()
151 writel_relaxed(val, d->base + REG_ZX_TC_IRQ_RAW); in zx_dma_terminate_chan()
152 writel_relaxed(val, d->base + REG_ZX_SRC_ERR_IRQ_RAW); in zx_dma_terminate_chan()
153 writel_relaxed(val, d->base + REG_ZX_DST_ERR_IRQ_RAW); in zx_dma_terminate_chan()
[all …]
Dat_hdmac_regs.h2 * Header file for the Atmel AHB DMA Controller driver
14 #include <linux/platform_data/dma-atmel.h>
20 #define AT_DMA_IF_BIGEND(i) (0x1 << (i)) /* AHB-Lite Interface i in Big-endian mode */
85 #define ATC_DSCR_IF(i) (0x3 & (i)) /* Dsc feched via AHB-Lite Interface i */
124 #define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */
125 #define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */
130 #define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */
131 #define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */
135 #define ATC_FC_MEM2MEM (0x0 << 21) /* Mem-to-Mem (DMA) */
136 #define ATC_FC_MEM2PER (0x1 << 21) /* Mem-to-Periph (DMA) */
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Ddma-jz4740.c2 * Copyright (C) 2013, Lars-Peter Clausen <lars@metafoo.de>
13 #include <linux/dma-mapping.h>
24 #include "virt-dma.h"
135 return container_of(chan->vchan.chan.device, struct jz4740_dma_dev, in jz4740_dma_chan_get_dev()
152 return readl(dmadev->base + reg); in jz4740_dma_read()
158 writel(val, dmadev->base + reg); in jz4740_dma_write()
192 static enum jz4740_dma_transfer_size jz4740_dma_maxburst(u32 maxburst) in jz4740_dma_maxburst() argument
194 if (maxburst <= 1) in jz4740_dma_maxburst()
196 else if (maxburst <= 3) in jz4740_dma_maxburst()
198 else if (maxburst <= 15) in jz4740_dma_maxburst()
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Didma64.c2 * Core driver for the Intel integrated DMA 64-bit
15 #include <linux/dma-mapping.h>
30 /* ---------------------------------------------------------------------- */
34 return &chan->dev->device; in chan2dev()
37 /* ---------------------------------------------------------------------- */
45 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
46 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask); in idma64_off()
47 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask); in idma64_off()
48 channel_clear_bit(idma64, MASK(DST_TRAN), idma64->all_chan_mask); in idma64_off()
49 channel_clear_bit(idma64, MASK(ERROR), idma64->all_chan_mask); in idma64_off()
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Dk3dma.c2 * Copyright (c) 2013 - 2015 Linaro Ltd.
11 #include <linux/dma-mapping.h>
26 #include "virt-dma.h"
28 #define DRIVER_NAME "k3-dma"
131 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
133 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
135 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
137 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
147 val = 0x1 << phy->idx; in k3_dma_terminate_chan()
148 writel_relaxed(val, d->base + INT_TC1_RAW); in k3_dma_terminate_chan()
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Dpxa_dma.c14 #include <linux/dma-mapping.h>
25 #include <linux/dma/pxa-dma.h>
28 #include "virt-dma.h"
39 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
41 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
42 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
67 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
74 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
77 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
97 struct pxad_desc_hw *hw_desc[]; /* DMA coherent descriptors */
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/kernel/linux/linux-4.19/sound/soc/pxa/
Dpxa2xx-ac97.c2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
18 #include <linux/dma/pxa-dma.h>
23 #include <sound/pxa2xx-lib.h>
27 #include <mach/regs-ac97.h>
49 ret = pxa2xx_ac97_read(ac97->num, reg); in pxa2xx_ac97_legacy_read()
61 ret = pxa2xx_ac97_write(ac97->num, reg, val); in pxa2xx_ac97_legacy_write()
75 .maxburst = 32,
82 .maxburst = 32,
89 .maxburst = 16,
96 .maxburst = 16,
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/kernel/linux/linux-4.19/sound/soc/fsl/
Dfsl_asrc_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale ASRC ALSA SoC Platform (DMA) driver
9 #include <linux/dma-mapping.h>
11 #include <linux/platform_data/dma-imx.h>
39 chan->private = param; in filter()
47 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dma_complete()
48 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dma_complete()
50 pair->pos += snd_pcm_lib_period_bytes(substream); in fsl_asrc_dma_complete()
51 if (pair->pos >= snd_pcm_lib_buffer_bytes(substream)) in fsl_asrc_dma_complete()
52 pair->pos = 0; in fsl_asrc_dma_complete()
[all …]
/kernel/linux/linux-5.10/sound/soc/pxa/
Dpxa2xx-ac97.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
15 #include <linux/dma/pxa-dma.h>
21 #include <sound/pxa2xx-lib.h>
25 #include <mach/regs-ac97.h>
65 .maxburst = 32,
72 .maxburst = 32,
79 .maxburst = 16,
86 .maxburst = 16,
93 .maxburst = 16,
[all …]
/kernel/linux/linux-5.10/sound/soc/fsl/
Dfsl_asrc_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale ASRC ALSA SoC Platform (DMA) driver
9 #include <linux/dma-mapping.h>
11 #include <linux/platform_data/dma-imx.h>
37 chan->private = param; in filter()
45 struct snd_pcm_runtime *runtime = substream->runtime; in fsl_asrc_dma_complete()
46 struct fsl_asrc_pair *pair = runtime->private_data; in fsl_asrc_dma_complete()
48 pair->pos += snd_pcm_lib_period_bytes(substream); in fsl_asrc_dma_complete()
49 if (pair->pos >= snd_pcm_lib_buffer_bytes(substream)) in fsl_asrc_dma_complete()
50 pair->pos = 0; in fsl_asrc_dma_complete()
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/kernel/linux/linux-4.19/include/sound/
Ddmaengine_pcm.h1 /* SPDX-License-Identifier: GPL-2.0+
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
15 * snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
22 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in snd_pcm_substream_to_dma_direction()
47 * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
49 * the supported sample formats and set the DMA transfer size to undefined.
57 * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
60 * @maxburst: Maximum number of words(note: words, as in units of the
63 * @slave_id: Slave requester id for the DMA channel.
64 * @filter_data: Custom DMA channel filter data, this will usually be used when
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/kernel/linux/linux-5.10/include/sound/
Ddmaengine_pcm.h1 /* SPDX-License-Identifier: GPL-2.0+
4 * Author: Lars-Peter Clausen <lars@metafoo.de>
15 * snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
22 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in snd_pcm_substream_to_dma_direction()
47 * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
49 * the supported sample formats and set the DMA transfer size to undefined.
57 * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
60 * @maxburst: Maximum number of words(note: words, as in units of the
63 * @slave_id: Slave requester id for the DMA channel.
64 * @filter_data: Custom DMA channel filter data, this will usually be used when
[all …]
/kernel/linux/linux-4.19/drivers/usb/gadget/udc/
Dmv_u3d_core.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-mapping.h>
57 ep = &u3d->eps[i]; in mv_u3d_ep0_reset()
58 ep->u3d = u3d; in mv_u3d_ep0_reset()
61 ep->ep_context = &u3d->ep_context[1]; in mv_u3d_ep0_reset()
66 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
68 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
71 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
78 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr1); in mv_u3d_ep0_reset()
81 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxincr0); in mv_u3d_ep0_reset()
[all …]
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
Dmv_u3d_core.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-mapping.h>
56 ep = &u3d->eps[i]; in mv_u3d_ep0_reset()
57 ep->u3d = u3d; in mv_u3d_ep0_reset()
60 ep->ep_context = &u3d->ep_context[1]; in mv_u3d_ep0_reset()
65 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
67 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
70 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr0); in mv_u3d_ep0_reset()
77 iowrite32(epxcr, &u3d->vuc_regs->epcr[0].epxoutcr1); in mv_u3d_ep0_reset()
80 epxcr = ioread32(&u3d->vuc_regs->epcr[0].epxincr0); in mv_u3d_ep0_reset()
[all …]
/kernel/linux/linux-4.19/drivers/spi/
Dspi-stm32.c4 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
126 * struct stm32_spi - private data of the SPI controller
136 * @cur_midi: master inter-data idleness in ns
142 * @cur_usedma: boolean to know if dma is used in current transfer
147 * @dma_tx: dma channel for TX transfer
148 * @dma_rx: dma channel for RX transfer
182 writel_relaxed(readl_relaxed(spi->base + offset) | bits, in stm32_spi_set_bits()
183 spi->base + offset); in stm32_spi_set_bits()
189 writel_relaxed(readl_relaxed(spi->base + offset) & ~bits, in stm32_spi_clr_bits()
190 spi->base + offset); in stm32_spi_clr_bits()
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/kernel/linux/linux-5.10/drivers/usb/cdns3/
Dtrace.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2018-2019 Cadence.
31 __string(name, ep_priv->name)
36 __assign_str(name, ep_priv->name);
37 __entry->halt = halt;
38 __entry->flush = flush;
40 TP_printk("Halt %s for %s: %s", __entry->flush ? " and flush" : "",
41 __get_str(name), __entry->halt ? "set" : "cleared")
48 __string(ep_name, ep_priv->name)
52 __assign_str(ep_name, ep_priv->name);
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
173 * use PIO for small transfers, avoiding DMA setup/teardown overhead for drivers
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
193 * @dma_rx_en: SPI DMA RX enable register end SPI DMA RX enable bit
194 * @dma_tx_en: SPI DMA TX enable register end SPI DMA TX enable bit
217 * struct stm32_spi_cfg - stm32 compatible configuration data
229 * @can_dma: routine to determine if the transfer is eligible for DMA use
231 * using DMA
[all …]
/kernel/linux/linux-5.10/drivers/usb/mtu3/
Dmtu3_trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3_trace.h - trace support
32 vsnprintf(__get_str(msg), MTU3_MSG_MAX, vaf->fmt, *vaf->va);
44 __entry->intr = intr;
46 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
47 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
48 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
49 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
50 __entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",
51 __entry->intr & VBUS_RISE_INTR ? "VBUS_RISE" : "",
[all …]

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