| /kernel/linux/linux-4.19/drivers/gpu/drm/exynos/ |
| D | exynos_dp.c | 2 * Samsung SoC DP (Display Port) interface driver.
30 #include <drm/bridge/analogix_dp.h>
52 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_crtc_clock_enable() local
53 struct drm_encoder *encoder = &dp->encoder; in exynos_dp_crtc_clock_enable()
55 if (!encoder->crtc) in exynos_dp_crtc_clock_enable()
56 return -EPERM; in exynos_dp_crtc_clock_enable()
58 exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable); in exynos_dp_crtc_clock_enable()
76 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_get_modes() local
80 if (dp->plat_data.panel) in exynos_dp_get_modes()
83 mode = drm_mode_create(connector->dev); in exynos_dp_get_modes()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | exynos_dp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Samsung SoC DP (Display Port) interface driver.
20 #include <drm/bridge/analogix_dp.h>
50 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_crtc_clock_enable() local
51 struct drm_encoder *encoder = &dp->encoder; in exynos_dp_crtc_clock_enable()
53 if (!encoder->crtc) in exynos_dp_crtc_clock_enable()
54 return -EPERM; in exynos_dp_crtc_clock_enable()
56 exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable); in exynos_dp_crtc_clock_enable()
74 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_get_modes() local
78 if (dp->plat_data.panel) in exynos_dp_get_modes()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Analogix DP (Display Port) core interface driver.
21 #include <drm/bridge/analogix_dp.h>
43 static int analogix_dp_init_dp(struct analogix_dp_device *dp) in analogix_dp_init_dp() argument
47 analogix_dp_reset(dp); in analogix_dp_init_dp()
49 analogix_dp_swreset(dp); in analogix_dp_init_dp()
51 analogix_dp_init_analog_param(dp); in analogix_dp_init_dp()
52 analogix_dp_init_interrupt(dp); in analogix_dp_init_dp()
55 analogix_dp_enable_sw_function(dp); in analogix_dp_init_dp()
57 analogix_dp_config_interrupt(dp); in analogix_dp_init_dp()
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| D | analogix-anx78xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "analogix-anx78xx.h"
68 struct drm_bridge bridge; member
93 static inline struct anx78xx *bridge_to_anx78xx(struct drm_bridge *bridge) in bridge_to_anx78xx() argument
95 return container_of(bridge, struct anx78xx, bridge); in bridge_to_anx78xx()
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg); in anx78xx_aux_transfer()
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_set_hpd()
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_set_hpd()
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_clear_hpd()
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_clear_hpd()
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| D | analogix-anx6345.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #include "analogix-i2c-dptx.h"
33 #include "analogix-i2c-txcommon.h"
49 struct drm_bridge bridge; member
74 static inline struct anx6345 *bridge_to_anx6345(struct drm_bridge *bridge) in bridge_to_anx6345() argument
76 return container_of(bridge, struct anx6345, bridge); in bridge_to_anx6345()
94 return anx_dp_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg); in anx6345_aux_transfer()
103 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], in anx6345_dp_link_training()
109 err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw); in anx6345_dp_link_training()
119 DRM_DEBUG_KMS("DP bandwidth (%#02x) not supported\n", dp_bw); in anx6345_dp_link_training()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_core.c | 2 * Analogix DP (Display Port) core interface driver.
32 #include <drm/bridge/analogix_dp.h>
46 static int analogix_dp_init_dp(struct analogix_dp_device *dp) in analogix_dp_init_dp() argument
50 analogix_dp_reset(dp); in analogix_dp_init_dp()
52 analogix_dp_swreset(dp); in analogix_dp_init_dp()
54 analogix_dp_init_analog_param(dp); in analogix_dp_init_dp()
55 analogix_dp_init_interrupt(dp); in analogix_dp_init_dp()
58 analogix_dp_enable_sw_function(dp); in analogix_dp_init_dp()
60 analogix_dp_config_interrupt(dp); in analogix_dp_init_dp()
61 ret = analogix_dp_init_analog_func(dp); in analogix_dp_init_dp()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/ |
| D | megachips-stdpxxxx-ge-b850v3-fw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
4 * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
10 * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
11 * display bridge of the GE B850v3. There are two physical bridges on the video
12 * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
19 * Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
61 struct drm_bridge bridge; member
70 struct i2c_adapter *adapter = client->adapter; in stdp2690_get_edid()
77 .addr = client->addr, in stdp2690_get_edid()
[all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 Bridge registration and lookup framework.
14 DRM bridge wrapper of DRM panels
20 tristate "Cadence DPI/DSI bridge"
27 Support Cadence DPI to DSI bridge. This is an internal
28 bridge and is meant to be directly embedded in a SoC.
44 Driver for display connectors with support for DDC and hot-plug
48 on ARM-based platforms. Saying Y here when this driver is not needed
52 tristate "Lontium LT9611 DSI/HDMI bridge"
60 Driver for Lontium LT9611 DSI to HDMI bridge
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| D | ti-sn65dsi86.c | 1 // SPDX-License-Identifier: GPL-2.0
110 * struct ti_sn_bridge - Platform data for ti-sn65dsi86 driver.
114 * @bridge: Our bridge.
121 * @enable_gpio: The GPIO we toggle to enable the bridge.
125 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
129 * serves double-duty of keeping track of the direction and
135 * each other's read-modify-write.
141 struct drm_bridge bridge; member
179 regmap_write(pdata->regmap, reg, val & 0xFF); in ti_sn_bridge_write_u16()
180 regmap_write(pdata->regmap, reg + 1, val >> 8); in ti_sn_bridge_write_u16()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/ |
| D | cdns,mhdp8546.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence MHDP8546 bridge
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
23 - description:
[all …]
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| D | toshiba,tc358767.txt | 1 Toshiba TC358767 eDP bridge bindings
4 - compatible: "toshiba,tc358767"
5 - reg: i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
6 - clock-names: should be "ref"
7 - clocks: OF device-tree clock specification for refclk input. The reference
11 - shutdown-gpios: OF device-tree gpio specification for SD pin
13 - reset-gpios: OF device-tree gpio specification for RSTX pin
15 - toshiba,hpd-pin: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
16 - ports: the ports node can contain video interface port nodes to connect
17 to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
[all …]
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| D | analogix_dp.txt | 1 Analogix Display Port bridge bindings
3 Required properties for dp-controller:
4 -compatible:
6 * "samsung,exynos5-dp"
7 * "rockchip,rk3288-dp"
8 * "rockchip,rk3399-edp"
9 -reg:
12 -interrupts:
14 -clocks:
15 from common clock binding: handle to dp clock.
[all …]
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| /kernel/linux/linux-4.19/drivers/gpu/drm/bridge/ |
| D | megachips-stdpxxxx-ge-b850v3-fw.c | 2 * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
3 * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
20 * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
21 * display bridge of the GE B850v3. There are two physical bridges on the video
22 * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
29 * Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
71 struct drm_bridge bridge; member
81 struct i2c_adapter *adapter = client->adapter; in stdp2690_get_edid()
88 .addr = client->addr, in stdp2690_get_edid()
93 .addr = client->addr, in stdp2690_get_edid()
[all …]
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| D | Kconfig | 5 Bridge registration and lookup framework.
13 DRM bridge wrapper of DRM panels
19 tristate "Analogix ANX78XX bridge"
22 ---help---
23 ANX78XX is an ultra-low Full-HD SlimPort transmitter
29 tristate "Cadence DPI/DSI bridge"
35 Support Cadence DPI to DSI bridge. This is an internal
36 bridge and is meant to be directly embedded in a SoC.
39 tristate "Dumb VGA DAC Bridge support"
43 Support for non-programmable RGB to VGA DAC bridges, such as ADI
[all …]
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| /kernel/linux/linux-5.10/net/dsa/ |
| D | dsa_priv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * net/dsa/dsa_priv.h - Hardware switch handling
4 * Copyright (c) 2008-2009 Marvell Semiconductor
86 struct dsa_port *dp; member
119 struct dsa_port *cpu_dp = dev->dsa_ptr; in dsa_master_find_slave()
120 struct dsa_switch_tree *dst = cpu_dp->dst; in dsa_master_find_slave()
121 struct dsa_port *dp; in dsa_master_find_slave() local
123 list_for_each_entry(dp, &dst->ports, list) in dsa_master_find_slave()
124 if (dp->ds->index == device && dp->index == port && in dsa_master_find_slave()
125 dp->type == DSA_PORT_TYPE_USER) in dsa_master_find_slave()
[all …]
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| D | port.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2017 Savoir-faire Linux Inc.
22 struct raw_notifier_head *nh = &dst->nh; in dsa_broadcast()
33 static int dsa_port_notify(const struct dsa_port *dp, unsigned long e, void *v) in dsa_port_notify() argument
35 struct raw_notifier_head *nh = &dp->ds->dst->nh; in dsa_port_notify()
43 int dsa_port_set_state(struct dsa_port *dp, u8 state, in dsa_port_set_state() argument
46 struct dsa_switch *ds = dp->ds; in dsa_port_set_state()
47 int port = dp->index; in dsa_port_set_state()
50 return ds->ops->port_stp_state_set ? 0 : -EOPNOTSUPP; in dsa_port_set_state()
52 if (ds->ops->port_stp_state_set) in dsa_port_set_state()
[all …]
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| D | slave.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * net/dsa/slave.c - Slave device handling
4 * Copyright (c) 2008-2009 Marvell Semiconductor
28 struct dsa_switch *ds = bus->priv; in dsa_slave_phy_read()
30 if (ds->phys_mii_mask & (1 << addr)) in dsa_slave_phy_read()
31 return ds->ops->phy_read(ds, addr, reg); in dsa_slave_phy_read()
38 struct dsa_switch *ds = bus->priv; in dsa_slave_phy_write()
40 if (ds->phys_mii_mask & (1 << addr)) in dsa_slave_phy_write()
41 return ds->ops->phy_write(ds, addr, reg, val); in dsa_slave_phy_write()
48 ds->slave_mii_bus->priv = (void *)ds; in dsa_slave_mii_bus_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/cadence/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Cadence DPI/DP bridge"
8 Support Cadence DPI to DP bridge. This is an internal
9 bridge and is meant to be directly embedded in a SoC.
11 in DP format.
17 bool "J721E Cadence DPI/DP wrapper support"
20 Support J721E Cadence DPI/DP wrapper. This is a wrapper
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| D | cdns-mhdp8546-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence MHDP8546 DP bridge driver.
7 * Authors: Quentin Schulz <quentin.schulz@free-electrons.com>
14 * - Implement optimized mailbox communication using mailbox interrupts
15 * - Add support for power management
16 * - Add support for features like audio, MST and fast link training
17 * - Implement request_fw_cancel to handle HW_STATE
18 * - Fix asynchronous loading of firmware implementation
19 * - Add DRM helper function for cdns_mhdp_lower_link_rate
33 #include <linux/phy/phy-dp.h>
[all …]
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| /kernel/linux/linux-4.19/net/dsa/ |
| D | port.c | 4 * Copyright (c) 2017 Savoir-faire Linux Inc.
20 static int dsa_port_notify(const struct dsa_port *dp, unsigned long e, void *v) in dsa_port_notify() argument
22 struct raw_notifier_head *nh = &dp->ds->dst->nh; in dsa_port_notify()
30 int dsa_port_set_state(struct dsa_port *dp, u8 state, in dsa_port_set_state() argument
33 struct dsa_switch *ds = dp->ds; in dsa_port_set_state()
34 int port = dp->index; in dsa_port_set_state()
37 return ds->ops->port_stp_state_set ? 0 : -EOPNOTSUPP; in dsa_port_set_state()
39 if (ds->ops->port_stp_state_set) in dsa_port_set_state()
40 ds->ops->port_stp_state_set(ds, port, state); in dsa_port_set_state()
42 if (ds->ops->port_fast_age) { in dsa_port_set_state()
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/display/bridge/ |
| D | toshiba,tc358767.txt | 1 Toshiba TC358767 eDP bridge bindings
4 - compatible: "toshiba,tc358767"
5 - reg: i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
6 - clock-names: should be "ref"
7 - clocks: OF device-tree clock specification for refclk input. The reference
11 - shutdown-gpios: OF device-tree gpio specification for SD pin
13 - reset-gpios: OF device-tree gpio specification for RSTX pin
15 - ports: the ports node can contain video interface port nodes to connect
16 to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
17 - port@0: DSI input port
[all …]
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| D | analogix_dp.txt | 1 Analogix Display Port bridge bindings
3 Required properties for dp-controller:
4 -compatible:
6 * "samsung,exynos5-dp"
7 * "rockchip,rk3288-dp"
8 * "rockchip,rk3399-edp"
9 -reg:
12 -interrupts:
14 -clocks:
15 from common clock binding: handle to dp clock.
[all …]
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| /kernel/linux/linux-5.10/tools/testing/selftests/drivers/net/mlxsw/ |
| D | devlink_trap_l3_drops.sh | 2 # SPDX-License-Identifier: GPL-2.0
4 # Test devlink-trap L3 drops functionality over mlxsw. Each registered L3 drop
8 # +---------------------------------+
16 # +----|----------------------------+
18 # +----|----------------------------------------------------------------------+
28 # +----|----------------------------------------------------------------------+
30 # +----|----------------------------+
38 # +---------------------------------+
66 ip -4 route add default vrf v$h1 nexthop via 192.0.2.2
67 ip -6 route add default vrf v$h1 nexthop via 2001:db8:1::2
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| /kernel/linux/linux-4.19/drivers/gpu/drm/i915/ |
| D | intel_lpe_audio.c | 24 * Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
31 * DOC: LPE Audio integration for HDMI or DP playback
34 * Atom platforms (e.g. valleyview and cherryTrail) integrates a DMA-based
41 * subsystems, a bridge is setup between the hdmi-lpe-audio and i915:
45 * the hdmi-lpe-audio driver probes the lpe audio device and creates a new
50 * uninstall the hdmi-lpe-audio driver before uninstalling i915 module,
51 * otherwise we might run into use-after-free issues after i915 removes the
52 * platform device: even though hdmi-lpe-audio driver is released, the modules
73 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->lpe_audio.platdev != NULL)
78 struct drm_device *dev = &dev_priv->drm; in lpe_audio_platdev_create()
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| /kernel/linux/linux-5.10/include/net/ |
| D | dsa.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/net/dsa.h - Driver for Distributed Switch Architecture switch chips
4 * Copyright (c) 2008-2009 Marvell Semiconductor
106 #define DSA_TAG_DRIVER_ALIAS "dsa_tag-"
116 u8 priv[48 - sizeof(struct dsa_skb_cb)];
119 #define DSA_SKB_CB(skb) ((struct dsa_skb_cb *)((skb)->cb))
122 ((void *)(skb)->cb + offsetof(struct __dsa_skb_cb, priv))
127 /* Notifier chain for switch-wide events */
225 * Give the switch driver somewhere to hang its per-port private data
243 /* TODO: ideally DSA ports would have a single dp->link_dp member,
[all …]
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