Searched +full:eth +full:- +full:ck (Results 1 – 9 of 9) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-only3 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU38 *------------------------------------------40 *------------------------------------------42 *------------------------------------------44 *------------------------------------------46 *------------------------------------------48 *------------------------------------------64 * ---------------------------------------------------------------------------65 *| MII | - | eth-ck | n/a | n/a |[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"11 - Alexandre Torgue <alexandre.torgue@st.com>12 - Christophe Roullier <christophe.roullier@st.com>23 - st,stm32-dwmac24 - st,stm32mp1-dwmac26 - compatible29 - $ref: "snps,dwmac.yaml#"[all …]
7 * - SOCK_STREAM8 * - SOCK_DGRAM9 * - SOCK_DGRAM with UDP_CORK10 * - SOCK_RAW11 * - SOCK_RAW with IP_HDRINCL14 * - SOCK_DGRAM15 * - SOCK_RAW18 * - SOCK_SEQPACKET21 * the other with option '-r' to put it in receiver mode.23 * If zerocopy mode ('-z') is enabled, the sender will verify that[all …]
2 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU45 u32 mode_reg; /* MAC glue-logic mode register */64 struct stm32_dwmac *dwmac = plat_dat->bsp_priv; in stm32_dwmac_init()67 if (dwmac->ops->set_mode) { in stm32_dwmac_init()68 ret = dwmac->ops->set_mode(plat_dat); in stm32_dwmac_init()73 ret = clk_prepare_enable(dwmac->clk_tx); in stm32_dwmac_init()77 if (!dwmac->dev->power.is_suspended) { in stm32_dwmac_init()78 ret = clk_prepare_enable(dwmac->clk_rx); in stm32_dwmac_init()80 clk_disable_unprepare(dwmac->clk_tx); in stm32_dwmac_init()85 if (dwmac->ops->clk_prepare) { in stm32_dwmac_init()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/clock/stm32mp1-clks.h>8 #include <dt-bindings/reset/stm32mp1-resets.h>11 #address-cells = <1>;12 #size-cells = <1>;15 #address-cells = <1>;16 #size-cells = <0>;19 compatible = "arm,cortex-a7";[all …]
1 // SPDX-License-Identifier: GPL-2.02 /* Copyright(c) 1999 - 2018 Intel Corporation. */31 #define DRV_EXTRAVERSION "-k"38 static int debug = -1;111 * __ew32_prepare - prepare to write to MAC CSR register on certain parts126 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) in __ew32_prepare()132 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) in __ew32()135 writel(val, hw->hw_addr + reg); in __ew32()139 * e1000_regdump - register printout routine149 switch (reginfo->ofs) { in e1000_regdump()[all …]
1 // SPDX-License-Identifier: GPL-2.02 /* Copyright(c) 1999 - 2018 Intel Corporation. */34 static int debug = -1;108 * __ew32_prepare - prepare to write to MAC CSR register on certain parts123 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i) in __ew32_prepare()129 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) in __ew32()132 writel(val, hw->hw_addr + reg); in __ew32()136 * e1000_regdump - register printout routine146 switch (reginfo->ofs) { in e1000_regdump()160 pr_info("%-15s %08x\n", in e1000_regdump()[all …]
28 'diff -u' to make the patch easy to merge. Be prepared to get your38 See Documentation/process/coding-style.rst for guidance here.44 See Documentation/process/submitting-patches.rst for details.55 include a Signed-off-by: line. The current version of this57 Documentation/process/submitting-patches.rst.68 that the bug would present a short-term risk to other users if it84 W: Web-page with status/info85 B: URI for where to file bugs. A web-page with detailed bug109 N: [^a-z]tegra all files whose path contains the word tegra137 -----------------------------------[all …]