| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 7 corresponding clock gating control bit in HW to ease manual clock
177 "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 "marvell,dove-gating-clock" - for Dove SoC clock gating
184 "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
[all …]
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| D | zx296718-clk.txt | 10 zx296718 top clock selection, divider and gating
14 zx296718 device level clock selection and gating
17 zx296718 audio clock selection, divider and gating
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| D | zx296702-clk.txt | 10 zx296702 top clock selection, divider and gating
14 zx296702 device level clock selection and gating
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 7 corresponding clock gating control bit in HW to ease manual clock
177 "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 "marvell,dove-gating-clock" - for Dove SoC clock gating
184 "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
[all …]
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| D | zx296718-clk.txt | 10 zx296718 top clock selection, divider and gating
14 zx296718 device level clock selection and gating
17 zx296718 audio clock selection, divider and gating
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| D | zx296702-clk.txt | 10 zx296702 top clock selection, divider and gating
14 zx296702 device level clock selection and gating
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| /kernel/linux/linux-4.19/drivers/clk/qcom/ |
| D | clk-branch.h | 12 * struct clk_branch - gating clock with status bit and dynamic hardware gating
14 * @hwcg_reg: dynamic hardware clock gating register
15 * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | clk-branch.h | 12 * struct clk_branch - gating clock with status bit and dynamic hardware gating
14 * @hwcg_reg: dynamic hardware clock gating register
15 * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating
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| /kernel/linux/linux-4.19/drivers/staging/gasket/ |
| D | apex.h | 12 /* Clock Gating ioctl. */
17 /* If set, enter clock gating state, regardless of custom block's
26 /* Enable/Disable clock gating. */
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| /kernel/linux/linux-5.10/drivers/staging/gasket/ |
| D | apex.h | 12 /* Clock Gating ioctl. */
17 /* If set, enter clock gating state, regardless of custom block's
26 /* Enable/Disable clock gating. */
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| /kernel/linux/linux-5.10/sound/soc/intel/catpt/ |
| D | dsp.c | 159 /* wait for SRAM power gating to propagate */ in catpt_dsp_set_srampge()
197 /* disable core clock gating */ in catpt_dsp_update_srampge()
202 /* enable core clock gating */ in catpt_dsp_update_srampge()
356 /* DRAM power gating all */ in lpt_dsp_power_down()
371 /* SRAM power gating none */ in lpt_dsp_power_up()
397 /* disable core clock gating */ in wpt_dsp_power_down()
410 /* switch clock gating */ in wpt_dsp_power_down()
418 /* SRAM power gating all */ in wpt_dsp_power_down()
430 /* enable core clock gating */ in wpt_dsp_power_down()
442 /* disable core clock gating */ in wpt_dsp_power_up()
[all …]
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| /kernel/linux/linux-4.19/sound/soc/intel/haswell/ |
| D | sst-haswell-dsp.c | 260 /* Disable core clock gating (VDRTCTL2.DCLCGE = 0) */ in hsw_set_dsp_D3()
265 /* enable power gating and switch off DRAM & IRAM blocks */ in hsw_set_dsp_D3()
287 /* Enable core clock gating (VDRTCTL2.DCLCGE = 1), delay 50 us */ in hsw_set_dsp_D3()
316 /* Disable core clock gating (VDRTCTL2.DCLCGE = 0) */ in hsw_set_dsp_D0()
352 /* Set 24MHz MCLK, prevent local clock gating, enable SSP0 clock */ in hsw_set_dsp_D0()
360 /* Enable core clock gating (VDRTCTL2.DCLCGE = 1), delay 50 us */ in hsw_set_dsp_D0()
372 /* set default power gating control, enable power gating control for all blocks. that is, in hsw_set_dsp_D0()
554 /* Disable core clock gating (VDRTCTL2.DCLCGE = 0) */ in hsw_block_enable()
566 /* Enable core clock gating (VDRTCTL2.DCLCGE = 1), delay 50 us */ in hsw_block_enable()
590 /* Disable core clock gating (VDRTCTL2.DCLCGE = 0) */ in hsw_block_disable()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | intel_sseu.c | 160 /* TGL only supports slice-level power gating */ in gen12_sseu_info_init()
186 /* ICL has no power gating restrictions. */ in gen11_sseu_info_init()
263 /* No restrictions on Power Gating */ in gen10_sseu_info_init()
315 * CHV supports subslice power gating on devices with more than in cherryview_sseu_info_init()
316 * one subslice, and supports EU power gating on devices with in cherryview_sseu_info_init()
401 * SKL+ supports slice power gating on devices with more than in gen9_sseu_info_init()
402 * one slice, and supports EU power gating on devices with in gen9_sseu_info_init()
404 * power gating on devices with more than one subslice, and in gen9_sseu_info_init()
405 * supports EU power gating on devices with more than one EU in gen9_sseu_info_init()
508 * BDW supports slice power gating on devices with more than in bdw_sseu_info_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/soc/tegra/ |
| D | flowctrl.c | 84 /* pwr gating on wfe */ in flowctrl_cpu_suspend_enter()
99 * power-gating (like memory running off PLLP), in flowctrl_cpu_suspend_enter()
103 * while wfe for the power-gating, just like it in flowctrl_cpu_suspend_enter()
108 /* pwr gating on wfi */ in flowctrl_cpu_suspend_enter()
115 reg |= FLOW_CTRL_CSR_ENABLE; /* pwr gating */ in flowctrl_cpu_suspend_enter()
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| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | clk-kona.h | 106 * Gating control and status is managed by a 32-bit gate register.
108 * There are several types of gating available:
111 * - hardware-only gating (auto-gating)
116 * - software-only gating
117 * Auto-gating is not available for this type of clock.
121 * To ensure a change to the gating status is complete, the
124 * - selectable hardware or software gating
125 * Gating for this type of clock can be configured to be either
133 u32 hw_sw_sel_bit; /* 0: hardware gating; 1: software gating */
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| /kernel/linux/linux-4.19/drivers/clk/bcm/ |
| D | clk-kona.h | 106 * Gating control and status is managed by a 32-bit gate register.
108 * There are several types of gating available:
111 * - hardware-only gating (auto-gating)
116 * - software-only gating
117 * Auto-gating is not available for this type of clock.
121 * To ensure a change to the gating status is complete, the
124 * - selectable hardware or software gating
125 * Gating for this type of clock can be configured to be either
133 u32 hw_sw_sel_bit; /* 0: hardware gating; 1: software gating */
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| /kernel/linux/linux-5.10/arch/arm/mach-ux500/ |
| D | pm_domains.c | 21 * Handle the gating of the PM domain regulator here. in pd_power_off()
25 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_off()
37 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_on()
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| /kernel/linux/linux-4.19/arch/arm/mach-ux500/ |
| D | pm_domains.c | 21 * Handle the gating of the PM domain regulator here. in pd_power_off()
25 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_off()
37 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_on()
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| /kernel/linux/linux-4.19/sound/pci/hda/ |
| D | hda_jack.c | 162 /* A gating jack indicates the jack is invalid if gating is unplugged */ in jack_detect_update()
296 * snd_hda_jack_set_gating_jack - Set gating jack.
299 * @gating_nid: gating pin NID
301 * Indicates the gated jack is only valid when the gating jack is plugged.
307 struct hda_jack_tbl *gating = snd_hda_jack_tbl_new(codec, gating_nid); in snd_hda_jack_set_gating_jack() local
309 if (!gated || !gating) in snd_hda_jack_set_gating_jack()
313 gating->gated_jack = gated_nid; in snd_hda_jack_set_gating_jack()
335 * to make sure that all gating jacks properly have been set in snd_hda_jack_report_sync()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | hardwaremanager.h | 95 …PHM_PlatformCaps_DisableMGClockGating, /* to disable Medium Grain Clock Gating or…
96 …PHM_PlatformCaps_DisableMGCGTSSM, /* TO disable Medium Grain Clock Gating Sh…
98 PHM_PlatformCaps_DisablePowerGating, /* to disable power gating */
148 …PHM_PlatformCaps_UVDPowerGating, /* enable UVD power gating, supported from…
149 …PHM_PlatformCaps_UVDDynamicPowerGating, /* enable UVD Dynamic power gating, suppor…
150 …PHM_PlatformCaps_VCEPowerGating, /* Enable VCE power gating, supported for …
151 …PHM_PlatformCaps_SamuPowerGating, /* Enable SAMU power gating, supported for…
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| /kernel/linux/linux-4.19/drivers/gpu/drm/amd/powerplay/inc/ |
| D | hardwaremanager.h | 95 …PHM_PlatformCaps_DisableMGClockGating, /* to disable Medium Grain Clock Gating or…
96 …PHM_PlatformCaps_DisableMGCGTSSM, /* TO disable Medium Grain Clock Gating Sh…
98 PHM_PlatformCaps_DisablePowerGating, /* to disable power gating */
148 …PHM_PlatformCaps_UVDPowerGating, /* enable UVD power gating, supported from…
149 …PHM_PlatformCaps_UVDDynamicPowerGating, /* enable UVD Dynamic power gating, suppor…
150 …PHM_PlatformCaps_VCEPowerGating, /* Enable VCE power gating, supported for …
151 …PHM_PlatformCaps_SamuPowerGating, /* Enable SAMU power gating, supported for…
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| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | psb_device.c | 154 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); in psb_init_pm() local
155 gating &= ~3; /* Disable 2D clock gating */ in psb_init_pm()
156 gating |= 1; in psb_init_pm()
157 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); in psb_init_pm()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/i915/ |
| D | intel_device_info.c | 96 drm_printf(p, "has slice power gating: %s\n", in sseu_dump()
98 drm_printf(p, "has subslice power gating: %s\n", in sseu_dump()
100 drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg)); in sseu_dump()
194 /* ICL has no power gating restrictions. */ in gen11_sseu_info_init()
271 /* No restrictions on Power Gating */ in gen10_sseu_info_init()
321 * CHV supports subslice power gating on devices with more than in cherryview_sseu_info_init()
322 * one subslice, and supports EU power gating on devices with in cherryview_sseu_info_init()
404 * SKL+ supports slice power gating on devices with more than in gen9_sseu_info_init()
405 * one slice, and supports EU power gating on devices with in gen9_sseu_info_init()
407 * power gating on devices with more than one subslice, and in gen9_sseu_info_init()
[all …]
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| /kernel/linux/linux-5.10/sound/pci/hda/ |
| D | hda_jack.c | 196 /* A gating jack indicates the jack is invalid if gating is unplugged */ in jack_detect_update()
365 * snd_hda_jack_set_gating_jack - Set gating jack.
368 * @gating_nid: gating pin NID
370 * Indicates the gated jack is only valid when the gating jack is plugged.
376 struct hda_jack_tbl *gating = in snd_hda_jack_set_gating_jack() local
381 if (!gated || !gating) in snd_hda_jack_set_gating_jack()
385 gating->gated_jack = gated_nid; in snd_hda_jack_set_gating_jack()
407 * to make sure that all gating jacks properly have been set in snd_hda_jack_report_sync()
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| /kernel/linux/linux-4.19/drivers/gpu/drm/gma500/ |
| D | psb_device.c | 166 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); in psb_init_pm() local
167 gating &= ~3; /* Disable 2D clock gating */ in psb_init_pm()
168 gating |= 1; in psb_init_pm()
169 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); in psb_init_pm()
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