Searched +full:imx27 +full:- +full:clock (Results 1 – 25 of 104) sorted by relevance
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@10040000 { [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx27-apf27.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 /dts-v1/; 10 #include "imx27.dtsi" 14 compatible = "armadeus,imx27-apf27", "fsl,imx27"; 23 clock-frequency = <0>; 27 imx27-apf27 { 61 pinctrl-names = "default"; 62 pinctrl-0 = <&pinctrl_uart1>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pinctrl_fec1>; [all …]
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| D | imx27-apf27dev.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2013 Armadeus Systems - <support@armadeus.com> 7 #include "imx27-apf27.dts" 11 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; 14 model = "Chimei-LW700AT9003"; 15 bits-per-pixel = <16>; /* non-standard but required */ 16 fsl,pcr = <0xfae80083>; /* non-standard but required */ 17 display-timings { 18 native-mode = <&timing0>; 20 clock-frequency = <33000033>; [all …]
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| D | imx27-phytec-phycard-s-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include "imx27-phytec-phycard-s-som.dtsi" 10 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27"; 13 stdout-path = &uart1; 17 model = "Primeview-PD050VL1"; 18 bits-per-pixel = <16>; /* non-standard but required */ 19 fsl,pcr = <0xf0c88080>; /* non-standard but required */ 20 display-timings { 21 native-mode = <&timing0>; 25 hback-porch = <112>; [all …]
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| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx27-phytec-phycore-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 #include "imx27-phytec-phycore-som.dtsi" 9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; 12 stdout-path = &uart1; 16 model = "Sharp-LQ035Q7"; 17 bits-per-pixel = <16>; 20 display-timings { 21 native-mode = <&timing0>; 23 clock-frequency = <5500000>; 26 hback-porch = <5>; [all …]
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| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 // based on imx27.dtsi 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; 48 avic: avic-interrupt-controller@68000000 { [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@e0000000 { [all …]
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| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx27-apf27dev.dts | 2 * Copyright 2013 Armadeus Systems - <support@armadeus.com> 8 * http://www.opensource.org/licenses/gpl-license.html 13 #include "imx27-apf27.dts" 17 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; 20 model = "Chimei-LW700AT9003"; 21 native-mode = <&timing0>; 22 bits-per-pixel = <16>; /* non-standard but required */ 23 fsl,pcr = <0xfae80083>; /* non-standard but required */ 24 display-timings { 26 clock-frequency = <33000033>; [all …]
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| D | imx27-apf27.dts | 11 * http://www.opensource.org/licenses/gpl-license.html 15 /dts-v1/; 16 #include "imx27.dtsi" 20 compatible = "armadeus,imx27-apf27", "fsl,imx27"; 29 clock-frequency = <0>; 33 imx27-apf27 { 67 pinctrl-names = "default"; 68 pinctrl-0 = <&pinctrl_uart1>; 73 pinctrl-names = "default"; 74 pinctrl-0 = <&pinctrl_fec1>; [all …]
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| D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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| D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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| D | imx27-phytec-phycard-s-rdk.dts | 8 * http://www.opensource.org/licenses/gpl-license.html 12 #include "imx27-phytec-phycard-s-som.dtsi" 16 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27"; 19 stdout-path = &uart1; 23 model = "Primeview-PD050VL1"; 24 native-mode = <&timing0>; 25 bits-per-pixel = <16>; /* non-standard but required */ 26 fsl,pcr = <0xf0c88080>; /* non-standard but required */ 27 display-timings { 31 hback-porch = <112>; [all …]
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| D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 // based on imx27.dtsi 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 32 #address-cells = <1>; 33 #size-cells = <0>; 36 compatible = "arm,arm1136jf-s"; 42 avic: avic-interrupt-controller@68000000 { [all …]
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| D | imx27-phytec-phycore-rdk.dts | 6 * http://www.opensource.org/licenses/gpl-license.html 10 #include "imx27-phytec-phycore-som.dtsi" 14 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; 17 stdout-path = &uart1; 21 model = "Sharp-LQ035Q7"; 22 native-mode = <&timing0>; 23 bits-per-pixel = <16>; 26 display-timings { 28 clock-frequency = <5500000>; 31 hback-porch = <5>; [all …]
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 55 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | imx27-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx27-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Clock bindings for Freescale i.MX27 10 - Fabio Estevam <fabio.estevam@nxp.com> 13 The clock consumer should specify the desired clock by having the clock 14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h 15 for the full list of i.MX27 clock IDs. 19 const: fsl,imx27-ccm [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/ |
| D | imx27-clock.txt | 1 * Clock bindings for Freescale i.MX27 4 - compatible: Should be "fsl,imx27-ccm" 5 - reg: Address and length of the register set 6 - interrupts: Should contain CCM interrupt 7 - #clock-cells: Should be <1> 9 The clock consumer should specify the desired clock by having the clock 10 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h 11 for the full list of i.MX27 clock IDs. 15 compatible = "fsl,imx27-ccm"; 17 #clock-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | fsl,imxgpt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sascha Hauer <s.hauer@pengutronix.de> 15 - const: fsl,imx1-gpt 16 - const: fsl,imx21-gpt 17 - items: 18 - const: fsl,imx27-gpt 19 - const: fsl,imx21-gpt 20 - const: fsl,imx31-gpt [all …]
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| /kernel/linux/linux-4.19/drivers/clk/imx/ |
| D | clk-imx27.c | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <linux/clk-provider.h> 8 #include <dt-bindings/clock/imx27-clock.h> 189 clk_register_clkdev(clk[IMX27_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); in mx27_clocks_init() 190 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.0"); in mx27_clocks_init() 191 clk_register_clkdev(clk[IMX27_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); in mx27_clocks_init() 192 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.1"); in mx27_clocks_init() 193 clk_register_clkdev(clk[IMX27_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); in mx27_clocks_init() 194 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.2"); in mx27_clocks_init() 195 clk_register_clkdev(clk[IMX27_CLK_UART4_IPG_GATE], "ipg", "imx21-uart.3"); in mx27_clocks_init() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/ |
| D | imx-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <p.zabel@pengutronix.de> 13 "#pwm-cells": 18 - 2 19 - 3 23 - enum: 24 - fsl,imx1-pwm [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/pwm/ |
| D | imx-pwm.txt | 4 - compatible : should be "fsl,<soc>-pwm" and one of the following 6 - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1 7 - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27 8 - reg: physical base address and length of the controller's registers 9 - #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt 11 - clocks : Clock specifiers for both ipg and per clocks. 12 - clock-names : Clock names should include both "ipg" and "per" 13 See the clock consumer binding, 14 Documentation/devicetree/bindings/clock/clock-bindings.txt 15 - interrupts: The interrupt for the pwm controller [all …]
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