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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx27-pinfunc.h"
7 #include <dt-bindings/clock/imx27-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
43 aitc: aitc-interrupt-controller@10040000 {
[all …]
Dimx27-phytec-phycard-s-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-phytec-phycard-s-som.dtsi"
10 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
13 stdout-path = &uart1;
17 model = "Primeview-PD050VL1";
18 bits-per-pixel = <16>; /* non-standard but required */
19 fsl,pcr = <0xf0c88080>; /* non-standard but required */
20 display-timings {
21 native-mode = <&timing0>;
25 hback-porch = <112>;
[all …]
Dimx31.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 * pre-existing /chosen node to be available to insert the
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,arm1136jf-s";
44 avic: interrupt-controller@68000000 {
[all …]
Dimx51.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx51-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
42 tzic: tz-interrupt-controller@e0000000 {
[all …]
Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
[all …]
Dimx27-eukrea-mbimxsd27-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-eukrea-cpuimx27.dtsi"
10 compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
12 display0: CMO-QVGA {
13 model = "CMO-QVGA";
14 bits-per-pixel = <16>;
17 display-timings {
18 native-mode = <&timing0>;
20 clock-frequency = <6500000>;
23 hback-porch = <20>;
[all …]
Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 // based on imx27.dtsi
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1136jf-s";
48 avic: avic-interrupt-controller@68000000 {
[all …]
Dimx27-phytec-phycore-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include "imx27-phytec-phycore-som.dtsi"
9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
12 stdout-path = &uart1;
16 model = "Sharp-LQ035Q7";
17 bits-per-pixel = <16>;
20 display-timings {
21 native-mode = <&timing0>;
23 clock-frequency = <5500000>;
26 hback-porch = <5>;
[all …]
Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
[all …]
Dimx50.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include "imx50-pinfunc.h"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx5-clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a8";
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx27-pinfunc.h"
7 #include <dt-bindings/clock/imx27-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
43 aitc: aitc-interrupt-controller@e0000000 {
[all …]
Dimx27-phytec-phycard-s-rdk.dts8 * http://www.opensource.org/licenses/gpl-license.html
12 #include "imx27-phytec-phycard-s-som.dtsi"
16 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
19 stdout-path = &uart1;
23 model = "Primeview-PD050VL1";
24 native-mode = <&timing0>;
25 bits-per-pixel = <16>; /* non-standard but required */
26 fsl,pcr = <0xf0c88080>; /* non-standard but required */
27 display-timings {
31 hback-porch = <112>;
[all …]
Dimx31.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 * pre-existing /chosen node to be available to insert the
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,arm1136jf-s";
44 avic: interrupt-controller@68000000 {
[all …]
Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
[all …]
Dimx51.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx51-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
42 tzic: tz-interrupt-controller@e0000000 {
[all …]
Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
[all …]
Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 // based on imx27.dtsi
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
32 #address-cells = <1>;
33 #size-cells = <0>;
36 compatible = "arm,arm1136jf-s";
42 avic: avic-interrupt-controller@68000000 {
[all …]
Dimx27-eukrea-mbimxsd27-baseboard.dts8 * http://www.opensource.org/licenses/gpl-license.html
12 #include "imx27-eukrea-cpuimx27.dtsi"
16 compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
18 display0: CMO-QVGA {
19 model = "CMO-QVGA";
20 native-mode = <&timing0>;
21 bits-per-pixel = <16>;
24 display-timings {
26 clock-frequency = <6500000>;
29 hback-porch = <20>;
[all …]
Dimx50.dtsi10 * http://www.opensource.org/licenses/gpl-license.html
14 #include "imx50-pinfunc.h"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/imx5-clock.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 * pre-existing /chosen node to be available to insert the
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "arm,cortex-a8";
[all …]
Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
[all …]
/kernel/linux/linux-4.19/drivers/clk/imx/
Dclk-imx27.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/clk-provider.h>
8 #include <dt-bindings/clock/imx27-clock.h>
189 clk_register_clkdev(clk[IMX27_CLK_UART1_IPG_GATE], "ipg", "imx21-uart.0"); in mx27_clocks_init()
190 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.0"); in mx27_clocks_init()
191 clk_register_clkdev(clk[IMX27_CLK_UART2_IPG_GATE], "ipg", "imx21-uart.1"); in mx27_clocks_init()
192 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.1"); in mx27_clocks_init()
193 clk_register_clkdev(clk[IMX27_CLK_UART3_IPG_GATE], "ipg", "imx21-uart.2"); in mx27_clocks_init()
194 clk_register_clkdev(clk[IMX27_CLK_PER1_GATE], "per", "imx21-uart.2"); in mx27_clocks_init()
195 clk_register_clkdev(clk[IMX27_CLK_UART4_IPG_GATE], "ipg", "imx21-uart.3"); in mx27_clocks_init()
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt1 * Freescale IMX27 IOMUX Controller
4 - compatible: "fsl,imx27-iomuxc"
9 - fsl,pins: three integers array, represents a group of pins mux and config
12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
28 0 - Input
29 1 - Output
37 0 - A_IN
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt1 * Freescale IMX27 IOMUX Controller
4 - compatible: "fsl,imx27-iomuxc"
9 - fsl,pins: three integers array, represents a group of pins mux and config
12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
28 0 - Input
29 1 - Output
37 0 - A_IN
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx27-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx27-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <fabio.estevam@nxp.com>
14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h
19 const: fsl,imx27-ccm
27 '#clock-cells':
31 - compatible
32 - reg
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/clock/
Dimx27-clock.txt4 - compatible: Should be "fsl,imx27-ccm"
5 - reg: Address and length of the register set
6 - interrupts: Should contain CCM interrupt
7 - #clock-cells: Should be <1>
10 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h
15 compatible = "fsl,imx27-ccm";
17 #clock-cells = <1>;
21 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
26 clock-names = "ipg", "per";

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