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Searched +full:intc +full:- +full:nr +full:- +full:irqs (Results 1 – 23 of 23) sorted by relevance

/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dmmp2.dtsi11 #include <dt-bindings/clock/marvell,mmp2.h>
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 interrupt-parent = <&intc>;
30 L2: l2-cache {
31 compatible = "marvell,tauros2-cache";
32 marvell,tauros2-cache-features = <0x3>;
36 compatible = "mrvl,axi-bus", "simple-bus";
37 #address-cells = <1>;
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Dpxa168.dtsi11 #include <dt-bindings/clock/marvell,pxa168.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "simple-bus";
26 interrupt-parent = <&intc>;
30 compatible = "mrvl,axi-bus", "simple-bus";
31 #address-cells = <1>;
32 #size-cells = <1>;
36 intc: interrupt-controller@d4282000 { label
37 compatible = "mrvl,mmp-intc";
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Dpxa910.dtsi11 #include <dt-bindings/clock/marvell,pxa910.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "simple-bus";
26 interrupt-parent = <&intc>;
29 L2: l2-cache {
30 compatible = "marvell,tauros2-cache";
31 marvell,tauros2-cache-features = <0x3>;
35 compatible = "mrvl,axi-bus", "simple-bus";
36 #address-cells = <1>;
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Dpxa25x.dtsi8 * http://www.opensource.org/licenses/gpl-license.html
12 #include "dt-bindings/clock/pxa-clock.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "marvell,pxa250-core-clocks";
29 #clock-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <3686400>;
38 clock-output-names = "ostimer";
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Dpxa2xx.dtsi2 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
10 #include "dt-bindings/clock/pxa-clock.h"
15 interrupt-parent = <&pxairq>;
27 #address-cells = <0>;
28 #size-cells = <0>;
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
41 pxairq: interrupt-controller@40d00000 {
42 #interrupt-cells = <1>;
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Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
15 #dma-channels = <32>;
16 #dma-cells = <2>;
17 #dma-requests = <75>;
21 pxairq: interrupt-controller@40d00000 {
22 marvell,intc-priority;
23 marvell,intc-nr-irqs = <34>;
[all …]
Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thomas Gleixner <tglx@linutronix.de>
11 - Jason Cooper <jason@lakedaemon.net>
12 - Marc Zyngier <maz@kernel.org>
13 - Rob Herring <robh+dt@kernel.org>
16 - if:
21 const: marvell,orion-intc
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
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Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "simple-bus";
27 interrupt-parent = <&intc>;
30 L2: l2-cache {
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Dpxa168.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa168.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
29 compatible = "mrvl,axi-bus", "simple-bus";
30 #address-cells = <1>;
[all …]
Dpxa910.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
[all …]
Dpxa25x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "dt-bindings/clock/pxa-clock.h"
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "marvell,pxa250-core-clocks";
23 #clock-cells = <1>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <3686400>;
32 clock-output-names = "ostimer";
[all …]
Dpxa2xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
8 #include "dt-bindings/clock/pxa-clock.h"
12 mux- ## func { \
17 mux- ## func { \
20 low-power-disable; \
23 mux- ## func { \
26 low-power-enable; \
30 #address-cells = <1>;
31 #size-cells = <1>;
[all …]
Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
15 #dma-channels = <32>;
16 #dma-cells = <2>;
17 #dma-requests = <75>;
21 pxairq: interrupt-controller@40d00000 {
22 marvell,intc-priority;
23 marvell,intc-nr-irqs = <34>;
[all …]
Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.txt4 - compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
5 "mrvl,mmp2-mux-intc"
6 - reg : Address and length of the register set of the interrupt controller.
7 If the interrupt controller is intc, address and length means the range
8 of the whold interrupt controller. If the interrupt controller is mux-intc,
9 address and length means one register. Since address of mux-intc is in the
10 range of intc. mux-intc is secondary interrupt controller.
11 - reg-names : Name of the register set of the interrupt controller. It's
12 only required in mux-intc interrupt controller.
13 - interrupts : Should be the port interrupt shared by mux interrupts. It's
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-pxa/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/irq.c
24 #include <mach/irqs.h>
36 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
37 (0x144 + (((i) - 64) << 2)))
45 * This is for peripheral IRQs internal to the PXA chip.
103 handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); in icip_handle_irq()
159 __raw_writel(0, base + ICMR); /* disable all IRQs */ in pxa_init_irq_common()
160 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ in pxa_init_irq_common()
229 { .compatible = "marvell,pxa-intc", },
[all …]
/kernel/linux/linux-4.19/arch/arm/mach-pxa/
Dirq.c2 * linux/arch/arm/mach-pxa/irq.c
27 #include <mach/irqs.h>
39 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
40 (0x144 + (((i) - 64) << 2)))
48 * This is for peripheral IRQs internal to the PXA chip.
106 handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); in icip_handle_irq()
162 __raw_writel(0, base + ICMR); /* disable all IRQs */ in pxa_init_irq_common()
163 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ in pxa_init_irq_common()
232 { .compatible = "marvell,pxa-intc", },
244 pr_err("Failed to find interrupt controller in arch-pxa\n"); in pxa_dt_irq_init()
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/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-mmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/irq.c
6 * Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
69 struct irq_domain *domain = d->domain; in icu_mask_ack_irq()
70 struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data; in icu_mask_ack_irq()
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
77 r &= ~data->conf_mask; in icu_mask_ack_irq()
78 r |= data->conf_disable; in icu_mask_ack_irq()
82 if ((data->virq_base == data->clr_mfp_irq_base) in icu_mask_ack_irq()
83 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
[all …]
/kernel/linux/linux-4.19/drivers/irqchip/
Dirq-mmp.c2 * linux/arch/arm/mach-mmp/irq.c
5 * Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
68 struct irq_domain *domain = d->domain; in icu_mask_ack_irq()
69 struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data; in icu_mask_ack_irq()
73 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
76 r &= ~data->conf_mask; in icu_mask_ack_irq()
77 r |= data->conf_disable; in icu_mask_ack_irq()
81 if ((data->virq_base == data->clr_mfp_irq_base) in icu_mask_ack_irq()
82 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
85 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_ack_irq()
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/kernel/linux/linux-4.19/arch/arm/include/asm/hardware/
Dit8152.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <mach/irqs.h>
50 ---------------------------------------
70 IT8152_PD_IRQ(10) PCI INTC
74 IT8152_PD_IRQ(6) serial INTC
85 /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
113 extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
/kernel/linux/patches/linux-4.19/hi3516dv300_patch/
Dhi3516dv300.patch1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
3 --- a/arch/arm/Kconfig
5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM
9 - select AUTO_ZRELADDR
14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig"
16 source "arch/arm/mach-hisi/Kconfig"
18 +source "arch/arm/mach-hibvt/Kconfig"
20 source "arch/arm/mach-imx/Kconfig"
22 source "arch/arm/mach-integrator/Kconfig"
23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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