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/kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/
Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4770";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
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Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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Dgcw0.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4770.dtsi"
5 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/adc/ingenic,adc.h>
9 #include <dt-bindings/input/input.h>
12 compatible = "gcw,zero", "ingenic,jz4770";
29 stdout-path = "serial2:57600n8";
33 compatible = "regulator-fixed";
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/kernel/linux/linux-4.19/arch/mips/boot/dts/ingenic/
Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/jz4770-cgu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4770";
10 cpuintc: interrupt-controller {
11 #address-cells = <0>;
12 #interrupt-cells = <1>;
13 interrupt-controller;
14 compatible = "mti,cpu-interrupt-controller";
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dingenic,pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Please refer to pinctrl-bindings.txt in this directory for details of the
14 For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
16 GPIO port configuration registers and it is typical to refer to pins using the
17 naming scheme "PxN" where x is a character identifying the GPIO port with
19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
20 and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830
21 contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/
Dingenic,gpio.txt1 Ingenic jz47xx GPIO controller
3 That the Ingenic GPIO driver node must be a sub-node of the Ingenic pinctrl
7 --------------------
9 - compatible: Must contain one of:
10 - "ingenic,jz4740-gpio"
11 - "ingenic,jz4770-gpio"
12 - "ingenic,jz4780-gpio"
13 - reg: The GPIO bank number.
14 - interrupt-controller: Marks the device node as an interrupt controller.
15 - interrupts: Interrupt specifier for the controllers interrupt.
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dingenic,pinctrl.txt3 Please refer to pinctrl-bindings.txt in this directory for details of the
7 For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may
9 GPIO port configuration registers and it is typical to refer to pins using the
10 naming scheme "PxN" where x is a character identifying the GPIO port with
12 pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
13 PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
14 PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
19 --------------------
21 - compatible: One of:
22 - "ingenic,jz4740-pinctrl"
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/kernel/linux/linux-5.10/drivers/usb/phy/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
5 obj-$(CONFIG_USB_PHY) += phy.o
6 obj-$(CONFIG_OF) += of.o
10 obj-$(CONFIG_AB8500_USB) += phy-ab8500-usb.o
11 obj-$(CONFIG_FSL_USB2_OTG) += phy-fsl-usb.o
12 obj-$(CONFIG_ISP1301_OMAP) += phy-isp1301-omap.o
13 obj-$(CONFIG_NOP_USB_XCEIV) += phy-generic.o
14 obj-$(CONFIG_TAHVO_USB) += phy-tahvo.o
15 obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
16 obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dingenic,uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: /schemas/serial.yaml#
17 pattern: "^serial@[0-9a-f]+$"
21 - enum:
22 - ingenic,jz4740-uart
23 - ingenic,jz4760-uart
24 - ingenic,jz4780-uart
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/kernel/linux/linux-4.19/drivers/gpio/
Dgpio-ingenic.c2 * Ingenic JZ47xx GPIO driver
9 #include <linux/gpio/driver.h>
54 regmap_read(jzgc->map, jzgc->reg_base + reg, &val); in gpio_ingenic_read_reg()
67 regmap_write(jzgc->map, jzgc->reg_base + reg, BIT(offset)); in gpio_ingenic_set_bit()
79 if (jzgc->version >= ID_JZ4770) in gpio_set_value()
90 if (jzgc->version >= ID_JZ4770) { in irq_set_type()
124 gpio_ingenic_set_bit(jzgc, GPIO_MSK, irqd->hwirq, true); in ingenic_gpio_irq_mask()
132 gpio_ingenic_set_bit(jzgc, GPIO_MSK, irqd->hwirq, false); in ingenic_gpio_irq_unmask()
139 int irq = irqd->hwirq; in ingenic_gpio_irq_enable()
141 if (jzgc->version >= ID_JZ4770) in ingenic_gpio_irq_enable()
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/kernel/linux/linux-4.19/drivers/pwm/
Dpwm-jz4740.c2 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
18 #include <linux/gpio.h>
25 #include <asm/mach-jz4740/timer.h>
45 if (pwm->hwpwm < 2) in jz4740_pwm_request()
46 return -EBUSY; in jz4740_pwm_request()
48 jz4740_timer_start(pwm->hwpwm); in jz4740_pwm_request()
55 jz4740_timer_set_ctrl(pwm->hwpwm, 0); in jz4740_pwm_free()
57 jz4740_timer_stop(pwm->hwpwm); in jz4740_pwm_free()
62 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm); in jz4740_pwm_enable()
65 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); in jz4740_pwm_enable()
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/kernel/linux/linux-4.19/drivers/pinctrl/
Dpinctrl-ingenic.c10 #include <linux/gpio.h>
18 #include <linux/pinctrl/pinconf-generic.h>
140 INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
141 INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
142 INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
143 INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
144 INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
145 INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
146 INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
147 INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),
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/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/gpio/driver.h>
20 #include <linux/pinctrl/pinconf-generic.h>
169 INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
170 INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
171 INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
172 INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
173 INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
174 INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
175 INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
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