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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/
Dingenic,jz4780-nand.txt1 * Ingenic JZ4780 NAND/BCH
3 This file documents the device tree bindings for NAND flash devices on the
4 JZ4780. NAND devices are connected to the NEMC controller (described in
5 memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
8 Required NAND controller device properties:
9 - compatible: Should be set to "ingenic,jz4780-nand".
10 - reg: For each bank with a NAND chip attached, should specify a bank number,
13 Optional NAND controller device properties:
14 - ingenic,bch-controller: To make use of the hardware BCH controller, this
20 - Individual NAND chips are children of the NAND controller node.
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/memory-controllers/
Dingenic,jz4780-nemc.txt1 * Ingenic JZ4780 NAND/external memory controller (NEMC)
4 controller in Ingenic JZ4780
7 - compatible: Should be set to one of:
8 "ingenic,jz4780-nemc" (JZ4780)
9 - reg: Should specify the NEMC controller registers location and length.
10 - clocks: Clock for the NEMC controller.
11 - #address-cells: Must be set to 2.
12 - #size-cells: Must be set to 1.
13 - ranges: A set of ranges for each bank describing the physical memory layout.
21 - reg: Should contain at least one register specifier, given in the following
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dingenic,nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND controller devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: nand-controller.yaml#
18 - ingenic,jz4740-nand
19 - ingenic,jz4725b-nand
20 - ingenic,jz4780-nand
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/kernel/linux/linux-5.10/drivers/mtd/nand/raw/ingenic/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "JZ4780 NAND controller"
7 Enables support for NAND Flash connected to the NEMC on JZ4780 SoC
19 Enable this driver to support the Reed-Solomon error-correction
23 will be called jz4740-ecc.
29 Enable this driver to support the BCH error-correction hardware
33 will be called jz4725b-bch.
36 tristate "Hardware BCH support for JZ4780 SoC"
39 Enable this driver to support the BCH error-correction hardware
40 present on the JZ4780 SoC from Ingenic.
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Dingenic_nand_drv.c1 // SPDX-License-Identifier: GPL-2.0
3 * Ingenic JZ47xx NAND driver
24 #include <linux/jz4780-nemc.h>
28 #define DRV_NAME "ingenic-nand"
75 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_ecc()
77 if (section || !ecc->total) in qi_lb60_ooblayout_ecc()
78 return -ERANGE; in qi_lb60_ooblayout_ecc()
80 oobregion->length = ecc->total; in qi_lb60_ooblayout_ecc()
81 oobregion->offset = 12; in qi_lb60_ooblayout_ecc()
90 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_free()
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/kernel/linux/linux-4.19/drivers/mtd/nand/raw/
Djz4780_nand.c2 * JZ4780 NAND driver
26 #include <linux/jz4780-nemc.h>
30 #define DRV_NAME "jz4780-nand"
76 struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd); in jz4780_nand_select_chip() local
77 struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller); in jz4780_nand_select_chip()
81 if (chipnr == -1 && nfc->selected >= 0) { in jz4780_nand_select_chip()
82 cs = &nfc->cs[nfc->selected]; in jz4780_nand_select_chip()
83 jz4780_nemc_assert(nfc->dev, cs->bank, false); in jz4780_nand_select_chip()
86 nfc->selected = chipnr; in jz4780_nand_select_chip()
92 struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd); in jz4780_nand_cmd_ctrl() local
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DKconfig5 bool "NAND ECC Smart Media byte order"
14 tristate "Raw/Parallel NAND Device Support"
19 NAND flash devices. For further information see
20 <http://www.linux-mtd.infradead.org/doc/nand.html>.
36 ECC codes. They are used with NAND devices requiring more than 1 bit
47 tristate "Support Denali NAND controller on Intel Moorestown"
51 Enable the driver for NAND flash on Intel Moorestown, using the
52 Denali NAND controller core.
55 tristate "Support Denali NAND controller as a DT device"
59 Enable the driver for NAND flash on platforms using a Denali NAND
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Djz4780_bch.c2 * JZ4780 BCH controller
81 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_init()
84 reg = params->size << BCH_BHCNT_BLOCKSIZE_SHIFT; in jz4780_bch_init()
85 reg |= params->bytes << BCH_BHCNT_PARITYSIZE_SHIFT; in jz4780_bch_init()
86 writel(reg, bch->base + BCH_BHCNT); in jz4780_bch_init()
90 reg |= params->strength << BCH_BHCR_BSEL_SHIFT; in jz4780_bch_init()
93 writel(reg, bch->base + BCH_BHCR); in jz4780_bch_init()
98 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT); in jz4780_bch_disable()
99 writel(BCH_BHCR_BCHE, bch->base + BCH_BHCCR); in jz4780_bch_disable()
111 while (size32--) in jz4780_bch_write_data()
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/kernel/linux/linux-4.19/arch/mips/boot/dts/ingenic/
Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4780.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
8 compatible = "img,ci20", "ingenic,jz4780";
18 stdout-path = &uart4;
28 compatible = "regulator-fixed";
29 regulator-name = "eth0_power";
31 enable-active-high;
36 clock-frequency = <48000000>;
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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/dma/
Djz4780-dma.txt1 * Ingenic JZ4780 DMA Controller
5 - compatible: Should be "ingenic,jz4780-dma"
6 - reg: Should contain the DMA controller registers location and length.
7 - interrupts: Should contain the interrupt specifier of the DMA controller.
8 - clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
9 - #dma-cells: Must be <2>. Number of integer cells in the dmas property of
14 - ingenic,reserved-channels: Bitmask of channels to reserve for devices that
17 can be configured to have special behaviour for NAND/BCH when using
23 compatible = "ingenic,jz4780-dma";
26 interrupt-parent = <&intc>;
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/kernel/linux/linux-4.19/drivers/memory/
DKconfig19 bool "Atmel (Multi-port DDR-)SDRAM Controller"
23 This driver is for Atmel SDRAM Controller or Atmel Multi-port
24 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
26 LP-DDR memories.
36 Used to configure the EBI (external bus interface) when the device-
46 is intended to provide a glue-less interface to a variety of
47 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
60 functions of the driver includes re-configuring AC timing
71 memory drives like NOR, NAND, OneNAND, SRAM.
93 the EMIF PM code must run from on-chip SRAM late in the suspend
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Djz4780-nemc.c2 * JZ4780 NAND/external memory controller (NEMC)
5 * Author: Alex Smith <alex@alex-smith.me.uk>
23 #include <linux/jz4780-nemc.h>
25 #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))
43 #define NEMC_NFCSR_NFEn(n) BIT(((n) - 1) << 1)
44 #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1)
45 #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1)
57 * jz4780_nemc_num_banks() - count the number of banks referenced by a device
71 while ((prop = of_get_address(dev->of_node, i++, NULL, NULL))) { in jz4780_nemc_num_banks()
84 * jz4780_nemc_set_type() - set the type of device connected to a bank
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dingenic,dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: "dma-controller.yaml#"
18 - ingenic,jz4740-dma
19 - ingenic,jz4725b-dma
20 - ingenic,jz4770-dma
21 - ingenic,jz4780-dma
22 - ingenic,x1000-dma
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/kernel/linux/linux-5.10/drivers/memory/
Djz4780-nemc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * JZ4780 NAND/external memory controller (NEMC)
6 * Author: Alex Smith <alex@alex-smith.me.uk>
21 #include <linux/jz4780-nemc.h>
23 #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))
43 #define NEMC_NFCSR_NFEn(n) BIT(((n) - 1) << 1)
44 #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1)
45 #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1)
62 * jz4780_nemc_num_banks() - count the number of banks referenced by a device
76 while ((prop = of_get_address(dev->of_node, i++, NULL, NULL))) { in jz4780_nemc_num_banks()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
34 bool "Atmel (Multi-port DDR-)SDRAM Controller"
39 This driver is for Atmel SDRAM Controller or Atmel Multi-port
40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
42 LP-DDR memories.
53 Used to configure the EBI (external bus interface) when the device-
70 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
74 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
75 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
77 tags and way-select latencies of RAM access. This driver provides a
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/kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/
Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "jz4780.dtsi"
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
12 compatible = "img,ci20", "ingenic,jz4780";
22 stdout-path = &uart4;
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dingenic,nemc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^memory-controller@[0-9a-f]+$"
18 - enum:
19 - ingenic,jz4740-nemc
20 - ingenic,jz4780-nemc
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/kernel/linux/linux-5.10/include/linux/
Djz4780-nemc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * JZ4780 NAND/external memory controller (NEMC)
6 * Author: Alex Smith <alex@alex-smith.me.uk>
23 * enum jz4780_nemc_bank_type - device types which can be connected to a bank
25 * @JZ4780_NEMC_BANK_NAND: NAND
/kernel/linux/linux-4.19/include/linux/
Djz4780-nemc.h2 * JZ4780 NAND/external memory controller (NEMC)
5 * Author: Alex Smith <alex@alex-smith.me.uk>
27 * enum jz4780_nemc_bank_type - device types which can be connected to a bank
29 * @JZ4780_NEMC_BANK_NAND: NAND
/kernel/linux/linux-4.19/drivers/pinctrl/
Dpinctrl-ingenic.c18 #include <linux/pinctrl/pinconf-generic.h>
140 INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
141 INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
142 INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
143 INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
144 INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
145 INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
146 INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
147 INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),
148 INGENIC_PIN_GROUP("lcd-18bit-tft", jz4740_lcd_18bit_tft),
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/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-ingenic.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/pinctrl/pinconf-generic.h>
169 INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),
170 INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),
171 INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),
172 INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),
173 INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),
174 INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),
175 INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),
176 INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/linux-4.19/
DMAINTAINERS28 'diff -u' to make the patch easy to merge. Be prepared to get your
38 See Documentation/process/coding-style.rst for guidance here.
44 See Documentation/process/submitting-patches.rst for details.
55 include a Signed-off-by: line. The current version of this
57 Documentation/process/submitting-patches.rst.
68 that the bug would present a short-term risk to other users if it
84 W: Web-page with status/info
85 B: URI for where to file bugs. A web-page with detailed bug
109 N: [^a-z]tegra all files whose path contains the word tegra
137 -----------------------------------
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