| /kernel/linux/linux-5.10/include/linux/ |
| D | clk.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/include/linux/clk.h
7 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
17 struct clk;
22 * DOC: clk notifier callback types
24 * PRE_RATE_CHANGE - called immediately before the clk rate is changed,
25 * to indicate that the rate change will proceed. Drivers must
27 * rate change. Callbacks may either return NOTIFY_DONE, NOTIFY_OK,
30 * ABORT_RATE_CHANGE: called if the rate change failed for some reason
32 * the clk will be called with ABORT_RATE_CHANGE. Callbacks must
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| /kernel/linux/linux-4.19/include/linux/ |
| D | clk.h | 2 * linux/include/linux/clk.h
6 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
20 struct clk;
25 * DOC: clk notifier callback types
27 * PRE_RATE_CHANGE - called immediately before the clk rate is changed,
28 * to indicate that the rate change will proceed. Drivers must
30 * rate change. Callbacks may either return NOTIFY_DONE, NOTIFY_OK,
33 * ABORT_RATE_CHANGE: called if the rate change failed for some reason
35 * the clk will be called with ABORT_RATE_CHANGE. Callbacks must
38 * POST_RATE_CHANGE - called after the clk rate change has successfully
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
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| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/pwm/pwm-tegra.c
5 * Tegra pulse-width-modulation controller driver
7 * Copyright (c) 2010-2020, NVIDIA Corporation.
8 * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de>
11 * 1. 13-bit: Frequency division (SCALE)
12 * 2. 8-bit : Pulse division (DUTY)
13 * 3. 1-bit : Enable bit
18 * achieved is (max rate of source clock) / 256.
19 * e.g. if source clock rate is 408 MHz, maximum output frequency can be:
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| /kernel/linux/linux-4.19/drivers/gpu/drm/msm/edp/ |
| D | edp_ctrl.c | 2 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
14 #include <linux/clk.h>
33 #define EDP_TRAIN_FAIL -1
72 struct clk *aux_clk;
73 struct clk *pixel_clk;
74 struct clk *ahb_clk;
75 struct clk *link_clk;
76 struct clk *mdp_core_clk;
122 u32 rate; /* in kHz */ member
130 {119000, 31, 211}, /* WSXGA+ 1680x1050@60Hz CVT */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/edp/ |
| D | edp_ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <linux/clk.h>
25 #define EDP_TRAIN_FAIL -1
64 struct clk *aux_clk;
65 struct clk *pixel_clk;
66 struct clk *ahb_clk;
67 struct clk *link_clk;
68 struct clk *mdp_core_clk;
113 u32 rate; /* in kHz */ member
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| /kernel/linux/linux-4.19/drivers/pwm/ |
| D | pwm-tegra.c | 2 * drivers/pwm/pwm-tegra.c
4 * Tegra pulse-width-modulation controller driver
7 * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de>
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24 #include <linux/clk.h>
53 struct clk *clk; member
70 return readl(chip->regs + (num << 4)); in pwm_readl()
76 writel(val, chip->regs + (num << 4)); in pwm_writel()
83 unsigned long long c = duty_ns, hz; in tegra_pwm_config() local
84 unsigned long rate; in tegra_pwm_config() local
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | sh-cpufreq.c | 4 * Copyright (C) 2002 - 2012 Paul Mundt
7 * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
9 * Copyright (C) 2004-2007 Atmel Corporation
27 #include <linux/clk.h>
31 static DEFINE_PER_CPU(struct clk, sh_cpuclk);
46 struct cpufreq_policy *policy = target->policy; in __sh_cpufreq_target()
47 int cpu = policy->cpu; in __sh_cpufreq_target()
48 struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu); in __sh_cpufreq_target()
54 return -ENODEV; in __sh_cpufreq_target()
58 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
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| D | imx6q-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk.h>
11 #include <linux/nvmem-consumer.h>
68 old_freq = clk_get_rate(clks[ARM].clk) / 1000; in imx6q_set_target()
81 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target()
111 * For i.MX6UL, it has a secondary clk mux, the cpu frequency change in imx6q_set_target()
114 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target()
115 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target()
116 * - Disable pll2_pfd2_396m_clk in imx6q_set_target()
127 clk_set_rate(clks[ARM].clk, (old_freq >> 1) * 1000); in imx6q_set_target()
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| D | s3c24xx-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2006-2008 Simtec Electronics
18 #include <linux/clk.h>
24 #include <linux/soc/samsung/s3c-cpufreq-core.h>
25 #include <linux/soc/samsung/s3c-pm.h>
30 /* note, cpufreq support deals in kHz, no Hz */
39 static struct clk *_clk_mpll;
40 static struct clk *_clk_xtal;
41 static struct clk *clk_fclk;
42 static struct clk *clk_hclk;
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| /kernel/linux/linux-4.19/drivers/cpufreq/ |
| D | sh-cpufreq.c | 4 * Copyright (C) 2002 - 2012 Paul Mundt
7 * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
9 * Copyright (C) 2004-2007 Atmel Corporation
27 #include <linux/clk.h>
31 static DEFINE_PER_CPU(struct clk, sh_cpuclk);
46 struct cpufreq_policy *policy = target->policy; in __sh_cpufreq_target()
47 int cpu = policy->cpu; in __sh_cpufreq_target()
48 struct clk *cpuclk = &per_cpu(sh_cpuclk, cpu); in __sh_cpufreq_target()
54 return -ENODEV; in __sh_cpufreq_target()
58 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
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| D | imx6q-cpufreq.c | 9 #include <linux/clk.h>
15 #include <linux/nvmem-consumer.h>
74 old_freq = clk_get_rate(clks[ARM].clk) / 1000; in imx6q_set_target()
87 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target()
117 * For i.MX6UL, it has a secondary clk mux, the cpu frequency change in imx6q_set_target()
120 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target()
121 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target()
122 * - Disable pll2_pfd2_396m_clk in imx6q_set_target()
133 clk_set_rate(clks[ARM].clk, (old_freq >> 1) * 1000); in imx6q_set_target()
134 clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk); in imx6q_set_target()
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| D | s3c24xx-cpufreq.c | 2 * Copyright (c) 2006-2008 Simtec Electronics
21 #include <linux/clk.h>
32 #include <plat/cpu-freq-core.h>
34 #include <mach/regs-clock.h>
36 /* note, cpufreq support deals in kHz, no Hz */
46 static struct clk *_clk_mpll;
47 static struct clk *_clk_xtal;
48 static struct clk *clk_fclk;
49 static struct clk *clk_hclk;
50 static struct clk *clk_pclk;
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| /kernel/linux/linux-4.19/drivers/firmware/arm_scmi/ |
| D | clock.c | 1 // SPDX-License-Identifier: GPL-2.0
48 } rate[0]; member
70 struct scmi_clock_info *clk; member
85 attr = t->rx.buf; in scmi_clock_protocol_attributes_get()
89 ci->num_clocks = le16_to_cpu(attr->num_clocks); in scmi_clock_protocol_attributes_get()
90 ci->max_async_req = attr->max_async_req; in scmi_clock_protocol_attributes_get()
98 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get() argument
109 *(__le32 *)t->tx.buf = cpu_to_le32(clk_id); in scmi_clock_attributes_get()
110 attr = t->rx.buf; in scmi_clock_attributes_get()
114 strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE); in scmi_clock_attributes_get()
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| /kernel/linux/linux-4.19/drivers/opp/ |
| D | core.c | 4 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
16 #include <linux/clk.h>
28 * The root of the list of all opp-tables. All opp_table structures branch off
41 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
42 if (opp_dev->dev == dev) in _find_opp_dev()
60 return ERR_PTR(-ENODEV); in _find_opp_table_unlocked()
64 * _find_opp_table() - find opp_table struct using device pointer
69 * Return: pointer to 'struct opp_table' if found, otherwise -ENODEV or
70 * -EINVAL based on type of error.
80 return ERR_PTR(-EINVAL); in _find_opp_table()
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| D | ti-opp-supply.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
11 #include <linux/clk.h>
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
49 * struct ti_opp_supply_of_data - device tree match data
52 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume
53 * milli-volts.
64 * _store_optimized_voltages() - store optimized voltages
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| /kernel/linux/linux-5.10/drivers/firmware/arm_scmi/ |
| D | clock.c | 1 // SPDX-License-Identifier: GPL-2.0
50 } rate[0]; member
74 struct scmi_clock_info *clk; member
89 attr = t->rx.buf; in scmi_clock_protocol_attributes_get()
93 ci->num_clocks = le16_to_cpu(attr->num_clocks); in scmi_clock_protocol_attributes_get()
94 ci->max_async_req = attr->max_async_req; in scmi_clock_protocol_attributes_get()
102 u32 clk_id, struct scmi_clock_info *clk) in scmi_clock_attributes_get() argument
113 put_unaligned_le32(clk_id, t->tx.buf); in scmi_clock_attributes_get()
114 attr = t->rx.buf; in scmi_clock_attributes_get()
118 strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE); in scmi_clock_attributes_get()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/imu/ |
| D | adi,adis16480.txt | 6 - compatible: Must be one of
12 * "adi,adis16495-1"
13 * "adi,adis16495-2"
14 * "adi,adis16495-3"
15 * "adi,adis16497-1"
16 * "adi,adis16497-2"
17 * "adi,adis16497-3"
18 - reg: SPI chip select number for the device
19 - spi-max-frequency: Max SPI frequency to use
20 see: Documentation/devicetree/bindings/spi/spi-bus.txt
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | nomadik-mtu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
16 #include <linux/clk.h>
33 /* per-timer registers take 0..3 as argument */
41 #define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
66 static u32 nmdk_cycle; /* write-once */
79 return -readl(mtu_base + MTU_VAL(0)); in nomadik_read_sched_clock()
87 /* Clockevent device: use one-shot mode */
103 /* Timer: configure load and background-load, and fire it up */ in nmdk_clkevt_reset()
145 /* ClockSource: configure load and background-load, and fire it up */ in nmdk_clksrc_reset()
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| /kernel/linux/linux-5.10/drivers/opp/ |
| D | ti-opp-supply.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
11 #include <linux/clk.h>
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
49 * struct ti_opp_supply_of_data - device tree match data
52 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume
53 * milli-volts.
64 * _store_optimized_voltages() - store optimized voltages
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| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
13 #include <linux/clk.h>
25 * The root of the list of all opp-tables. All opp_table structures branch off
38 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
39 if (opp_dev->dev == dev) in _find_opp_dev()
51 mutex_lock(&opp_table->lock); in _find_opp_table_unlocked()
53 mutex_unlock(&opp_table->lock); in _find_opp_table_unlocked()
62 return ERR_PTR(-ENODEV); in _find_opp_table_unlocked()
66 * _find_opp_table() - find opp_table struct using device pointer
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| /kernel/linux/linux-5.10/include/sound/sof/ |
| D | dai-intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
52 /* DMIC max. four controllers for eight microphone channels */
55 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
61 uint32_t mclk_rate; /* mclk frequency in Hz */
62 uint32_t fsync_rate; /* fsync frequency in Hz */
63 uint32_t bclk_rate; /* bclk frequency in Hz */
87 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
91 uint32_t rate; member
95 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
99 uint32_t rate; member
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-s3c.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/mmc/host/sdhci-s3c.c
14 #include <linux/dma-mapping.h>
16 #include <linux/platform_data/mmc-sdhci-s3c.h>
18 #include <linux/clk.h>
104 * struct sdhci_s3c - S3C SDHCI instance
114 * @no_divider: No or non-standard internal clock divider.
124 struct clk *clk_io;
125 struct clk *clk_bus[MAX_BUS_CLK];
132 * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
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| /kernel/linux/linux-4.19/drivers/mmc/host/ |
| D | sdhci-s3c.c | 1 /* linux/drivers/mmc/host/sdhci-s3c.c
17 #include <linux/dma-mapping.h>
19 #include <linux/platform_data/mmc-sdhci-s3c.h>
21 #include <linux/clk.h>
107 * struct sdhci_s3c - S3C SDHCI instance
125 struct clk *clk_io;
126 struct clk *clk_bus[MAX_BUS_CLK];
133 * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
151 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
154 * Callback to return the maximum clock rate acheivable by the controller.
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| /kernel/linux/linux-4.19/drivers/clocksource/ |
| D | nomadik-mtu.c | 4 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
19 #include <linux/clk.h>
36 /* per-timer registers take 0..3 as argument */
44 #define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
69 static u32 nmdk_cycle; /* write-once */
83 return -readl(mtu_base + MTU_VAL(0)); in nomadik_read_sched_clock()
92 /* Clockevent device: use one-shot mode */
108 /* Timer: configure load and background-load, and fire it up */ in nmdk_clkevt_reset()
150 /* ClockSource: configure load and background-load, and fire it up */ in nmdk_clksrc_reset()
185 evdev->event_handler(evdev); in nmdk_timer_interrupt()
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