| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; 41 interrupt-parent = <&wakeupgen>; [all …]
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| D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 20 compatible = "arm,cortex-a15-pmu"; 21 interrupt-parent = <&wakeupgen>; 27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */ 28 compatible = "ti,sysc-omap4", "ti,sysc"; 31 reg-names = "rev", "sysc"; 32 ti,sysc-midle = <SYSC_IDLE_FORCE>, 34 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 37 clock-names = "fck"; [all …]
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| D | omap2420.dtsi | 4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 18 compatible = "ti,omap2-l4", "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 24 compatible = "ti,omap2-prcm"; 28 #address-cells = <1>; 29 #size-cells = <0>; 37 compatible = "ti,omap2-scm", "simple-bus"; 39 #address-cells = <1>; 40 #size-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/mux/ti-serdes.h> 12 cmn_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 18 cmn_refclk1: clock-cmnrefclk1 { [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | altera-mailbox.txt | 5 - compatible : "altr,mailbox-1.0". 6 - reg : physical base address of the mailbox and length of 8 - #mbox-cells: Common mailbox binding property to identify the number 12 - interrupts : interrupt number. The interrupt specifier format 17 compatible = "altr,mailbox-1.0"; 19 interrupt-parent = < &gic_0 >; 21 #mbox-cells = <1>; 25 compatible = "altr,mailbox-1.0"; 27 interrupt-parent = < &gic_0 >; 29 #mbox-cells = <1>; [all …]
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| D | sti-mailbox.txt | 7 ---------- 10 - compatible : Should be "st,stih407-mailbox" 11 - reg : Offset and length of the device's register set 12 - mbox-name : Name of the mailbox 13 - #mbox-cells: : Must be 2 20 - interrupts : Contains the IRQ line for a Rx mailbox 25 compatible = "st,stih407-mailbox"; 28 #mbox-cells = <2>; 29 mbox-name = "a9"; 33 ------ [all …]
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| D | hisilicon,hi6220-mailbox.txt | 13 -------------------- 14 - compatible: Shall be "hisilicon,hi6220-mbox" 15 - reg: Contains the mailbox register address range (base 19 - #mbox-cells: Common mailbox binding property to identify the number 28 - interrupts: Contains the interrupt information for the mailbox 33 -------------------- 34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver 40 -------- 43 compatible = "hisilicon,hi6220-mbox"; 46 interrupt-parent = <&gic>; [all …]
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| D | xlnx,zynqmp-ipi-mailbox.txt | 8 +-------------------------------------+ 10 +-------------------------------------+ 11 +--------------------------------------------------+ 15 +--------------------------+ | 18 +--------------------------------------------------+ 19 +------------------------------------------+ 20 | +----------------+ +----------------+ | 24 | +----------------+ +----------------+ | 27 +------------------------------------------+ 33 -------------------- [all …]
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| D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 14 - Sivaprakash Murugesan <sivaprak@codeaurora.org> 19 - qcom,ipq6018-apcs-apps-global 20 - qcom,ipq8074-apcs-apps-global 21 - qcom,msm8916-apcs-kpss-global 22 - qcom,msm8994-apcs-kpss-global 23 - qcom,msm8996-apcs-hmss-global [all …]
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| D | ti,secure-proxy.txt | 7 called "threads" or "proxies" - each instance is unidirectional and is 14 -------------------- 15 - compatible: Shall be "ti,am654-secure-proxy" 16 - reg-names target_data - Map the proxy data region 17 rt - Map the realtime status region 18 scfg - Map the configuration region 19 - reg: Contains the register map per reg-names. 20 - #mbox-cells Shall be 1 and shall refer to the transfer path 22 - interrupt-names: Contains interrupt names matching the rx transfer path 25 - interrupts: Contains the interrupt information corresponding to [all …]
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| D | omap-mailbox.txt | 25 routed to different processor sub-systems on DRA7xx as they are routed through 35 a SoC. The sub-mailboxes are represented as child nodes of this parent node. 38 -------------------- 39 - compatible: Should be one of the following, 40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs 41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs 42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, 44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs 45 - reg: Contains the mailbox register address range (base 47 - interrupts: Contains the interrupt information for the mailbox [all …]
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| D | ti,message-manager.txt | 7 "proxies" - each instance is unidirectional and is instantiated at SoC 13 -------------------- 14 - compatible: Shall be: "ti,k2g-message-manager" 15 - reg-names queue_proxy_region - Map the queue proxy region. 16 queue_state_debug_region - Map the queue state debug 18 - reg: Contains the register map per reg-names. 19 - #mbox-cells Shall be 2. Contains the queue ID and proxy ID in that 21 - interrupt-names: Contains interrupt names matching the rx transfer path 24 For ti,k2g-message-manager, this shall contain: 26 - interrupts: Contains the interrupt information corresponding to [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mailbox/ |
| D | altera-mailbox.txt | 5 - compatible : "altr,mailbox-1.0". 6 - reg : physical base address of the mailbox and length of 8 - #mbox-cells: Common mailbox binding property to identify the number 12 - interrupts : interrupt number. The interrupt specifier format 17 compatible = "altr,mailbox-1.0"; 19 interrupt-parent = < &gic_0 >; 21 #mbox-cells = <1>; 25 compatible = "altr,mailbox-1.0"; 27 interrupt-parent = < &gic_0 >; 29 #mbox-cells = <1>; [all …]
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| D | sti-mailbox.txt | 7 ---------- 10 - compatible : Should be "st,stih407-mailbox" 11 - reg : Offset and length of the device's register set 12 - mbox-name : Name of the mailbox 13 - #mbox-cells: : Must be 2 20 - interrupts : Contains the IRQ line for a Rx mailbox 25 compatible = "st,stih407-mailbox"; 28 #mbox-cells = <2>; 29 mbox-name = "a9"; 33 ------ [all …]
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| D | hisilicon,hi6220-mailbox.txt | 13 -------------------- 14 - compatible: Shall be "hisilicon,hi6220-mbox" 15 - reg: Contains the mailbox register address range (base 19 - #mbox-cells: Common mailbox binding property to identify the number 28 - interrupts: Contains the interrupt information for the mailbox 33 -------------------- 34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver 40 -------- 43 compatible = "hisilicon,hi6220-mbox"; 46 interrupt-parent = <&gic>; [all …]
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| D | omap-mailbox.txt | 25 routed to different processor sub-systems on DRA7xx as they are routed through 31 The sub-mailboxes are represented as child nodes of this parent node. 34 -------------------- 35 - compatible: Should be one of the following, 36 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs 37 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs 38 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, 40 - reg: Contains the mailbox register address range (base 42 - interrupts: Contains the interrupt information for the mailbox 45 - ti,hwmods: Name of the hwmod associated with the mailbox [all …]
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| D | ti,secure-proxy.txt | 7 called "threads" or "proxies" - each instance is unidirectional and is 14 -------------------- 15 - compatible: Shall be "ti,am654-secure-proxy" 16 - reg-names target_data - Map the proxy data region 17 rt - Map the realtime status region 18 scfg - Map the configuration region 19 - reg: Contains the register map per reg-names. 20 - #mbox-cells Shall be 1 and shall refer to the transfer path 22 - interrupt-names: Contains interrupt names matching the rx transfer path 25 - interrupts: Contains the interrupt information corresponding to [all …]
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| D | ti,message-manager.txt | 7 "proxies" - each instance is unidirectional and is instantiated at SoC 13 -------------------- 14 - compatible: Shall be: "ti,k2g-message-manager" 15 - reg-names queue_proxy_region - Map the queue proxy region. 16 queue_state_debug_region - Map the queue state debug 18 - reg: Contains the register map per reg-names. 19 - #mbox-cells Shall be 2. Contains the queue ID and proxy ID in that 21 - interrupt-names: Contains interrupt names matching the rx transfer path 24 For ti,k2g-message-manager, this shall contain: 26 - interrupts: Contains the interrupt information corresponding to [all …]
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| D | nvidia,tegra186-hsp.txt | 13 - name : Should be hsp 14 - compatible 17 - "nvidia,tegra186-hsp" 18 - reg : Offset and length of the register set for the device. 19 - interrupt-names 21 Contains a list of names for the interrupts described by the interrupt 23 - "doorbell" 25 by name, using this interrupt-names property to do so. 26 - interrupts 28 Must contain one entry per entry in the interrupt-names property, [all …]
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | dra74x.dtsi | 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 18 compatible = "arm,cortex-a15"; 20 operating-points-v2 = <&cpu0_opp_table>; 23 clock-names = "cpu"; 25 clock-latency = <300000>; /* From omap-cpufreq driver */ 28 #cooling-cells = <2>; /* min followed by max */ 30 vbb-supply = <&abb_mpu>; 35 compatible = "arm,cortex-a15-pmu"; 36 interrupt-parent = <&wakeupgen>; 52 #address-cells = <1>; [all …]
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| D | dra7.dtsi | 2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 10 #include <dt-bindings/bus/ti-sysc.h> 11 #include <dt-bindings/clock/dra7.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/pinctrl/dra.h> 14 #include <dt-bindings/clock/dra7.h> 19 #address-cells = <2>; 20 #size-cells = <2>; 23 interrupt-parent = <&crossbar_mpu>; 50 compatible = "arm,armv7-timer"; [all …]
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| D | omap2420.dtsi | 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 18 compatible = "ti,omap2-l4", "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 24 compatible = "ti,omap2-prcm"; 28 #address-cells = <1>; 29 #size-cells = <0>; 37 compatible = "ti,omap2-scm", "simple-bus"; 39 #address-cells = <1>; 40 #size-cells = <1>; [all …]
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| D | dra72x.dtsi | 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 16 compatible = "arm,cortex-a15-pmu"; 17 interrupt-parent = <&wakeupgen>; 26 reg-names = "dss", "pll1_clkctrl", "pll1"; 30 clock-names = "fck", "video1_clk"; 35 ti,mbox-tx = <6 2 2>; 36 ti,mbox-rx = <4 2 2>; 40 ti,mbox-tx = <5 2 2>; 41 ti,mbox-rx = <1 2 2>; 48 ti,mbox-tx = <6 2 2>; [all …]
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| /kernel/linux/linux-4.19/drivers/mailbox/ |
| D | mailbox.c | 4 * Copyright (C) 2013-2014 Linaro Ltd. 34 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf() 37 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf() 38 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf() 39 return -ENOBUFS; in add_to_rbuf() 42 idx = chan->msg_free; in add_to_rbuf() 43 chan->msg_data[idx] = mssg; in add_to_rbuf() 44 chan->msg_count++; in add_to_rbuf() 46 if (idx == MBOX_TX_QUEUE_LEN - 1) in add_to_rbuf() 47 chan->msg_free = 0; in add_to_rbuf() [all …]
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