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/kernel/linux/linux-5.10/drivers/mux/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 mux-core-objs := core.o
7 mux-adg792a-objs := adg792a.o
8 mux-adgs1408-objs := adgs1408.o
9 mux-gpio-objs := gpio.o
10 mux-mmio-objs := mmio.o
12 obj-$(CONFIG_MULTIPLEXER) += mux-core.o
13 obj-$(CONFIG_MUX_ADG792A) += mux-adg792a.o
14 obj-$(CONFIG_MUX_ADGS1408) += mux-adgs1408.o
15 obj-$(CONFIG_MUX_GPIO) += mux-gpio.o
[all …]
Dmmio.c1 // SPDX-License-Identifier: GPL-2.0
3 * MMIO register bitfield-controlled multiplexer driver
12 #include <linux/mux/driver.h>
18 static int mux_mmio_set(struct mux_control *mux, int state) in mux_mmio_set() argument
20 struct regmap_field **fields = mux_chip_priv(mux->chip); in mux_mmio_set()
22 return regmap_field_write(fields[mux_control_get_index(mux)], state); in mux_mmio_set()
30 { .compatible = "mmio-mux", },
31 { .compatible = "reg-mux", },
38 struct device *dev = &pdev->dev; in mux_mmio_probe()
39 struct device_node *np = dev->of_node; in mux_mmio_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
22 be called mux-adg792a.
32 be called mux-adgs1408.
35 tristate "GPIO-controlled Multiplexer"
38 GPIO-controlled Multiplexer controller.
46 be called mux-gpio.
49 tristate "MMIO/Regmap register bitfield-controlled Multiplexer"
52 MMIO/Regmap register bitfield-controlled Multiplexer controller.
59 be called mux-mmio.
/kernel/linux/linux-4.19/drivers/mux/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 mux-core-objs := core.o
7 mux-adg792a-objs := adg792a.o
8 mux-adgs1408-objs := adgs1408.o
9 mux-gpio-objs := gpio.o
10 mux-mmio-objs := mmio.o
12 obj-$(CONFIG_MULTIPLEXER) += mux-core.o
13 obj-$(CONFIG_MUX_ADG792A) += mux-adg792a.o
14 obj-$(CONFIG_MUX_ADGS1408) += mux-adgs1408.o
15 obj-$(CONFIG_MUX_GPIO) += mux-gpio.o
[all …]
Dmmio.c1 // SPDX-License-Identifier: GPL-2.0
3 * MMIO register bitfield-controlled multiplexer driver
12 #include <linux/mux/driver.h>
18 static int mux_mmio_set(struct mux_control *mux, int state) in mux_mmio_set() argument
20 struct regmap_field **fields = mux_chip_priv(mux->chip); in mux_mmio_set()
22 return regmap_field_write(fields[mux_control_get_index(mux)], state); in mux_mmio_set()
30 { .compatible = "mmio-mux", },
37 struct device *dev = &pdev->dev; in mux_mmio_probe()
38 struct device_node *np = dev->of_node; in mux_mmio_probe()
46 regmap = syscon_node_to_regmap(np->parent); in mux_mmio_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
22 be called mux-adg792a.
32 be called mux-adgs1408.
35 tristate "GPIO-controlled Multiplexer"
38 GPIO-controlled Multiplexer controller.
46 be called mux-gpio.
49 tristate "MMIO register bitfield-controlled Multiplexer"
52 MMIO register bitfield-controlled Multiplexer controller.
59 be called mux-mmio.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dti,am654-hbmc.txt4 - compatible : "ti,am654-hbmc" for AM654 SoC
5 - reg : Two entries:
8 MMIO access to attached flash devices
9 - ranges : Address translation from offset within CS to allocated MMIO
13 - mux-controls : phandle to the multiplexer that controls selection of
16 See Documentation/devicetree/bindings/mux/reg-mux.txt
17 for mmio-mux binding details
21 system-controller@47000000 {
22 compatible = "syscon", "simple-mfd";
24 #address-cells = <2>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/mux/
Dmmio-mux.txt1 MMIO register bitfield-based multiplexer controller bindings
7 - compatible : "mmio-mux"
8 - #mux-control-cells : <1>
9 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
10 pairs, each describing a single mux control.
11 * Standard mux-controller bindings as decribed in mux-controller.txt
14 - idle-states : if present, the state the muxes will have when idle. The
19 in the mux-reg-masks array, accessed through the parent syscon.
26 mux: mux-controller {
27 compatible = "mmio-mux";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio-mux-multiplexer.txt3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
4 of a mux producer device. The mux producer can be of any type like mmio mux
5 producer, gpio mux producer or generic register based mux producer.
9 - compatible : should be "mmio-mux-multiplexer"
10 - mux-controls : mux controller node to use for operating the mux
11 - mdio-parent-bus : phandle to the parent MDIO bus.
17 Documentation/devicetree/bindings/mux/mux-controller.txt
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
21 In below example the Mux producer and consumer are separate nodes.
25 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mux/
Dreg-mux.txt1 Generic register bitfield-based multiplexer controller bindings
7 - compatible : should be one of
8 "reg-mux" : if parent device of mux controller is not syscon device
9 "mmio-mux" : if parent device of mux controller is syscon device
10 - #mux-control-cells : <1>
11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
12 pairs, each describing a single mux control.
13 * Standard mux-controller bindings as decribed in mux-controller.txt
16 - idle-states : if present, the state the muxes will have when idle. The
21 pair in the mux-reg-masks array.
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/freescale/
Dpinctrl-imx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
14 #include <linux/pinctrl/pinconf-generic.h>
23 * struct imx_pin_mmio - MMIO pin configurations
24 * @mux_mode: the mux mode for this pin.
38 * struct imx_pin_scu - SCU pin configurations
39 * @mux: the mux mode for this pin.
48 * struct imx_pin - describes a single i.MX pin
50 * @conf: config type of this pin, either mmio or scu
55 struct imx_pin_mmio mmio; member
61 * struct imx_pin_reg - describe a pin reg map
[all …]
Dpinctrl-imx.c1 // SPDX-License-Identifier: GPL-2.0+
28 #include "pinctrl-imx.h"
41 for (i = 0; i < pctldev->num_groups; i++) { in imx_pinctrl_find_group_by_name()
43 if (grp && !strcmp(grp->name, name)) in imx_pinctrl_find_group_by_name()
53 seq_printf(s, "%s", dev_name(pctldev->dev)); in imx_pin_dbg_show()
61 const struct imx_pinctrl_soc_info *info = ipctl->info; in imx_dt_node_to_map()
73 grp = imx_pinctrl_find_group_by_name(pctldev, np->name); in imx_dt_node_to_map()
75 dev_err(ipctl->dev, "unable to find group for node %pOFn\n", np); in imx_dt_node_to_map()
76 return -EINVAL; in imx_dt_node_to_map()
79 if (info->flags & IMX_USE_SCU) { in imx_dt_node_to_map()
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dahci_xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene SoC SATA Host Controller Driver
22 #define DRV_NAME "xgene-ahci"
27 /* MUX CSR */
88 void __iomem *csr_mux; /* MUX CSR address of IP */
93 dev_dbg(ctx->dev, "Release memory from shutdown\n"); in xgene_ahci_init_memram()
94 writel(0x0, ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); in xgene_ahci_init_memram()
95 readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */ in xgene_ahci_init_memram()
97 if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) { in xgene_ahci_init_memram()
98 dev_err(ctx->dev, "failed to release memory from shutdown\n"); in xgene_ahci_init_memram()
[all …]
/kernel/linux/linux-4.19/drivers/ata/
Dahci_xgene.c2 * AppliedMicro X-Gene SoC SATA Host Controller Driver
35 #define DRV_NAME "xgene-ahci"
40 /* MUX CSR */
101 void __iomem *csr_mux; /* MUX CSR address of IP */
106 dev_dbg(ctx->dev, "Release memory from shutdown\n"); in xgene_ahci_init_memram()
107 writel(0x0, ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); in xgene_ahci_init_memram()
108 readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */ in xgene_ahci_init_memram()
110 if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) { in xgene_ahci_init_memram()
111 dev_err(ctx->dev, "failed to release memory from shutdown\n"); in xgene_ahci_init_memram()
112 return -ENODEV; in xgene_ahci_init_memram()
[all …]
/kernel/linux/linux-4.19/drivers/mfd/
Dstm32-lptimer.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
9 #include <linux/mfd/stm32-lptimer.h>
29 * Low-Power Timer supports it. in stm32_lptimer_detect_encoder()
31 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
36 ret = regmap_read(ddata->regmap, STM32_LPTIM_CFGR, &val); in stm32_lptimer_detect_encoder()
40 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
45 ddata->has_encoder = !!(val & STM32_LPTIM_ENC); in stm32_lptimer_detect_encoder()
52 struct device *dev = &pdev->dev; in stm32_lptimer_probe()
[all …]
/kernel/linux/linux-5.10/drivers/mfd/
Dstm32-lptimer.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
9 #include <linux/mfd/stm32-lptimer.h>
30 * Low-Power Timer supports it. in stm32_lptimer_detect_encoder()
32 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
37 ret = regmap_read(ddata->regmap, STM32_LPTIM_CFGR, &val); in stm32_lptimer_detect_encoder()
41 ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR, in stm32_lptimer_detect_encoder()
46 ddata->has_encoder = !!(val & STM32_LPTIM_ENC); in stm32_lptimer_detect_encoder()
53 struct device *dev = &pdev->dev; in stm32_lptimer_probe()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dti,j721e-system-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 represent as any specific type of device. The typical use-case is
15 for some other node's driver, or platform-specific code, to acquire
22 - Kishon Vijay Abraham I <kishon@ti.com>
23 - Roger Quadros <rogerq@ti.com
28 - enum:
[all …]
/kernel/linux/linux-4.19/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
14 * DSI PLL 10nm - clock diagram (eg: DSI0):
19 * +---------+ | +----------+ | +----+
20 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
21 * +---------+ | +----------+ | +----+
25 * | | +----+ | |\ dsi0_pclk_mux
26 * | |--| /2 |--o--| \ |
27 * | | +----+ | \ | +---------+
28 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-dw-bt1.c1 // SPDX-License-Identifier: GPL-2.0-only
9 // Baikal-T1 DW APB SPI and System Boot SPI driver
17 #include <linux/mux/consumer.h>
24 #include <linux/spi/spi-mem.h>
27 #include "spi-dw.h"
35 struct mux_control *mux; member
52 struct dw_spi_bt1 *dwsbt1 = to_dw_spi_bt1(desc->mem->spi->controller); in dw_spi_bt1_dirmap_create()
54 if (!dwsbt1->map || in dw_spi_bt1_dirmap_create()
55 !dwsbt1->dws.mem_ops.supports_op(desc->mem, &desc->info.op_tmpl)) in dw_spi_bt1_dirmap_create()
56 return -EOPNOTSUPP; in dw_spi_bt1_dirmap_create()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_7nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
14 * DSI PLL 7nm - clock diagram (eg: DSI0): TODO: updated CPHY diagram
19 * +---------+ | +----------+ | +----+
20 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
21 * +---------+ | +----------+ | +----+
25 * | | +----+ | |\ dsi0_pclk_mux
26 * | |--| /2 |--o--| \ |
27 * | | +----+ | \ | +---------+
28 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
Ddsi_pll_10nm.c2 * SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
14 * DSI PLL 10nm - clock diagram (eg: DSI0):
19 * +---------+ | +----------+ | +----+
20 * dsi0vco_clk ---| out_div |--o--| divl_3_0 |--o--| /8 |-- dsi0_phy_pll_out_byteclk
21 * +---------+ | +----------+ | +----+
25 * | | +----+ | |\ dsi0_pclk_mux
26 * | |--| /2 |--o--| \ |
27 * | | +----+ | \ | +---------+
28 …* | --------------| |--o--| div_7_4 |-- dsi0_phy_pll_…
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
27 compatible = "ti,k2g-sci-clk";
[all …]
Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
21 scm_conf: scm-conf@100000 {
22 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
24 #address-cells = <1>;
25 #size-cells = <1>;
[all …]
/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]

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