| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/drx39xyj/ |
| D | drx_dap_fasi.h | 2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc. 48 /*-------- compilation control switches --------------------------------------*/ 53 /*-------- Required includes -------------------------------------------------*/ 57 /*-------- Defines, configuring the API --------------------------------------*/ 60 * Allowed address formats 66 * The DAP FASI offers long address format (4 bytes) and short address format 98 #error At least one of short- or long-addressing format must be allowed. 103 * Single/master multi master setting 106 * Comments about SINGLE MASTER/MULTI MASTER modes: 113 * + multi master mode means use of repeated starts [all …]
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| /kernel/linux/linux-4.19/drivers/media/dvb-frontends/drx39xyj/ |
| D | drx_dap_fasi.h | 2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc. 48 /*-------- compilation control switches --------------------------------------*/ 53 /*-------- Required includes -------------------------------------------------*/ 57 /*-------- Defines, configuring the API --------------------------------------*/ 60 * Allowed address formats 66 * The DAP FASI offers long address format (4 bytes) and short address format 98 #error At least one of short- or long-addressing format must be allowed. 103 * Single/master multi master setting 106 * Comments about SINGLE MASTER/MULTI MASTER modes: 113 * + multi master mode means use of repeated starts [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | leds-lp50xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dan Murphy <dmurphy@ti.com> 13 The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into 27 - ti,lp5009 28 - ti,lp5012 29 - ti,lp5018 30 - ti,lp5024 [all …]
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| D | cznic,turris-omnia-leds.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/leds/cznic,turris-omnia-leds.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Behún <marek.behun@nic.cz> 20 const: cznic,turris-omnia-leds 23 description: I2C slave address of the microcontroller. 26 "#address-cells": 29 "#size-cells": 33 "^multi-led@[0-9a-b]$": [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand". 5 - reg : should specify localbus chip select and size used for the chip. 6 - fsl,upm-addr-offset : UPM pattern offset for the address latch. 7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch. 10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support. 11 The corresponding address lines are used to select the chip. 12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins 13 (R/B#). For multi-chip devices, "n" GPIO definitions are required 17 - fsl,upm-wait-flags : add chip-dependent short delays after running the 20 - chip-delay : chip dependent delay for transferring data from array to [all …]
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| D | mxic-nand.txt | 2 ------------------------------------------------- 5 - compatible: should be "mxic,multi-itfc-v009-nand-controller" 6 - reg: should contain 1 entry for the registers 7 - #address-cells: should be set to 1 8 - #size-cells: should be set to 0 9 - interrupts: interrupt line connected to this raw NAND controller 10 - clock-names: should contain "ps", "send" and "send_dly" 11 - clocks: should contain 3 phandles for the "ps", "send" and 15 - children nodes represent the available NAND chips. 17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml [all …]
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | planar-apis.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. _planar-apis: 6 Single- and multi-planar APIs 11 has to be addressed using more than one memory address, i.e. one pointer 12 per "plane". A plane is a sub-buffer of the current frame. For examples 15 Initially, V4L2 API did not support multi-planar buffers and a set of 17 constitute what is being referred to as the "multi-planar API". 20 depending on whether single- or multi-planar API is being used. An 22 corresponding buffer type to its ioctl calls. Multi-planar versions of 24 available multi-planar buffer types see enum [all …]
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| /kernel/linux/linux-4.19/Documentation/media/uapi/v4l/ |
| D | planar-apis.rst | 1 .. -*- coding: utf-8; mode: rst -*- 3 .. _planar-apis: 6 Single- and multi-planar APIs 11 has to be addressed using more than one memory address, i.e. one pointer 12 per "plane". A plane is a sub-buffer of the current frame. For examples 15 Initially, V4L2 API did not support multi-planar buffers and a set of 17 constitute what is being referred to as the "multi-planar API". 20 depending on whether single- or multi-planar API is being used. An 22 corresponding buffer type to its ioctl calls. Multi-planar versions of 24 available multi-planar buffer types see enum [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/ |
| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand". 5 - reg : should specify localbus chip select and size used for the chip. 6 - fsl,upm-addr-offset : UPM pattern offset for the address latch. 7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch. 10 - fsl,upm-wait-flags : add chip-dependent short delays after running the 13 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support. 14 The corresponding address lines are used to select the chip. 15 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins 16 (R/B#). For multi-chip devices, "n" GPIO definitions are required 18 - chip-delay : chip dependent delay for transferring data from array to [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/ti/ |
| D | keystone-navigator-qmss.txt | 5 multi-core Navigator. QMSS consist of queue managers, packed-data structure 9 management of the packet queues. Packets are queued/de-queued by writing or 10 reading descriptor address to a particular memory mapped location. The PDSPs 20 - compatible : Must be "ti,keystone-navigator-qmss". 21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC. 22 - clocks : phandle to the reference clock for this device. 23 - queue-range : <start number> total range of queue numbers for the device. 24 - linkram0 : <address size> for internal link ram, where size is the total 26 - linkram1 : <address size> for external link ram, where size is the total 27 external link ram entries. If the address is specified as "0" [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | keystone-navigator-qmss.txt | 5 multi-core Navigator. QMSS consist of queue managers, packed-data structure 9 management of the packet queues. Packets are queued/de-queued by writing or 10 reading descriptor address to a particular memory mapped location. The PDSPs 20 - compatible : Must be "ti,keystone-navigator-qmss". 21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC. 22 - clocks : phandle to the reference clock for this device. 23 - queue-range : <start number> total range of queue numbers for the device. 24 - linkram0 : <address size> for internal link ram, where size is the total 26 - linkram1 : <address size> for external link ram, where size is the total 27 external link ram entries. If the address is specified as "0" [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | fsl-usb.txt | 9 - compatible : Should be "fsl-usb2-mph" for multi port host USB 10 controllers, or "fsl-usb2-dr" for dual role USB controllers 11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121. 13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132). 14 - phy_type : For multi port host USB controllers, should be one of 17 - reg : Offset and length of the register set for the device 18 - port0 : boolean; if defined, indicates port0 is connected for 19 fsl-usb2-mph compatible controllers. Either this property or 20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible 22 - port1 : boolean; if defined, indicates port1 is connected for [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/ |
| D | fsl-usb.txt | 9 - compatible : Should be "fsl-usb2-mph" for multi port host USB 10 controllers, or "fsl-usb2-dr" for dual role USB controllers 11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121. 13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132). 14 - phy_type : For multi port host USB controllers, should be one of 17 - reg : Offset and length of the register set for the device 18 - port0 : boolean; if defined, indicates port0 is connected for 19 fsl-usb2-mph compatible controllers. Either this property or 20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible 22 - port1 : boolean; if defined, indicates port1 is connected for [all …]
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| /kernel/linux/linux-5.10/Documentation/s390/ |
| D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 - Pierre Morel 17 ----------------------- 28 --------------- 36 - /sys/kernel/debug/s390dbf/pci_msg/sprintf 55 - /sys/bus/pci/slots/XXXXXXXX/power 63 - function_id 66 - function_handle 67 Low-level identifier used for a configured PCI function. 70 - pchid [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | cpm.txt | 10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". 11 - reg : A 48-byte region beginning with CPCR. 15 #address-cells = <1>; 16 #size-cells = <1>; 17 #interrupt-cells = <2>; 18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; 24 - fsl,cpm-command : This value is ORed with the opcode and command flag 27 - fsl,cpm-brg : Indicates which baud rate generator the device 32 - reg : Unless otherwise specified, the first resource represents the 36 * Multi-User RAM (MURAM) [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | cpm.txt | 10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". 11 - reg : A 48-byte region beginning with CPCR. 15 #address-cells = <1>; 16 #size-cells = <1>; 17 #interrupt-cells = <2>; 18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; 24 - fsl,cpm-command : This value is ORed with the opcode and command flag 27 - fsl,cpm-brg : Indicates which baud rate generator the device 32 - reg : Unless otherwise specified, the first resource represents the 36 * Multi-User RAM (MURAM) [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/timer/ |
| D | renesas,mtu2.txt | 1 * Renesas Multi-Function Timer Pulse Unit 2 (MTU2) 3 The MTU2 is a multi-purpose, multi-channel timer/counter with configurable 11 - compatible: must be one or more of the following: 12 - "renesas,mtu2-r7s72100" for the r7s72100 MTU2 13 - "renesas,mtu2" for any MTU2 14 This is a fallback for the above renesas,mtu2-* entries 16 - reg: base address and length of the registers block for the timer module. 18 - interrupts: interrupt specifiers for the timer, one for each entry in 19 interrupt-names. 20 - interrupt-names: must contain one entry named "tgi?a" for each enabled [all …]
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| /kernel/linux/linux-5.10/drivers/soc/fsl/qe/ |
| D | qe_common.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc. 11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com> 41 /* max address size we deal with */ 58 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init() 61 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init() 64 ret = -ENODEV; in cpm_muram_init() 69 muram_pool = gen_pool_create(0, -1); in cpm_muram_init() 72 ret = -ENOMEM; in cpm_muram_init() 78 ret = -ENODEV; in cpm_muram_init() [all …]
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| /kernel/linux/linux-4.19/drivers/soc/fsl/qe/ |
| D | qe_common.c | 6 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc. 10 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com> 44 /* max address size we deal with */ 61 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init() 64 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init() 67 ret = -ENODEV; in cpm_muram_init() 72 muram_pool = gen_pool_create(0, -1); in cpm_muram_init() 75 ret = -ENOMEM; in cpm_muram_init() 81 ret = -ENODEV; in cpm_muram_init() 88 ret = gen_pool_add(muram_pool, r.start - muram_pbase + in cpm_muram_init() [all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/arm/freescale/ |
| D | m4if.txt | 1 * Freescale Multi Master Multi Memory Interface (M4IF) module 4 - compatible : Should be "fsl,imx51-m4if" 5 - reg : Address and length of the register set for the device 10 compatible = "fsl,imx51-m4if";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/ |
| D | m4if.txt | 1 * Freescale Multi Master Multi Memory Interface (M4IF) module 4 - compatible : Should be "fsl,imx51-m4if" 5 - reg : Address and length of the register set for the device 10 compatible = "fsl,imx51-m4if";
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| /kernel/linux/linux-4.19/arch/sh/mm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 12 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 15 On other systems (such as the SH-3 and 4) where an MMU exists, 49 hex "Physical memory start address" 51 ---help--- 53 map the ROM starting at address zero. But the processor 56 The physical memory (RAM) start address will be automatically 86 bool "Support 32-bit physical addressing through PMB" 92 32-bits through the SH-4A PMB. If this is not set, legacy 93 29-bit physical addressing will be used. [all …]
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 9 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 12 On other systems (such as the SH-3 and 4) where an MMU exists, 45 hex "Physical memory start address" 49 map the ROM starting at address zero. But the processor 52 The physical memory (RAM) start address will be automatically 81 bool "Support 32-bit physical addressing through PMB" 87 32-bits through the SH-4A PMB. If this is not set, legacy 88 29-bit physical addressing will be used. 114 the address space, each with varying latencies. This enables [all …]
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| /kernel/linux/linux-5.10/arch/sparc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 bool "64-bit kernel" if "$(ARCH)" = "sparc" 10 Say yes to build a 64-bit kernel - formerly known as sparc64 11 Say no to build a 32-bit kernel - formerly known as sparc 164 bool "Symmetric multi-processing support" 170 If you say N here, the kernel will run on uni- and multiprocessor 180 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 233 bool "Support for hot-pluggable CPUs" 245 tristate "UltraSPARC-III Memory Controller driver" 249 This adds a driver for the UltraSPARC-III memory controller. [all …]
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| /kernel/linux/linux-5.10/Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver 8 Front/Rear Multi-channel Playback 9 --------------------------------- 13 DACs, both streams are handled independently unlike the 4/6ch multi- 22 - The first DAC supports U8 and S16LE formats, while the second DAC 24 - The second DAC supports only two channel stereo. 51 control switch in the driver "Line-In As Rear", which you can change 52 via alsamixer or somewhat else. When this switch is on, line-in jack 60 4/6 Multi-Channel Playback 61 -------------------------- [all …]
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