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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
Dallwinner,sun4i-a10-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#gpio-cells":
21 "#interrupt-cells":
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dhi3620-hi4511.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Linaro Ltd.
7 /dts-v1/;
13 compatible = "hisilicon,hi3620-hi4511";
17 stdout-path = "serial0:115200n8";
31 pinctrl-names = "default", "idle";
32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
38 pinctrl-names = "default", "idle";
39 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
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Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/leds/common.h>
8 #include "ste-href-family-pinctrl.dtsi"
18 pinctrl-names = "default", "sleep";
19 pinctrl-0 = <&u0_a_1_default>;
20 pinctrl-1 = <&u0_a_1_sleep>;
26 pinctrl-names = "default", "sleep";
27 pinctrl-0 = <&u1rxtx_a_1_default>;
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Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
14 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 stdout-path = "serial0:115200n8";
27 clk_ext_camera: clk-ext-camera {
28 #clock-cells = <0>;
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Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
13 * You need an intermediate, device-tree compatible bootloader
16 * There is a port of (mainline) U-Boot, see
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Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
28 compatible = "hdmi-connector";
31 ddc-i2c-bus = <&hdmiddc0>;
35 remote-endpoint = <&hdmi0_out>;
42 proc-supply = <&mt6323_vproc_reg>;
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Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "Samsung XCover 2 (GT-S7710)";
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Dimx28-m28evk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include "imx28-m28.dtsi"
17 compatible = "fsl,imx28-mmc";
18 pinctrl-names = "default";
19 pinctrl-0 = <&mmc0_8bit_pins_a
22 bus-width = <8>;
23 wp-gpios = <&gpio3 10 0>;
24 vmmc-supply = <&reg_vddio_sd0>;
29 #address-cells = <1>;
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Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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Dimx6qdl-gw5912.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
22 stdout-path = &uart2;
25 gpio-keys {
26 compatible = "gpio-keys";
27 #address-cells = <1>;
28 #size-cells = <0>;
30 user-pb {
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/kernel/linux/linux-4.19/arch/arm/boot/dts/
Dhi3620-hi4511.dts2 * Copyright (C) 2012-2013 Linaro Ltd.
10 /dts-v1/;
16 compatible = "hisilicon,hi3620-hi4511";
20 stdout-path = "serial0:115200n8";
34 pinctrl-names = "default", "idle";
35 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
36 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
41 pinctrl-names = "default", "idle";
42 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
43 pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
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Dste-href.dtsi2 * Copyright 2012 ST-Ericsson AB
8 * http://www.opensource.org/licenses/gpl-license.html
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "ste-dbx5x0.dtsi"
14 #include "ste-href-family-pinctrl.dtsi"
23 pinctrl-names = "default", "sleep";
24 pinctrl-0 = <&uart0_default_mode>;
25 pinctrl-1 = <&uart0_sleep_mode>;
31 pinctrl-names = "default", "sleep";
32 pinctrl-0 = <&uart1_default_mode>;
[all …]
Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
29 proc-supply = <&mt6323_vproc_reg>;
32 cpu@1 {
33 proc-supply = <&mt6323_vproc_reg>;
37 proc-supply = <&mt6323_vproc_reg>;
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Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
42 interrupt-parent = <&gic>;
49 #address-cells = <1>;
50 #size-cells = <0>;
54 compatible = "arm,cortex-a9";
55 next-level-cache = <&L2>;
60 /include/ "bcm-cygnus-clock.dtsi"
63 compatible = "arm,cortex-a9-pmu";
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Dste-snowball.dts2 * Copyright 2011 ST-Ericsson AB
8 * http://www.opensource.org/licenses/gpl-license.html
12 /dts-v1/;
13 #include "ste-dbx5x0.dtsi"
14 #include "ste-href-ab8500.dtsi"
15 #include "ste-href-family-pinctrl.dtsi"
19 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
33 compatible = "regulator-fixed";
34 regulator-name = "en-3v3-fixed-supply";
35 regulator-min-microvolt = <3300000>;
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl dts file for HiSilicon HiKey970 development board
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range {
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
[all …]
Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl dts file for HiSilicon Poplar board
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
32 PINCTRL_PULLDOWN(0, 1, 0, 1)
34 pinctrl-single,bias-pullup = <
35 PINCTRL_PULLUP(0, 1, 0, 1)
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Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * pinctrl dts fils for Hislicon HiKey960 development board
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
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/kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/
Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl dts file for HiSilicon Poplar board
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
32 PINCTRL_PULLDOWN(0, 1, 0, 1)
34 pinctrl-single,bias-pullup = <
35 PINCTRL_PULLUP(0, 1, 0, 1)
[all …]
Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * pinctrl dts fils for Hislicon HiKey960 development board
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
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/kernel/linux/linux-4.19/drivers/pinctrl/bcm/
Dpinctrl-nsp-mux.c15 * a group based selection. The gpio_a 8 - 11 are muxed with gpio_b and pwm.
18 * gpio_a (8 - 11)
19 * +----------
21 * gpio_a (8-11) | gpio_b (0 - 3)
22 * ------------------------+-------+----------
24 * | pwm (0 - 3)
25 * +----------
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/pinctrl.h>
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/kernel/linux/linux-5.10/drivers/pinctrl/bcm/
Dpinctrl-nsp-mux.c15 * a group based selection. The gpio_a 8 - 11 are muxed with gpio_b and pwm.
18 * gpio_a (8 - 11)
19 * +----------
21 * gpio_a (8-11) | gpio_b (0 - 3)
22 * ------------------------+-------+----------
24 * | pwm (0 - 3)
25 * +----------
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/pinctrl.h>
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/kernel/linux/linux-5.10/arch/mips/boot/dts/ralink/
Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
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