1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2012 ST-Ericsson AB 4 */ 5 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/leds/common.h> 8#include "ste-href-family-pinctrl.dtsi" 9 10/ { 11 memory { 12 device_type = "memory"; 13 reg = <0x00000000 0x20000000>; 14 }; 15 16 soc { 17 uart@80120000 { 18 pinctrl-names = "default", "sleep"; 19 pinctrl-0 = <&u0_a_1_default>; 20 pinctrl-1 = <&u0_a_1_sleep>; 21 status = "okay"; 22 }; 23 24 /* This UART is unused and thus left disabled */ 25 uart@80121000 { 26 pinctrl-names = "default", "sleep"; 27 pinctrl-0 = <&u1rxtx_a_1_default>; 28 pinctrl-1 = <&u1rxtx_a_1_sleep>; 29 }; 30 31 uart@80007000 { 32 pinctrl-names = "default", "sleep"; 33 pinctrl-0 = <&u2rxtx_c_1_default>; 34 pinctrl-1 = <&u2rxtx_c_1_sleep>; 35 status = "okay"; 36 }; 37 38 i2c@80004000 { 39 pinctrl-names = "default","sleep"; 40 pinctrl-0 = <&i2c0_a_1_default>; 41 pinctrl-1 = <&i2c0_a_1_sleep>; 42 status = "okay"; 43 }; 44 45 i2c@80122000 { 46 pinctrl-names = "default","sleep"; 47 pinctrl-0 = <&i2c1_b_2_default>; 48 pinctrl-1 = <&i2c1_b_2_sleep>; 49 status = "okay"; 50 }; 51 52 i2c@80128000 { 53 pinctrl-names = "default","sleep"; 54 pinctrl-0 = <&i2c2_b_2_default>; 55 pinctrl-1 = <&i2c2_b_2_sleep>; 56 status = "okay"; 57 lp5521@33 { 58 compatible = "national,lp5521"; 59 reg = <0x33>; 60 label = "lp5521_pri"; 61 clock-mode = /bits/ 8 <2>; 62 #address-cells = <1>; 63 #size-cells = <0>; 64 chan@0 { 65 reg = <0>; 66 led-cur = /bits/ 8 <0x2f>; 67 max-cur = /bits/ 8 <0x5f>; 68 color = <LED_COLOR_ID_BLUE>; 69 linux,default-trigger = "heartbeat"; 70 }; 71 chan@1 { 72 reg = <1>; 73 led-cur = /bits/ 8 <0x2f>; 74 max-cur = /bits/ 8 <0x5f>; 75 color = <LED_COLOR_ID_BLUE>; 76 }; 77 chan@2 { 78 reg = <2>; 79 led-cur = /bits/ 8 <0x2f>; 80 max-cur = /bits/ 8 <0x5f>; 81 color = <LED_COLOR_ID_BLUE>; 82 }; 83 }; 84 lp5521@34 { 85 compatible = "national,lp5521"; 86 reg = <0x34>; 87 label = "lp5521_sec"; 88 clock-mode = /bits/ 8 <2>; 89 #address-cells = <1>; 90 #size-cells = <0>; 91 chan@0 { 92 reg = <0>; 93 led-cur = /bits/ 8 <0x2f>; 94 max-cur = /bits/ 8 <0x5f>; 95 color = <LED_COLOR_ID_BLUE>; 96 }; 97 chan@1 { 98 reg = <1>; 99 led-cur = /bits/ 8 <0x2f>; 100 max-cur = /bits/ 8 <0x5f>; 101 color = <LED_COLOR_ID_BLUE>; 102 }; 103 chan@2 { 104 reg = <2>; 105 led-cur = /bits/ 8 <0x2f>; 106 max-cur = /bits/ 8 <0x5f>; 107 color = <LED_COLOR_ID_BLUE>; 108 }; 109 }; 110 bh1780@29 { 111 compatible = "rohm,bh1780gli"; 112 reg = <0x29>; 113 }; 114 }; 115 116 i2c@80110000 { 117 pinctrl-names = "default","sleep"; 118 pinctrl-0 = <&i2c3_c_2_default>; 119 pinctrl-1 = <&i2c3_c_2_sleep>; 120 status = "okay"; 121 }; 122 123 /* ST6G3244ME level translator for 1.8/2.9 V */ 124 vmmci: regulator-gpio { 125 compatible = "regulator-gpio"; 126 127 regulator-min-microvolt = <1800000>; 128 regulator-max-microvolt = <2900000>; 129 regulator-name = "mmci-reg"; 130 regulator-type = "voltage"; 131 132 startup-delay-us = <100>; 133 134 states = <1800000 0x1 135 2900000 0x0>; 136 }; 137 138 // External Micro SD slot 139 sdi0_per1@80126000 { 140 arm,primecell-periphid = <0x10480180>; 141 max-frequency = <100000000>; 142 bus-width = <4>; 143 cap-sd-highspeed; 144 cap-mmc-highspeed; 145 sd-uhs-sdr12; 146 sd-uhs-sdr25; 147 full-pwr-cycle; 148 st,sig-dir-dat0; 149 st,sig-dir-dat2; 150 st,sig-dir-cmd; 151 st,sig-pin-fbclk; 152 vmmc-supply = <&ab8500_ldo_aux3_reg>; 153 vqmmc-supply = <&vmmci>; 154 pinctrl-names = "default", "sleep"; 155 pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>; 156 pinctrl-1 = <&mc0_a_1_sleep>; 157 158 status = "okay"; 159 }; 160 161 // WLAN SDIO channel 162 sdi1_per2@80118000 { 163 arm,primecell-periphid = <0x10480180>; 164 max-frequency = <100000000>; 165 bus-width = <4>; 166 non-removable; 167 pinctrl-names = "default", "sleep"; 168 pinctrl-0 = <&mc1_a_1_default>; 169 pinctrl-1 = <&mc1_a_1_sleep>; 170 171 status = "okay"; 172 }; 173 174 // PoP:ed eMMC 175 sdi2_per3@80005000 { 176 arm,primecell-periphid = <0x10480180>; 177 max-frequency = <100000000>; 178 bus-width = <8>; 179 cap-mmc-highspeed; 180 non-removable; 181 vmmc-supply = <&db8500_vsmps2_reg>; 182 pinctrl-names = "default", "sleep"; 183 pinctrl-0 = <&mc2_a_1_default>; 184 pinctrl-1 = <&mc2_a_1_sleep>; 185 186 status = "okay"; 187 }; 188 189 // On-board eMMC 190 sdi4_per2@80114000 { 191 arm,primecell-periphid = <0x10480180>; 192 max-frequency = <100000000>; 193 bus-width = <8>; 194 cap-mmc-highspeed; 195 non-removable; 196 vmmc-supply = <&ab8500_ldo_aux2_reg>; 197 pinctrl-names = "default", "sleep"; 198 pinctrl-0 = <&mc4_a_1_default>; 199 pinctrl-1 = <&mc4_a_1_sleep>; 200 201 status = "okay"; 202 }; 203 204 msp0: msp@80123000 { 205 pinctrl-names = "default"; 206 pinctrl-0 = <&msp0txrxtfstck_a_1_default>; 207 status = "okay"; 208 }; 209 210 msp1: msp@80124000 { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&msp1txrx_a_1_default>; 213 status = "okay"; 214 }; 215 216 msp2: msp@80117000 { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&msp2_a_1_default>; 219 }; 220 221 msp3: msp@80125000 { 222 status = "okay"; 223 }; 224 225 prcmu@80157000 { 226 ab8500 { 227 ab8500-gpiocontroller { 228 }; 229 230 ab8500_usb { 231 pinctrl-names = "default", "sleep"; 232 pinctrl-0 = <&usb_a_1_default>; 233 pinctrl-1 = <&usb_a_1_sleep>; 234 }; 235 236 ab8500-regulators { 237 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 238 regulator-name = "V-DISPLAY"; 239 }; 240 241 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { 242 regulator-name = "V-eMMC1"; 243 }; 244 245 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { 246 regulator-name = "V-MMC-SD"; 247 }; 248 249 ab8500_ldo_intcore_reg: ab8500_ldo_intcore { 250 regulator-name = "V-INTCORE"; 251 }; 252 253 ab8500_ldo_tvout_reg: ab8500_ldo_tvout { 254 regulator-name = "V-TVOUT"; 255 }; 256 257 ab8500_ldo_audio_reg: ab8500_ldo_audio { 258 regulator-name = "V-AUD"; 259 }; 260 261 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { 262 regulator-name = "V-AMIC1"; 263 }; 264 265 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { 266 regulator-name = "V-AMIC2"; 267 }; 268 269 ab8500_ldo_dmic_reg: ab8500_ldo_dmic { 270 regulator-name = "V-DMIC"; 271 }; 272 273 ab8500_ldo_ana_reg: ab8500_ldo_ana { 274 regulator-name = "V-CSI/DSI"; 275 }; 276 }; 277 }; 278 }; 279 280 pinctrl { 281 sdi0 { 282 sdi0_default_mode: sdi0_default { 283 /* Some boards set additional settings here */ 284 }; 285 }; 286 }; 287 288 mcde@a0350000 { 289 pinctrl-names = "default", "sleep"; 290 pinctrl-0 = <&lcd_default_mode>; 291 pinctrl-1 = <&lcd_sleep_mode>; 292 }; 293 }; 294}; 295