| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
17 #include <linux/pwm.h>
31 struct mutex lock; /* protect pwm config/enable */
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
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| D | pwm-tiehrpwm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * EHRPWM PWM driver
5 * Copyright (C) 2012 Texas Instruments, Inc. - https://www.ti.com/
10 #include <linux/pwm.h>
94 #define NUM_PWM_CHANNEL 2 /* EHRPWM channels */
133 static void ehrpwm_modify(void __iomem *base, unsigned int offset, u16 mask, in ehrpwm_modify() argument
139 val &= ~mask; in ehrpwm_modify()
140 val |= value & mask; in ehrpwm_modify()
145 * set_prescale_div - Set up the prescaler divider function
187 * Configure PWM output to HIGH/LOW level on counter in configure_polarity()
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| D | pwm-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 platform PWM support
7 * - The .apply callback doesn't complete the currently running period before
15 #include <linux/mfd/ingenic-tcu.h>
20 #include <linux/pwm.h>
40 /* Enable all TCU channels for PWM use by default except channels 0/1 */ in jz4740_pwm_can_use_chn()
41 u32 pwm_channels_mask = GENMASK(jz->chip.npwm - 1, 2); in jz4740_pwm_can_use_chn()
43 device_property_read_u32(jz->chip.dev->parent, in jz4740_pwm_can_use_chn()
44 "ingenic,pwm-channels-mask", in jz4740_pwm_can_use_chn()
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| D | pwm-meson.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * PWM controller driver for Amlogic Meson SoCs.
5 * This PWM is only a set of Gates, Dividers and Counters:
6 * PWM output is achieved by calculating a clock that permits calculating
13 * Setting the duty cycle will disable and re-enable the PWM output.
14 * Disabling the PWM stops the output immediately (without waiting for the
17 * The public S912 (GXM) datasheet contains some documentation for this PWM
19 * https://dl.khadas.com/Hardware/VIM2/Datasheet/S912_Datasheet_V0.220170314publicversion-Wesion.pdf
23 * https://dn.odroid.com/S922X/ODROID-N2/Datasheet/S922X_Public_Datasheet_V0.2.pdf
33 #include <linux/clk-provider.h>
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| /kernel/linux/linux-4.19/drivers/pwm/ |
| D | pwm-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
16 #include <linux/pwm.h>
24 struct mutex lock; /* protect pwm config/enable */
47 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
56 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
58 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
60 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
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| D | pwm-meson.c | 59 #include <linux/clk-provider.h>
67 #include <linux/pwm.h>
126 static int meson_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) in meson_pwm_request() argument
128 struct meson_pwm_channel *channel = pwm_get_chip_data(pwm); in meson_pwm_request()
129 struct device *dev = chip->dev; in meson_pwm_request()
133 return -ENODEV; in meson_pwm_request()
135 if (channel->clk_parent) { in meson_pwm_request()
136 err = clk_set_parent(channel->clk, channel->clk_parent); in meson_pwm_request()
139 __clk_get_name(channel->clk_parent), in meson_pwm_request()
140 __clk_get_name(channel->clk), err); in meson_pwm_request()
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| D | pwm-tiehrpwm.c | 2 * EHRPWM PWM driver
4 * Copyright (C) 2012 Texas Instruments, Inc. - http://www.ti.com/
23 #include <linux/pwm.h>
107 #define NUM_PWM_CHANNEL 2 /* EHRPWM channels */
146 static void ehrpwm_modify(void __iomem *base, unsigned int offset, u16 mask, in ehrpwm_modify() argument
152 val &= ~mask; in ehrpwm_modify()
153 val |= value & mask; in ehrpwm_modify()
158 * set_prescale_div - Set up the prescaler divider function
200 * Configure PWM output to HIGH/LOW level on counter in configure_polarity()
209 if (pc->polarity[chan] == PWM_POLARITY_INVERSED) in configure_polarity()
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| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | lp3943.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 * LP3943 is an integrated device capable of driving 16 output channels.
11 * It can be used for a GPIO expander and PWM generators.
16 * LP3943 MFD ---- GPIO expander leds-gpio eg) HW enable pin
18 * --- PWM generator leds-pwm eg) PWM input
20 * Internal two PWM channels are used for LED dimming effect.
23 * LEDs can be controlled with legacy leds-gpio(static brightness) or
24 * leds-pwm drivers(dynamic brightness control).
25 * Alternatively, it can be used for generic GPIO and PWM controller.
27 * A PWM is input pin of a backlight device.
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| /kernel/linux/linux-4.19/drivers/mfd/ |
| D | lp3943.c | 13 * LP3943 is an integrated device capable of driving 16 output channels.
14 * It can be used for a GPIO expander and PWM generators.
19 * LP3943 MFD ---- GPIO expander leds-gpio eg) HW enable pin
21 * --- PWM generator leds-pwm eg) PWM input
23 * Internal two PWM channels are used for LED dimming effect.
26 * LEDs can be controlled with legacy leds-gpio(static brightness) or
27 * leds-pwm drivers(dynamic brightness control).
28 * Alternatively, it can be used for generic GPIO and PWM controller.
30 * A PWM is input pin of a backlight device.
46 /* address, mask, shift */
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | samsung_pwm_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * samsung - Common hr-timer support (s3c and s5p)
46 * bits (one channel) after channel 0, so channels have different numbering
50 * in its set of bits is 2 as opposed to 3 for other channels.
80 static struct samsung_pwm_clocksource pwm; variable
93 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
95 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale()
96 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
108 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
112 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
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| D | ingenic-timer.c | 1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/mfd/ingenic-tcu.h>
24 #include <dt-bindings/clock/ingenic,tcu.h>
57 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count); in ingenic_tcu_timer_read()
70 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu()
84 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel)); in ingenic_tcu_cevt_set_state_shutdown()
96 return -EINVAL; in ingenic_tcu_cevt_set_next()
98 regmap_write(tcu->map, TCU_REG_TDFRc(timer->channel), next); in ingenic_tcu_cevt_set_next()
99 regmap_write(tcu->map, TCU_REG_TCNTc(timer->channel), 0); in ingenic_tcu_cevt_set_next()
100 regmap_write(tcu->map, TCU_REG_TESR, BIT(timer->channel)); in ingenic_tcu_cevt_set_next()
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| /kernel/linux/linux-4.19/drivers/clocksource/ |
| D | samsung_pwm_timer.c | 5 * samsung - Common hr-timer support (s3c and s5p)
49 * bits (one channel) after channel 0, so channels have different numbering
53 * in its set of bits is 2 as opposed to 3 for other channels.
83 static struct samsung_pwm_clocksource pwm; variable
96 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
98 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale()
99 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
111 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
115 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
118 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4770-tcu
24 - ingenic,jz4780-tcu
25 - ingenic,x1000-tcu
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| /kernel/linux/linux-5.10/include/linux/fsl/ |
| D | ftm.h | 1 // SPDX-License-Identifier: GPL-2.0
13 #define FTM_OUTINIT 0x5C /* Initial State For Channels Output */
14 #define FTM_OUTMASK 0x60 /* Output Mask */
15 #define FTM_COMBINE 0x64 /* Function For Linked Channels */
18 #define FTM_POL 0x70 /* Channels Polarity */
28 #define FTM_PWMLOAD 0x98 /* FTM PWM Load */
57 * https://community.nxp.com/thread/467648#comment-1010319
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| /kernel/linux/linux-5.10/include/soc/at91/ |
| D | atmel_tcb.h | 17 * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
18 * three general-purpose 16-bit timers. These timers share one register bank.
23 * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
37 * struct atmel_tcb_config - SoC data for a Timer/Counter Block
50 * struct atmel_tc - information about a Timer/Counter Block
55 * @irq: irq for each of the three channels
56 * @clk: internal clock source for each of the three channels
61 * while on others, all TC channels share the same clock and IRQ.
83 /* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
88 * Two registers have block-wide controls. These are: configuring the three
[all …]
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| /kernel/linux/linux-4.19/include/linux/ |
| D | atmel_tc.h | 17 * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
18 * three general-purpose 16-bit timers. These timers share one register bank.
23 * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
37 * struct atmel_tcb_config - SoC data for a Timer/Counter Block
45 * struct atmel_tc - information about a Timer/Counter Block
50 * @irq: irq for each of the three channels
51 * @clk: internal clock source for each of the three channels
56 * while on others, all TC channels share the same clock and IRQ.
78 /* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
83 * Two registers have block-wide controls. These are: configuring the three
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap2.dtsi | 4 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/omap.h>
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
32 #address-cells = <0>;
33 #size-cells = <0>;
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| D | ls1021a.dtsi | 2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
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| D | pxa3xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
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| D | dm816x.dtsi | 7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm816.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/omap.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <1>;
16 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
33 compatible = "arm,cortex-a8";
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| D | r8a7742.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7742-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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| /kernel/linux/linux-5.10/drivers/input/keyboard/ |
| D | lm8323.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2009 Nokia Corporation
45 #define LM8323_CMD_PWM_WRITE 0x95 /* Write PWM script. */
46 #define LM8323_CMD_START_PWM 0x96 /* Start PWM engine. */
47 #define LM8323_CMD_STOP_PWM 0x97 /* Stop PWM engine. */
87 /* Commands for PWM engine; feed in with PWM_WRITE. */
88 /* Load ramp counter from duty cycle field (range 0 - 0xff). */
111 * Wait for trigger. Argument is a mask of channels, shifted by the channel
112 * number, e.g. 0xa for channels 3 and 1. Note that channels are numbered
126 /* pwm lock */
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| /kernel/linux/linux-4.19/drivers/input/keyboard/ |
| D | lm8323.c | 4 * Copyright (C) 2007-2009 Nokia Corporation
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
57 #define LM8323_CMD_PWM_WRITE 0x95 /* Write PWM script. */
58 #define LM8323_CMD_START_PWM 0x96 /* Start PWM engine. */
59 #define LM8323_CMD_STOP_PWM 0x97 /* Stop PWM engine. */
99 /* Commands for PWM engine; feed in with PWM_WRITE. */
100 /* Load ramp counter from duty cycle field (range 0 - 0xff). */
123 * Wait for trigger. Argument is a mask of channels, shifted by the channel
124 * number, e.g. 0xa for channels 3 and 1. Note that channels are numbered
138 /* pwm lock */
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-g12a-sei510.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
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| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | pxa3xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
19 (gpio <= 29) ? (0x0400 + 4 * (gpio - 27)) : \
20 (gpio <= 98) ? (0x0418 + 4 * (gpio - 30)) : \
21 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
23 (gpio <= 268) ? (0x052c + 4 * (gpio - 263)) : \
33 (gpio <= 9) ? (0x028c + 4 * (gpio - 5)) : \
[all …]
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