| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra20-ac97.txt | 4 - compatible : "nvidia,tegra20-ac97"
5 - reg : Should contain AC97 controller registers location and length
6 - interrupts : Should contain AC97 interrupt
7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
10 - ac97
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
[all …]
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| D | rt5677.txt | 7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
25 - realtek,lout1-differential
[all …]
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| D | cs4271.txt | 7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
20 !RESET pin
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
24 The CS4271 requires its LRCLK and MCLK to be stable before its RESET
25 line is de-asserted. That also means that clocks cannot be changed
26 without putting the chip back into hardware reset, which also requires
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra20-ac97.txt | 4 - compatible : "nvidia,tegra20-ac97"
5 - reg : Should contain AC97 controller registers location and length
6 - interrupts : Should contain AC97 interrupt
7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
10 - ac97
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
[all …]
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| D | rt5677.txt | 7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
25 - realtek,lout1-differential
[all …]
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| D | cs4271.txt | 7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
20 !RESET pin
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
24 The CS4271 requires its LRCLK and MCLK to be stable before its RESET
25 line is de-asserted. That also means that clocks cannot be changed
26 without putting the chip back into hardware reset, which also requires
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | altera-a10sr.txt | 4 - compatible : "altr,a10sr"
5 - spi-max-frequency : Maximum SPI frequency.
6 - reg : The SPI Chip Select address for the Arria10
8 - interrupts : The interrupt line the device is connected to.
9 - interrupt-controller : Marks the device node as an interrupt controller.
10 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
13 masks from ../interrupt-controller/interrupts.txt.
15 The A10SR consists of these sub-devices:
18 ------ ----------
19 a10sr_gpio GPIO Controller
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mfd/ |
| D | altera-a10sr.txt | 4 - compatible : "altr,a10sr"
5 - spi-max-frequency : Maximum SPI frequency.
6 - reg : The SPI Chip Select address for the Arria10
8 - interrupts : The interrupt line the device is connected to.
9 - interrupt-controller : Marks the device node as an interrupt controller.
10 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
13 masks from ../interrupt-controller/interrupts.txt.
15 The A10SR consists of these sub-devices:
18 ------ ----------
19 a10sr_gpio GPIO Controller
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-8040-clearfog-gt-8k.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.txt | 1 Drive a GPIO line that can be used to restart the system from a restart
4 This binding supports level and edge triggered reset. At driver load
5 time, the driver will request the given gpio line and install a restart
6 handler. If the optional properties 'open-source' is not found, the GPIO line
11 priority order. The gpio is configured as an output, and driven active,
12 triggering a level triggered reset condition. This will also cause an
13 inactive->active edge condition, triggering positive edge triggered
14 reset. After a delay specified by active-delay, the GPIO is set to
15 inactive, thus causing an active->inactive edge, triggering negative edge
16 triggered reset. After a delay specified by inactive-delay, the GPIO
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.txt | 1 Drive a GPIO line that can be used to restart the system from a restart
4 This binding supports level and edge triggered reset. At driver load
5 time, the driver will request the given gpio line and install a restart
6 handler. If the optional properties 'open-source' is not found, the GPIO line
11 priority order. The gpio is configured as an output, and driven active,
12 triggering a level triggered reset condition. This will also cause an
13 inactive->active edge condition, triggering positive edge triggered
14 reset. After a delay specified by active-delay, the GPIO is set to
15 inactive, thus causing an active->inactive edge, triggering negative edge
16 triggered reset. After a delay specified by inactive-delay, the GPIO
[all …]
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| /kernel/linux/linux-5.10/drivers/media/pci/cx23885/ |
| D | cx23885-cards.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <media/drv-intf/cx25840.h>
18 #include "tuner-xc2028.h"
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
24 #include "cx23888-ir.h"
29 "NetUP Dual DVB-T/C CI card revision");
35 "\t\t\tHVR-1250 (reported safe)\n"
41 /* ------------------------------------------------------------------ */
[all …]
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| /kernel/linux/linux-4.19/drivers/media/pci/cx23885/ |
| D | cx23885-cards.c | 24 #include <media/drv-intf/cx25840.h>
28 #include "tuner-xc2028.h"
29 #include "netup-eeprom.h"
30 #include "netup-init.h"
31 #include "altera-ci.h"
34 #include "cx23888-ir.h"
39 "NetUP Dual DVB-T/C CI card revision");
45 "\t\t\tHVR-1250 (reported safe)\n"
51 /* ------------------------------------------------------------------ */
74 .name = "Hauppauge WinTV-HVR1800lp",
[all …]
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/ |
| D | gd32vf103_gpio.c | 3 \brief GPIO driver
5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
39 #define LSB_16BIT_MASK ((uint16_t)0xFFFFU) /*!< LSB 16-bit mask */
45 #define GPIO_OUTPUT_PORT_OFFSET ((uint32_t)4U) /*!< GPIO event output port off…
48 \brief reset GPIO port
57 /* reset GPIOA */ in gpio_deinit()
62 /* reset GPIOB */ in gpio_deinit()
67 /* reset GPIOC */ in gpio_deinit()
72 /* reset GPIOD */ in gpio_deinit()
77 /* reset GPIOE */ in gpio_deinit()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
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| D | ste-hrefv60plus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include "ste-href-ab8500.dtsi"
7 #include "ste-href.dtsi"
10 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
11 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
14 /* Name the GPIO muxed rails on the HREF boards */
15 gpio@8012e000 {
16 /* GPIOs 0 - 31 */
17 gpio-line-names =
[all …]
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| /kernel/linux/linux-4.19/arch/arm64/boot/dts/hisilicon/ |
| D | hi3798cv200.dtsi | 4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
7 * SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/clock/histb-clock.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/ti-syscon.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
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| /kernel/linux/linux-4.19/sound/soc/ |
| D | soc-ac97.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-ac97.c -- ALSA SoC Audio Layer AC97 support
11 // with code, comments and ideas from :-
17 #include <linux/gpio.h>
18 #include <linux/gpio/driver.h>
59 return gpio_priv->component; in gpio_to_component()
65 return -EINVAL; in snd_soc_ac97_gpio_request()
75 dev_dbg(component->dev, "set gpio %d to output\n", offset); in snd_soc_ac97_gpio_direction_in()
86 ret = -1; in snd_soc_ac97_gpio_get()
88 dev_dbg(component->dev, "get gpio %d : %d\n", offset, in snd_soc_ac97_gpio_get()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/ |
| D | soc-ac97.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-ac97.c -- ALSA SoC Audio Layer AC97 support
11 // with code, comments and ideas from :-
17 #include <linux/gpio.h>
18 #include <linux/gpio/driver.h>
59 return gpio_priv->component; in gpio_to_component()
65 return -EINVAL; in snd_soc_ac97_gpio_request()
75 dev_dbg(component->dev, "set gpio %d to output\n", offset); in snd_soc_ac97_gpio_direction_in()
87 dev_dbg(component->dev, "get gpio %d : %d\n", offset, in snd_soc_ac97_gpio_get()
99 gpio_priv->gpios_set &= ~(1 << offset); in snd_soc_ac97_gpio_set()
[all …]
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| /kernel/linux/linux-4.19/arch/microblaze/kernel/ |
| D | reset.c | 18 static int handle; /* reset pin handle */
25 "hard-reset-gpios", 0); in of_platform_reset_gpio_probe()
28 pr_info("Skipping unavailable RESET gpio %d (%s)\n", in of_platform_reset_gpio_probe()
29 handle, "reset"); in of_platform_reset_gpio_probe()
30 return -ENODEV; in of_platform_reset_gpio_probe()
33 ret = gpio_request(handle, "reset"); in of_platform_reset_gpio_probe()
35 pr_info("GPIO pin is already allocated\n"); in of_platform_reset_gpio_probe()
42 pr_debug("Reset: Gpio output state: 0x%x\n", reset_val); in of_platform_reset_gpio_probe()
44 /* Setup GPIO as output */ in of_platform_reset_gpio_probe()
52 pr_info("RESET: Registered gpio device: %d, current val: %d\n", in of_platform_reset_gpio_probe()
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/rtc/ |
| D | moxa,moxart-rtc.txt | 1 MOXA ART real-time clock
5 - compatible : Should be "moxa,moxart-rtc"
6 - gpio-rtc-sclk : RTC sclk gpio, with zero flags
7 - gpio-rtc-data : RTC data gpio, with zero flags
8 - gpio-rtc-reset : RTC reset gpio, with zero flags
13 compatible = "moxa,moxart-rtc";
14 gpio-rtc-sclk = <&gpio 5 0>;
15 gpio-rtc-data = <&gpio 6 0>;
16 gpio-rtc-reset = <&gpio 7 0>;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | moxa,moxart-rtc.txt | 1 MOXA ART real-time clock
5 - compatible : Should be "moxa,moxart-rtc"
6 - gpio-rtc-sclk : RTC sclk gpio, with zero flags
7 - gpio-rtc-data : RTC data gpio, with zero flags
8 - gpio-rtc-reset : RTC reset gpio, with zero flags
13 compatible = "moxa,moxart-rtc";
14 gpio-rtc-sclk = <&gpio 5 0>;
15 gpio-rtc-data = <&gpio 6 0>;
16 gpio-rtc-reset = <&gpio 7 0>;
|
| /kernel/linux/linux-4.19/arch/arm/boot/dts/ |
| D | ste-hrefv60plus.dtsi | 2 * Copyright 2012 ST-Ericsson AB
8 * http://www.opensource.org/licenses/gpl-license.html
12 #include "ste-dbx5x0.dtsi"
13 #include "ste-href-ab8500.dtsi"
14 #include "ste-href.dtsi"
17 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
18 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
21 /* Name the GPIO muxed rails on the HREF boards */
22 gpio@8012e000 {
23 /* GPIOs 0 - 31 */
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/gpio/ |
| D | gpio-xra1403.txt | 1 GPIO Driver for XRA1403 16-BIT GPIO Expander With Reset Input from EXAR
3 The XRA1403 is an 16-bit GPIO expander with an SPI interface. Features available:
4 - Individually programmable inputs:
5 - Internal pull-up resistors
6 - Polarity inversion
7 - Individual interrupt enable
8 - Rising edge and/or Falling edge interrupt
9 - Input filter
10 - Individually programmable outputs
11 - Output Level Control
[all …]
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