Home
last modified time | relevance | path

Searched +full:sdm845 +full:- +full:dwc3 (Results 1 – 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SuperSpeed DWC3 USB SoC controller
10 - Manu Gautam <mgautam@codeaurora.org>
15 - enum:
16 - qcom,msm8996-dwc3
17 - qcom,msm8998-dwc3
18 - qcom,sc7180-dwc3
[all …]
/kernel/linux/linux-4.19/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.txt1 Qualcomm SuperSpeed DWC3 USB SoC controller
4 - compatible: Compatible list, contains
5 "qcom,dwc3"
6 "qcom,msm8996-dwc3" for msm8996 SOC.
7 "qcom,sdm845-dwc3" for sdm845 SOC.
8 - reg: Offset and length of register set for QSCRATCH wrapper
9 - power-domains: specifies a phandle to PM domain provider node
10 - clocks: A list of phandle + clock-specifier pairs for the
11 clocks listed in clock-names
12 - clock-names: Should contain the following:
[all …]
/kernel/linux/linux-4.19/drivers/usb/dwc3/
Ddwc3-qcom.c1 // SPDX-License-Identifier: GPL-2.0
4 * Inspired by dwc3-of-simple.c
11 #include <linux/clk-provider.h>
44 struct platform_device *dwc3; member
91 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
93 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
96 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
98 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
110 qcom->mode = event ? USB_DR_MODE_PERIPHERAL : USB_DR_MODE_HOST; in dwc3_qcom_vbus_notifier()
122 qcom->mode = event ? USB_DR_MODE_HOST : USB_DR_MODE_PERIPHERAL; in dwc3_qcom_host_notifier()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
/kernel/linux/linux-5.10/drivers/usb/dwc3/
Ddwc3-qcom.c1 // SPDX-License-Identifier: GPL-2.0
4 * Inspired by dwc3-of-simple.c
69 struct platform_device *dwc3; member
121 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
123 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
126 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
128 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_overrride_enable()
140 qcom->mode = event ? USB_DR_MODE_PERIPHERAL : USB_DR_MODE_HOST; in dwc3_qcom_vbus_notifier()
152 qcom->mode = event ? USB_DR_MODE_HOST : USB_DR_MODE_PERIPHERAL; in dwc3_qcom_host_notifier()
159 struct device *dev = qcom->dev; in dwc3_qcom_register_extcon()
[all …]