| /kernel/linux/linux-4.19/drivers/mtd/spi-nor/ |
| D | Kconfig | 2 tristate "SPI-NOR device support"
5 This is the framework for the SPI NOR which can be used by the SPI
6 device drivers and the SPI-NOR device driver.
11 tristate "Mediatek MT81xx SPI NOR flash controller"
14 This enables access to SPI NOR flash, using MT81xx SPI NOR flash
15 controller. This controller does not support generic SPI BUS, it only
16 supports SPI NOR Flash.
22 Many flash memories support erasing small (4096 B) sectors. Depending
25 Changing a small part of the flash's contents is usually faster with
33 tristate "Aspeed flash controllers in SPI mode"
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/devices/ |
| D | mchp23k256.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for Microchip 23k256 SPI RAM chips
16 #include <linux/spi/flash.h>
17 #include <linux/spi/spi.h>
28 struct spi_device *spi; member
41 static void mchp23k256_addr2cmd(struct mchp23k256_flash *flash, in mchp23k256_addr2cmd() argument
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
55 static int mchp23k256_cmdsz(struct mchp23k256_flash *flash) in mchp23k256_cmdsz() argument
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
63 struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd); in mchp23k256_write() local
[all …]
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| D | sst25l.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for SST25L SPI Flash chips
24 #include <linux/spi/spi.h>
25 #include <linux/spi/flash.h>
47 struct spi_device *spi; member
67 static int sst25l_status(struct sst25l_flash *flash, int *status) in sst25l_status() argument
83 err = spi_sync(flash->spi, &m); in sst25l_status()
91 static int sst25l_write_enable(struct sst25l_flash *flash, int enable) in sst25l_write_enable() argument
97 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
102 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
[all …]
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
58 This enables access to AT45xxx DataFlash chips, using SPI.
59 Sometimes DataFlash chips are packaged inside MMC-format
66 This adds an extra check when data is written to the flash.
[all …]
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| /kernel/linux/linux-4.19/drivers/mtd/devices/ |
| D | mchp23k256.c | 4 * Driver for Microchip 23k256 SPI RAM chips
20 #include <linux/spi/flash.h>
21 #include <linux/spi/spi.h>
32 struct spi_device *spi; member
45 static void mchp23k256_addr2cmd(struct mchp23k256_flash *flash, in mchp23k256_addr2cmd() argument
55 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
59 static int mchp23k256_cmdsz(struct mchp23k256_flash *flash) in mchp23k256_cmdsz() argument
61 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
67 struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd); in mchp23k256_write() local
75 cmd_len = mchp23k256_cmdsz(flash); in mchp23k256_write()
[all …]
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| D | sst25l.c | 4 * Driver for SST25L SPI Flash chips
28 #include <linux/spi/spi.h>
29 #include <linux/spi/flash.h>
51 struct spi_device *spi; member
71 static int sst25l_status(struct sst25l_flash *flash, int *status) in sst25l_status() argument
87 err = spi_sync(flash->spi, &m); in sst25l_status()
95 static int sst25l_write_enable(struct sst25l_flash *flash, int enable) in sst25l_write_enable() argument
101 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
106 err = spi_write(flash->spi, command, 1); in sst25l_write_enable()
112 err = spi_write(flash->spi, command, 2); in sst25l_write_enable()
[all …]
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| D | m25p80.c | 2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi-mem.h>
28 #include <linux/spi/flash.h>
29 #include <linux/mtd/spi-nor.h>
38 struct m25p *flash = nor->priv; in m25p80_read_reg() local
48 return -ENOMEM; in m25p80_read_reg()
51 ret = spi_mem_exec_op(flash->spimem, &op); in m25p80_read_reg()
53 dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret, in m25p80_read_reg()
65 struct m25p *flash = nor->priv; in m25p80_write_reg() local
[all …]
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| D | Kconfig | 1 menu "Self-contained MTD device drivers"
11 These devices come in memory configurations from 32M - 1G. If you
40 tristate "DEC MS02-NV NVRAM module support"
43 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
44 backed-up NVRAM module. The module was originally meant as an NFS
51 The module will be called ms02-nv.
57 This enables access to AT45xxx DataFlash chips, using SPI.
58 Sometimes DataFlash chips are packaged inside MMC-format
65 This adds an extra check when data is written to the flash.
76 one-time-programmable (OTP) data. The first half may be written
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/spi-nor/controllers/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Aspeed flash controllers in SPI mode"
8 in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
9 and support for the SPI flash memory controller (SPI) for
10 the host firmware. The implementation only supports SPI NOR.
13 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
17 This enables support for HiSilicon FMC SPI NOR flash controller.
20 tristate "NXP SPI Flash Interface (SPIFI)"
24 Enable support for the NXP LPC SPI Flash Interface controller.
26 SPIFI is a specialized controller for connecting serial SPI
[all …]
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/mtd/ |
| D | nxp-spifi.txt | 1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
6 mode. In memory mode the Flash is accessible from the CPU as
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
[all …]
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| D | aspeed-smc.txt | 2 * Aspeed SPI Flash Memory Controller
5 three chip selects, two of which are always of SPI type and the third
6 can be SPI or NOR type flash. These bindings only describe SPI.
8 The two SPI flash memory controllers in the AST2500 each support two
12 - compatible : Should be one of
13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
16 "aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers
18 - reg : the first contains the control register location and length,
[all …]
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| D | jedec,spi-nor.txt | 1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
51 designate quirky versions of flash chips that do not support the
53 m25p05-nonjedec
54 m25p10-nonjedec
55 m25p20-nonjedec
56 m25p40-nonjedec
57 m25p80-nonjedec
[all …]
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| D | mtk-quadspi.txt | 1 * Serial NOR flash controller for MTK MT81xx (and similar)
4 - compatible: For mt8173, compatible should be "mediatek,mt8173-nor",
6 For every other SoC, should contain both the SoC-specific compatible
7 string and "mediatek,mt8173-nor".
9 "mediatek,mt2701-nor", "mediatek,mt8173-nor"
10 "mediatek,mt2712-nor", "mediatek,mt8173-nor"
11 "mediatek,mt7622-nor", "mediatek,mt8173-nor"
12 "mediatek,mt7623-nor", "mediatek,mt8173-nor"
13 "mediatek,mt8173-nor"
14 - reg: physical base address and length of the controller's register
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | nxp-spifi.txt | 1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
6 mode. In memory mode the Flash is accessible from the CPU as
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
[all …]
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| D | aspeed-smc.txt | 2 * Aspeed SPI Flash Memory Controller
5 three chip selects, two of which are always of SPI type and the third
6 can be SPI or NOR type flash. These bindings only describe SPI.
8 The two SPI flash memory controllers in the AST2500 each support two
12 - compatible : Should be one of
13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
16 "aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers
18 - reg : the first contains the control register location and length,
[all …]
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| D | jedec,spi-nor.txt | 1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
51 designate quirky versions of flash chips that do not support the
53 m25p05-nonjedec
54 m25p10-nonjedec
55 m25p20-nonjedec
56 m25p40-nonjedec
57 m25p80-nonjedec
[all …]
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| /kernel/linux/linux-4.19/Documentation/mtd/ |
| D | intel-spi.txt | 1 Upgrading BIOS using intel-spi
2 ------------------------------
4 Many Intel CPUs like Baytrail and Braswell include SPI serial flash host
6 Since contents of the SPI serial flash is crucial for machine to function,
10 Not all manufacturers protect the SPI serial flash, mainly because it
13 The intel-spi driver makes it possible to read and write the SPI serial
14 flash, if certain protection bits are not set and locked. If it finds
15 any of them set, the whole MTD device is made read-only to prevent
16 partial overwrites. By default the driver exposes SPI serial flash
17 contents as read-only but it can be changed from kernel command line,
[all …]
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
16 eeprom and flash memory, codecs and various other controller
17 chips, analog to digital (and d-to-a) converters, and more.
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/mtd/ |
| D | intel-spi.rst | 2 Upgrading BIOS using intel-spi
5 Many Intel CPUs like Baytrail and Braswell include SPI serial flash host
7 Since contents of the SPI serial flash is crucial for machine to function,
11 Not all manufacturers protect the SPI serial flash, mainly because it
14 The intel-spi driver makes it possible to read and write the SPI serial
15 flash, if certain protection bits are not set and locked. If it finds
16 any of them set, the whole MTD device is made read-only to prevent
17 partial overwrites. By default the driver exposes SPI serial flash
18 contents as read-only but it can be changed from kernel command line,
19 passing "intel-spi.writeable=1".
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
17 The flash interface is selected based on the "compatible" property of this
19 - if it contains "jedec,spi-nor", then SPI is used;
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/spi-nor/ |
| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
48 /* Dual SPI */
54 /* Quad SPI */
60 /* Octal SPI */
72 /* Quad SPI */
77 /* Octal SPI */
86 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @opcode: the SPI command op code to erase the sector/block.
93 * @idx: Erase Type index as sorted in the Basic Flash Parameter
107 * struct spi_nor_erase_command - Used for non-uniform erases
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | amlogic,meson6-spifc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson SPI Flash Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: "spi-controller.yaml#"
17 The Meson SPIFC is a controller optimized for communication with SPI
18 NOR memories, without DMA support and a 64-byte unified transmit /
24 - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs
[all …]
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| D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Serial NOR flash controller for MediaTek ARM SoCs
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
14 This spi controller support single, dual, or quad mode transfer for
15 SPI NOR flash. There should be only one spi slave device following
16 generic spi bindings. It's not recommended to use this controller
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
24 flash@0 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
[all …]
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| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
29 stdout-path = "serial0:115200n8";
37 sys_mclk: clock-mclk {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <25000000>;
43 reg_1p8v: regulator-1p8v {
[all …]
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