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1 /*
2  * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
3  *
4  * Author: Mike Lavender, mike@steroidmicros.com
5  *
6  * Copyright (c) 2005, Intec Automation Inc.
7  *
8  * Some parts are based on lart.c by Abraham Van Der Merwe
9  *
10  * Cleaned up and generalized based on mtd_dataflash.c
11  *
12  * This code is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  */
17 
18 #include <linux/err.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
22 
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25 
26 #include <linux/spi/spi.h>
27 #include <linux/spi/spi-mem.h>
28 #include <linux/spi/flash.h>
29 #include <linux/mtd/spi-nor.h>
30 
31 struct m25p {
32 	struct spi_mem		*spimem;
33 	struct spi_nor		spi_nor;
34 };
35 
m25p80_read_reg(struct spi_nor * nor,u8 code,u8 * val,int len)36 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
37 {
38 	struct m25p *flash = nor->priv;
39 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
40 					  SPI_MEM_OP_NO_ADDR,
41 					  SPI_MEM_OP_NO_DUMMY,
42 					  SPI_MEM_OP_DATA_IN(len, NULL, 1));
43 	void *scratchbuf;
44 	int ret;
45 
46 	scratchbuf = kmalloc(len, GFP_KERNEL);
47 	if (!scratchbuf)
48 		return -ENOMEM;
49 
50 	op.data.buf.in = scratchbuf;
51 	ret = spi_mem_exec_op(flash->spimem, &op);
52 	if (ret < 0)
53 		dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
54 			code);
55 	else
56 		memcpy(val, scratchbuf, len);
57 
58 	kfree(scratchbuf);
59 
60 	return ret;
61 }
62 
m25p80_write_reg(struct spi_nor * nor,u8 opcode,u8 * buf,int len)63 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
64 {
65 	struct m25p *flash = nor->priv;
66 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
67 					  SPI_MEM_OP_NO_ADDR,
68 					  SPI_MEM_OP_NO_DUMMY,
69 					  SPI_MEM_OP_DATA_OUT(len, NULL, 1));
70 	void *scratchbuf;
71 	int ret;
72 
73 	scratchbuf = kmemdup(buf, len, GFP_KERNEL);
74 	if (!scratchbuf)
75 		return -ENOMEM;
76 
77 	op.data.buf.out = scratchbuf;
78 	ret = spi_mem_exec_op(flash->spimem, &op);
79 	kfree(scratchbuf);
80 
81 	return ret;
82 }
83 
m25p80_write(struct spi_nor * nor,loff_t to,size_t len,const u_char * buf)84 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
85 			    const u_char *buf)
86 {
87 	struct m25p *flash = nor->priv;
88 	struct spi_mem_op op =
89 			SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
90 				   SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
91 				   SPI_MEM_OP_NO_DUMMY,
92 				   SPI_MEM_OP_DATA_OUT(len, buf, 1));
93 	int ret;
94 
95 	/* get transfer protocols. */
96 	op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
97 	op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
98 	op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
99 
100 	if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
101 		op.addr.nbytes = 0;
102 
103 	ret = spi_mem_adjust_op_size(flash->spimem, &op);
104 	if (ret)
105 		return ret;
106 	op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes;
107 
108 	ret = spi_mem_exec_op(flash->spimem, &op);
109 	if (ret)
110 		return ret;
111 
112 	return op.data.nbytes;
113 }
114 
115 /*
116  * Read an address range from the nor chip.  The address range
117  * may be any size provided it is within the physical boundaries.
118  */
m25p80_read(struct spi_nor * nor,loff_t from,size_t len,u_char * buf)119 static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
120 			   u_char *buf)
121 {
122 	struct m25p *flash = nor->priv;
123 	struct spi_mem_op op =
124 			SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
125 				   SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
126 				   SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
127 				   SPI_MEM_OP_DATA_IN(len, buf, 1));
128 	size_t remaining = len;
129 	int ret;
130 
131 	/* get transfer protocols. */
132 	op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
133 	op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
134 	op.dummy.buswidth = op.addr.buswidth;
135 	op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
136 
137 	/* convert the dummy cycles to the number of bytes */
138 	op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
139 
140 	while (remaining) {
141 		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
142 		ret = spi_mem_adjust_op_size(flash->spimem, &op);
143 		if (ret)
144 			return ret;
145 
146 		ret = spi_mem_exec_op(flash->spimem, &op);
147 		if (ret)
148 			return ret;
149 
150 		op.addr.val += op.data.nbytes;
151 		remaining -= op.data.nbytes;
152 		op.data.buf.in += op.data.nbytes;
153 	}
154 
155 	return len;
156 }
157 
158 /*
159  * board specific setup should have ensured the SPI clock used here
160  * matches what the READ command supports, at least until this driver
161  * understands FAST_READ (for clocks over 25 MHz).
162  */
m25p_probe(struct spi_mem * spimem)163 static int m25p_probe(struct spi_mem *spimem)
164 {
165 	struct spi_device *spi = spimem->spi;
166 	struct flash_platform_data	*data;
167 	struct m25p *flash;
168 	struct spi_nor *nor;
169 	struct spi_nor_hwcaps hwcaps = {
170 		.mask = SNOR_HWCAPS_READ |
171 			SNOR_HWCAPS_READ_FAST |
172 			SNOR_HWCAPS_PP,
173 	};
174 	char *flash_name;
175 	int ret;
176 
177 	data = dev_get_platdata(&spimem->spi->dev);
178 
179 	flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
180 	if (!flash)
181 		return -ENOMEM;
182 
183 	nor = &flash->spi_nor;
184 
185 	/* install the hooks */
186 	nor->read = m25p80_read;
187 	nor->write = m25p80_write;
188 	nor->write_reg = m25p80_write_reg;
189 	nor->read_reg = m25p80_read_reg;
190 
191 	nor->dev = &spimem->spi->dev;
192 	spi_nor_set_flash_node(nor, spi->dev.of_node);
193 	nor->priv = flash;
194 
195 	spi_mem_set_drvdata(spimem, flash);
196 	flash->spimem = spimem;
197 
198 	if (spi->mode & SPI_RX_QUAD) {
199 		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
200 
201 		if (spi->mode & SPI_TX_QUAD)
202 			hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
203 					SNOR_HWCAPS_PP_1_1_4 |
204 					SNOR_HWCAPS_PP_1_4_4);
205 	} else if (spi->mode & SPI_RX_DUAL) {
206 		hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
207 
208 		if (spi->mode & SPI_TX_DUAL)
209 			hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
210 	}
211 
212 	if (data && data->name)
213 		nor->mtd.name = data->name;
214 
215 	if (!nor->mtd.name)
216 		nor->mtd.name = spi_mem_get_name(spimem);
217 
218 	/* For some (historical?) reason many platforms provide two different
219 	 * names in flash_platform_data: "name" and "type". Quite often name is
220 	 * set to "m25p80" and then "type" provides a real chip name.
221 	 * If that's the case, respect "type" and ignore a "name".
222 	 */
223 	if (data && data->type)
224 		flash_name = data->type;
225 	else if (!strcmp(spi->modalias, "spi-nor"))
226 		flash_name = NULL; /* auto-detect */
227 	else
228 		flash_name = spi->modalias;
229 
230 	ret = spi_nor_scan(nor, flash_name, &hwcaps);
231 	if (ret)
232 		return ret;
233 
234 	return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
235 				   data ? data->nr_parts : 0);
236 }
237 
238 
m25p_remove(struct spi_mem * spimem)239 static int m25p_remove(struct spi_mem *spimem)
240 {
241 	struct m25p	*flash = spi_mem_get_drvdata(spimem);
242 
243 	spi_nor_restore(&flash->spi_nor);
244 
245 	/* Clean up MTD stuff. */
246 	return mtd_device_unregister(&flash->spi_nor.mtd);
247 }
248 
m25p_shutdown(struct spi_mem * spimem)249 static void m25p_shutdown(struct spi_mem *spimem)
250 {
251 	struct m25p *flash = spi_mem_get_drvdata(spimem);
252 
253 	spi_nor_restore(&flash->spi_nor);
254 }
255 /*
256  * Do NOT add to this array without reading the following:
257  *
258  * Historically, many flash devices are bound to this driver by their name. But
259  * since most of these flash are compatible to some extent, and their
260  * differences can often be differentiated by the JEDEC read-ID command, we
261  * encourage new users to add support to the spi-nor library, and simply bind
262  * against a generic string here (e.g., "jedec,spi-nor").
263  *
264  * Many flash names are kept here in this list (as well as in spi-nor.c) to
265  * keep them available as module aliases for existing platforms.
266  */
267 static const struct spi_device_id m25p_ids[] = {
268 	/*
269 	 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
270 	 * hack around the fact that the SPI core does not provide uevent
271 	 * matching for .of_match_table
272 	 */
273 	{"spi-nor"},
274 
275 	/*
276 	 * Entries not used in DTs that should be safe to drop after replacing
277 	 * them with "spi-nor" in platform data.
278 	 */
279 	{"s25sl064a"},	{"w25x16"},	{"m25p10"},	{"m25px64"},
280 
281 	/*
282 	 * Entries that were used in DTs without "jedec,spi-nor" fallback and
283 	 * should be kept for backward compatibility.
284 	 */
285 	{"at25df321a"},	{"at25df641"},	{"at26df081a"},
286 	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
287 	{"mx25l25635e"},{"mx66l51235l"},
288 	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
289 	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
290 	{"s25fl064k"},
291 	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
292 	{"m25p40"},	{"m25p80"},	{"m25p16"},	{"m25p32"},
293 	{"m25p64"},	{"m25p128"},
294 	{"w25x80"},	{"w25x32"},	{"w25q32"},	{"w25q32dw"},
295 	{"w25q80bl"},	{"w25q128"},	{"w25q256"},
296 
297 	/* Flashes that can't be detected using JEDEC */
298 	{"m25p05-nonjedec"},	{"m25p10-nonjedec"},	{"m25p20-nonjedec"},
299 	{"m25p40-nonjedec"},	{"m25p80-nonjedec"},	{"m25p16-nonjedec"},
300 	{"m25p32-nonjedec"},	{"m25p64-nonjedec"},	{"m25p128-nonjedec"},
301 
302 	/* Everspin MRAMs (non-JEDEC) */
303 	{ "mr25h128" }, /* 128 Kib, 40 MHz */
304 	{ "mr25h256" }, /* 256 Kib, 40 MHz */
305 	{ "mr25h10" },  /*   1 Mib, 40 MHz */
306 	{ "mr25h40" },  /*   4 Mib, 40 MHz */
307 
308 	{ },
309 };
310 MODULE_DEVICE_TABLE(spi, m25p_ids);
311 
312 static const struct of_device_id m25p_of_table[] = {
313 	/*
314 	 * Generic compatibility for SPI NOR that can be identified by the
315 	 * JEDEC READ ID opcode (0x9F). Use this, if possible.
316 	 */
317 	{ .compatible = "jedec,spi-nor" },
318 	{}
319 };
320 MODULE_DEVICE_TABLE(of, m25p_of_table);
321 
322 static struct spi_mem_driver m25p80_driver = {
323 	.spidrv = {
324 		.driver = {
325 			.name	= "m25p80",
326 			.of_match_table = m25p_of_table,
327 		},
328 		.id_table	= m25p_ids,
329 	},
330 	.probe	= m25p_probe,
331 	.remove	= m25p_remove,
332 	.shutdown	= m25p_shutdown,
333 
334 	/* REVISIT: many of these chips have deep power-down modes, which
335 	 * should clearly be entered on suspend() to minimize power use.
336 	 * And also when they're otherwise idle...
337 	 */
338 };
339 
340 module_spi_mem_driver(m25p80_driver);
341 
342 MODULE_LICENSE("GPL");
343 MODULE_AUTHOR("Mike Lavender");
344 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
345