Searched +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out (Results 1 – 25 of 287) sorted by relevance
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| /kernel/linux/linux-4.19/Documentation/devicetree/bindings/sound/ |
| D | simple-card.txt | 1 Simple-Card:
3 Simple-Card specifies audio DAI connections of SoC <-> codec.
7 - compatible : "simple-audio-card"
11 - simple-audio-card,name : User specified audio sound card name, one string
13 - simple-audio-card,widgets : Please refer to widgets.txt.
14 - simple-audio-card,routing : A list of the connections between audio components.
18 - simple-audio-card,mclk-fs : Multiplication factor between stream rate and codec
19 mclk. When defined, mclk-fs property defined in
20 dai-link sub nodes are ignored.
21 - simple-audio-card,hp-det-gpio : Reference to GPIO that signals when
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | video-interfaces.txt | 4 ---------------
21 #address-cells = <1>;
22 #size-cells = <0>;
37 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
41 specify #address-cells, #size-cells properties independently for the 'port'
44 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 a device is partitioned into multiple data busses, e.g. 16-bit input port
54 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
55 and data-shift properties can be used to assign physical data lines to each
59 --------------------------------
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
16 $ref: /schemas/types.yaml#/definitions/phandle-array
19 bitclock-master:
20 description: Indicates dai-link bit clock master
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | omap3pandora.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3pandora.c -- SoC audio for Pandora Handheld Console
19 #include <asm/mach-types.h>
20 #include <linux/platform_data/asoc-ti-mcbsp.h>
22 #include "omap-mcbsp.h"
39 /* Set the codec system clock for DAC and ADC */ in omap3pandora_hw_params()
43 pr_err(PREFIX "can't set codec system clock\n"); in omap3pandora_hw_params()
47 /* Set McBSP clock to external */ in omap3pandora_hw_params()
52 pr_err(PREFIX "can't set cpu system clock\n"); in omap3pandora_hw_params()
58 pr_err(PREFIX "can't set SRG clock divider\n"); in omap3pandora_hw_params()
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| /kernel/linux/linux-4.19/sound/soc/omap/ |
| D | omap3pandora.c | 2 * omap3pandora.c -- SoC audio for Pandora Handheld Console
18 * 02110-1301 USA
33 #include <asm/mach-types.h>
34 #include <linux/platform_data/asoc-ti-mcbsp.h>
36 #include "omap-mcbsp.h"
48 struct snd_soc_pcm_runtime *rtd = substream->private_data; in omap3pandora_hw_params()
49 struct snd_soc_dai *codec_dai = rtd->codec_dai; in omap3pandora_hw_params()
50 struct snd_soc_dai *cpu_dai = rtd->cpu_dai; in omap3pandora_hw_params()
53 /* Set the codec system clock for DAC and ADC */ in omap3pandora_hw_params()
57 pr_err(PREFIX "can't set codec system clock\n"); in omap3pandora_hw_params()
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| /kernel/linux/linux-5.10/sound/soc/atmel/ |
| D | atmel_ssc_dai.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
11 * Based on at91-ssc.c by
21 #include <linux/atmel-ssc.h>
23 #include "atmel-pcm.h"
25 /* SSC system clock ids */
26 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
33 * SSC direction masks
40 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
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| /kernel/linux/linux-4.19/sound/soc/atmel/ |
| D | atmel_ssc_dai.h | 2 * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
10 * Based on at91-ssc.c by
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/atmel-ssc.h>
36 #include "atmel-pcm.h"
38 /* SSC system clock ids */
39 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
46 * SSC direction masks
53 * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
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| /kernel/linux/linux-4.19/sound/soc/generic/ |
| D | simple-card-utils.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // simple-card-utils.c
25 if (data->convert_rate) in asoc_simple_card_convert_fixup()
26 rate->min = in asoc_simple_card_convert_fixup()
27 rate->max = data->convert_rate; in asoc_simple_card_convert_fixup()
29 if (data->convert_channels) in asoc_simple_card_convert_fixup()
30 channels->min = in asoc_simple_card_convert_fixup()
31 channels->max = data->convert_channels; in asoc_simple_card_convert_fixup()
38 struct device_node *np = dev->of_node; in asoc_simple_card_parse_convert()
45 snprintf(prop, sizeof(prop), "%s%s", prefix, "convert-rate"); in asoc_simple_card_parse_convert()
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | MC68328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68328.h: '328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
26 * 0xFFFFF0xx -- System Control
31 * System Control Register (SCR)
36 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
39 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
42 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
52 * 0xFFFFF1xx -- Chip-Select logic
58 * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control
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| D | MC68VZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers
5 * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com>
6 * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca>
9 * Based on include/asm-m68knommu/MC68332.h
29 * 0xFFFFF0xx -- System Control
34 * System Control Register (SCR)
39 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
42 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
45 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
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| D | MC68EZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68EZ328.h: 'EZ328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
27 * 0xFFFFF0xx -- System Control
32 * System Control Register (SCR)
37 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
40 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
43 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
53 * 0xFFFFF1xx -- Chip-Select logic
84 #define CSA_EN 0x0001 /* Chip-Select Enable */
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| /kernel/linux/linux-4.19/arch/m68k/include/asm/ |
| D | MC68328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68328.h: '328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
26 * 0xFFFFF0xx -- System Control
31 * System Control Register (SCR)
36 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
39 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
42 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
52 * 0xFFFFF1xx -- Chip-Select logic
58 * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control
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| D | MC68VZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers
5 * Copyright (c) 2000-2001 Lineo Inc. <www.lineo.com>
6 * Copyright (c) 2000-2001 Lineo Canada Corp. <www.lineo.ca>
9 * Based on include/asm-m68knommu/MC68332.h
29 * 0xFFFFF0xx -- System Control
34 * System Control Register (SCR)
39 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
42 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
45 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
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| D | MC68EZ328.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* include/asm-m68knommu/MC68EZ328.h: 'EZ328 control registers
8 * Based on include/asm-m68knommu/MC68332.h
27 * 0xFFFFF0xx -- System Control
32 * System Control Register (SCR)
37 #define SCR_WDTH8 0x01 /* 8-Bit Width Select */
40 #define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */
43 #define SCR_BETO 0x80 /* Bus-Error TimeOut */
53 * 0xFFFFF1xx -- Chip-Select logic
84 #define CSA_EN 0x0001 /* Chip-Select Enable */
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
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| /kernel/linux/linux-4.19/Documentation/driver-api/gpio/ |
| D | legacy.rst | 13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
[all …]
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| /kernel/linux/linux-4.19/Documentation/spi/ |
| D | spi-summary | 4 02-Feb-2012
7 ------------
13 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
14 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
15 Slave Out" (MISO) signals. (Other names are also used.) There are four
16 clocking modes through which data is exchanged; mode-0 and mode-3 are most
17 commonly used. Each clock cycle shifts data out and data in; the clock
31 - SPI may be used for request/response style device protocols, as with
34 - It may also be used to stream data in either direction (half duplex),
37 - Some devices may use eight bit words. Others may use different word
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| /kernel/linux/linux-4.19/sound/soc/fsl/ |
| D | fsl_esai.c | 1 // SPDX-License-Identifier: GPL-2.0
16 #include "imx-pcm.h"
30 * @coreclk: clock source to access register
31 * @extalclk: esai clock source to derive HCK, SCK and FS
32 * @fsysclk: system clock source to derive HCK, SCK and FS
33 * @spbaclk: SPBA clock (optional, depending on SoC design)
37 * @hck_rate: clock rate of desired HCKx clock
38 * @sck_rate: clock rate of desired SCKx clock
39 * @hck_dir: the direction of HCKx pads
40 * @sck_div: if using PSR/PM dividers for SCKx clock
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| /kernel/linux/linux-5.10/Documentation/spi/ |
| D | spi-summary.rst | 5 02-Feb-2012
8 ------------
14 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
18 commonly used. Each clock cycle shifts data out and data in; the clock
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
[all …]
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| /kernel/linux/linux-5.10/drivers/media/usb/dvb-usb-v2/ |
| D | rtl28xxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
196 #define USB_TOUT_VAL 0x2F08 /* USB time-out time */
200 #define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
209 #define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
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| /kernel/linux/linux-4.19/Documentation/scsi/ |
| D | ChangeLog.sym53c8xx | 1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version sym53c8xx-1.7.3c
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Backport from SYM-2 the work-around that allows to support
7 - Check that we received at least 8 bytes of INQUIRY response
9 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
10 - + A couple of minor changes.
12 Sat Apr 7 19:30 2001 Gerard Roudier (groudier@club-internet.fr)
13 * version sym53c8xx-1.7.3b
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| /kernel/linux/linux-5.10/Documentation/scsi/ |
| D | ChangeLog.sym53c8xx | 1 Sat May 12 12:00 2001 Gerard Roudier (groudier@club-internet.fr)
2 * version sym53c8xx-1.7.3c
3 - Ensure LEDC bit in GPCNTL is cleared when reading the NVRAM.
4 Fix sent by Stig Telfer <stig@api-networks.com>.
5 - Backport from SYM-2 the work-around that allows to support
7 - Check that we received at least 8 bytes of INQUIRY response
9 - Define scsi_set_pci_device() as nil for kernel < 2.4.4.
10 - + A couple of minor changes.
12 Sat Apr 7 19:30 2001 Gerard Roudier (groudier@club-internet.fr)
13 * version sym53c8xx-1.7.3b
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| /kernel/linux/linux-5.10/sound/soc/fsl/ |
| D | fsl_esai.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include "imx-pcm.h"
25 * struct fsl_esai_soc_data - soc specific data
35 * struct fsl_esai - ESAI private data
40 * @coreclk: clock source to access register
41 * @extalclk: esai clock source to derive HCK, SCK and FS
42 * @fsysclk: system clock source to derive HCK, SCK and FS
43 * @spbaclk: SPBA clock (optional, depending on SoC design)
53 * @hck_rate: clock rate of desired HCKx clock
54 * @sck_rate: clock rate of desired SCKx clock
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| /kernel/linux/linux-4.19/drivers/media/usb/dvb-usb-v2/ |
| D | rtl28xxu.h | 19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
149 * 0x3000 SYS : system
157 #define USB_SYSCTL 0x2000 /* USB system control */
158 #define USB_SYSCTL_0 0x2000 /* USB system control */
159 #define USB_SYSCTL_1 0x2001 /* USB system control */
160 #define USB_SYSCTL_2 0x2002 /* USB system control */
161 #define USB_SYSCTL_3 0x2003 /* USB system control */
207 #define USB_TOUT_VAL 0x2F08 /* USB time-out time */
211 #define USB_VSTAOUT 0x2F1C /* UTMI vendor signal status out */
220 #define USB_SLBBIST 0x2FA0 /* self-loop-back BIST */
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| /kernel/liteos_m/targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/ |
| D | gd32vf103_spi.c | 5 \version 2019-6-5, V1.0.0, firmware for GD32VF103
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
41 /* I2S clock source selection, multiplication and division mask */
42 #define I2S1_CLOCK_SEL ((uint32_t)0x00020000U) /* I2S1 clock source selection */
43 #define I2S2_CLOCK_SEL ((uint32_t)0x00040000U) /* I2S2 clock source selection */
44 #define I2S_CLOCK_MUL_MASK ((uint32_t)0x0000F000U) /* I2S clock multiplication mask */
45 #define I2S_CLOCK_DIV_MASK ((uint32_t)0x000000F0U) /* I2S clock division mask */
55 \param[out] none
84 \param[out] none
90 spi_struct->device_mode = SPI_SLAVE; in spi_struct_para_init()
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