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/kernel/linux/linux-4.19/Documentation/devicetree/bindings/ata/
Dsata_highbank.txt3 SATA nodes are defined to describe on-chip Serial ATA controllers.
9 - compatible : compatible list, contains "calxeda,hb-ahci"
10 - interrupts : <interrupt mapping for SATA IRQ>
11 - reg : <registers mapping>
14 - dma-coherent : Present if dma operations are coherent
15 - calxeda,port-phys : phandle-combophy and lane assignment, which maps each
18 - calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
21 - calxeda,led-order : a u32 array that map port numbers to offsets within the
23 - calxeda,tx-atten : a u32 array that contains TX attenuation override
26 - calxeda,pre-clocks : a u32 that indicates the number of additional clock
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-ahci
27 dma-coherent: true
29 calxeda,pre-clocks:
35 calxeda,post-clocks:
41 calxeda,led-order:
43 $ref: /schemas/types.yaml#/definitions/uint32-array
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/kernel/linux/linux-5.10/sound/soc/codecs/
Dcs35l34.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cs35l34.h -- CS35L34 ALSA SoC audio driver
28 #define CS35L34_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */
45 #define CS35L34_PRED_MAX_ATTEN_SPK_LOAD 0x40 /* PRD Max Atten / Spkr Load */
53 #define CS35L34_PRED_BRWNOUT_ATT_STATUS 0x4C /* PRD Brownout Atten Status */
57 #define CS35L34_TDM_TX_CTL_1_VMON 0x52 /* TDM TX Ctl 1 (VMON) */
58 #define CS35L34_TDM_TX_CTL_2_IMON 0x53 /* TDM TX Ctl 2 (IMON) */
59 #define CS35L34_TDM_TX_CTL_3_VPMON 0x54 /* TDM TX Ctl 3 (VPMON) */
60 #define CS35L34_TDM_TX_CTL_4_VBSTMON 0x55 /* TDM TX Ctl 4 (VBSTMON) */
61 #define CS35L34_TDM_TX_CTL_5_FLAG1 0x56 /* TDM TX Ctl 5 (FLAG1) */
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/kernel/linux/linux-4.19/sound/soc/codecs/
Dcs35l34.h2 * cs35l34.h -- CS35L34 ALSA SoC audio driver
32 #define CS35L34_PROTECT_CTL 0x18 /* Amp Gain - Prot Ctl Param */
49 #define CS35L34_PRED_MAX_ATTEN_SPK_LOAD 0x40 /* PRD Max Atten / Spkr Load */
57 #define CS35L34_PRED_BRWNOUT_ATT_STATUS 0x4C /* PRD Brownout Atten Status */
61 #define CS35L34_TDM_TX_CTL_1_VMON 0x52 /* TDM TX Ctl 1 (VMON) */
62 #define CS35L34_TDM_TX_CTL_2_IMON 0x53 /* TDM TX Ctl 2 (IMON) */
63 #define CS35L34_TDM_TX_CTL_3_VPMON 0x54 /* TDM TX Ctl 3 (VPMON) */
64 #define CS35L34_TDM_TX_CTL_4_VBSTMON 0x55 /* TDM TX Ctl 4 (VBSTMON) */
65 #define CS35L34_TDM_TX_CTL_5_FLAG1 0x56 /* TDM TX Ctl 5 (FLAG1) */
66 #define CS35L34_TDM_TX_CTL_6_FLAG2 0x57 /* TDM TX Ctl 6 (FLAG2) */
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/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x0/
Dphy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (c) Copyright 2002-2010, Ralink Technology, Inc.
26 if (test_bit(MT76_REMOVED, &dev->mphy.state)) in mt76x0_rf_csr_wr()
27 return -ENODEV; in mt76x0_rf_csr_wr()
33 return -EINVAL; in mt76x0_rf_csr_wr()
35 mutex_lock(&dev->phy_mutex); in mt76x0_rf_csr_wr()
38 ret = -ETIMEDOUT; in mt76x0_rf_csr_wr()
50 mutex_unlock(&dev->phy_mutex); in mt76x0_rf_csr_wr()
53 dev_err(dev->mt76.dev, "Error: RF write %d:%d failed:%d!!\n", in mt76x0_rf_csr_wr()
61 int ret = -ETIMEDOUT; in mt76x0_rf_csr_rr()
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/kernel/linux/linux-4.19/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinitvals.h2 * (c) Copyright 2002-2010, Ralink Technology, Inc.
32 /*{TX_SW_CFG0, 0x40a06}, Gary,2006-08-23 */
33 {MT_TX_SW_CFG0, 0x0}, /* Gary,2008-05-21 for CWC test */
34 {MT_TX_SW_CFG1, 0x80606}, /* Gary,2006-08-23 */
35 {MT_TX_LINK_CFG, 0x1020}, /* Gary,2006-08-23 */
36 …/*{TX_TIMEOUT_CFG, 0x00182090}, CCK has some problem. So increase timieout value. 2006-10-09 MArv…
37 …CCK has some problem. So increase timieout value. 2006-10-09 MArvek RT , Modify for 2860E ,2007-08…
39 {MT_LED_CFG, 0x7f031e46}, /* Gary, 2006-08-23*/
47 …TRY_CFG, 0x47d01f0f}, /* Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-0…
49 …{MT_AUTO_RSP_CFG, 0x00000013}, /* Initial Auto_Responder, because QA will turn off Auto-Responde…
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Dphy.c2 * (c) Copyright 2002-2010, Ralink Technology, Inc.
33 if (test_bit(MT76_REMOVED, &dev->mt76.state)) in mt76x0_rf_csr_wr()
34 return -ENODEV; in mt76x0_rf_csr_wr()
40 return -EINVAL; in mt76x0_rf_csr_wr()
42 mutex_lock(&dev->reg_atomic_mutex); in mt76x0_rf_csr_wr()
45 ret = -ETIMEDOUT; in mt76x0_rf_csr_wr()
55 trace_mt76x0_rf_write(&dev->mt76, bank, offset, value); in mt76x0_rf_csr_wr()
57 mutex_unlock(&dev->reg_atomic_mutex); in mt76x0_rf_csr_wr()
60 dev_err(dev->mt76.dev, "Error: RF write %d:%d failed:%d!!\n", in mt76x0_rf_csr_wr()
69 int ret = -ETIMEDOUT; in mt76x0_rf_csr_rr()
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/kernel/linux/linux-5.10/drivers/net/wan/lmc/
Dlmc_media.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
37 * Andrew Stanley-Jones (asj@cban.com)
40 * Matt Thomas (matt@3am-software.com).
172 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200; in lmc_hssi_init()
180 sc->lmc_miireg16 = LMC_MII16_LED_ALL; in lmc_hssi_default()
182 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); in lmc_hssi_default()
183 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); in lmc_hssi_default()
184 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); in lmc_hssi_default()
196 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); in lmc_hssi_set_status()
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/kernel/linux/linux-4.19/drivers/net/wan/lmc/
Dlmc_media.c32 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
36 * Andrew Stanley-Jones (asj@cban.com)
39 * Matt Thomas (matt@3am-software.com).
174 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200; in lmc_hssi_init()
182 sc->lmc_miireg16 = LMC_MII16_LED_ALL; in lmc_hssi_default()
184 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN); in lmc_hssi_default()
185 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT); in lmc_hssi_default()
186 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16); in lmc_hssi_default()
198 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source); in lmc_hssi_set_status()
207 if (ctl->clock_source && !sc->ictl.clock_source) in lmc_hssi_set_status()
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/kernel/linux/linux-4.19/drivers/infiniband/hw/qib/
Dqib_iba7322.c2 * Copyright (c) 2012 - 2017 Intel Corporation. All rights reserved.
3 * Copyright (c) 2008 - 2012 QLogic Corporation. All rights reserved.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
88 #define BMASK(msb, lsb) (((1 << ((msb) + 1 - (lsb))) - 1) << (lsb))
95 /* Below is special-purpose, so only really works for the IB SerDes blocks. */
112 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
125 MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space");
140 MODULE_PARM_DESC(rcvhdrsize, "receive header size in 32-bit words");
144 MODULE_PARM_DESC(rcvhdrentsize, "receive header entry size in 32-bit words");
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/kernel/linux/linux-5.10/drivers/infiniband/hw/qib/
Dqib_iba7322.c2 * Copyright (c) 2012 - 2017 Intel Corporation. All rights reserved.
3 * Copyright (c) 2008 - 2012 QLogic Corporation. All rights reserved.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
88 #define BMASK(msb, lsb) (((1 << ((msb) + 1 - (lsb))) - 1) << (lsb))
95 /* Below is special-purpose, so only really works for the IB SerDes blocks. */
112 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
125 MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space");
140 MODULE_PARM_DESC(rcvhdrsize, "receive header size in 32-bit words");
144 MODULE_PARM_DESC(rcvhdrentsize, "receive header entry size in 32-bit words");
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/kernel/linux/linux-5.10/drivers/ata/
Dsata_highbank.c1 // SPDX-License-Identifier: GPL-2.0-only
53 /* Each of the 6 phys can have up to 4 sata ports attached to i. Map 0-based
91 return 1 << (3 * pdata->port_to_sgpio[port] + shift); in sgpio_bit_shift()
97 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
100 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
103 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
106 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
109 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
112 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
122 gpiod_set_value(pdata->sgpio_gpiod[SCLOCK], 1); in ecx_led_cycle_clock()
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Dahci_imx.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <linux/hwmon-sysfs.h>
24 #define DRV_NAME "ahci-imx"
27 /* Timer 1-ms Register */
113 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
137 } while (--timeout); in imx_phy_crbit_assert()
139 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
227 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
228 void __iomem *mmio = hpriv->mmio; in imx_sata_phy_reset()
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/kernel/linux/linux-4.19/drivers/ata/
Dsata_highbank.c65 /* Each of the 6 phys can have up to 4 sata ports attached to i. Map 0-based
103 return 1 << (3 * pdata->port_to_sgpio[port] + shift); in sgpio_bit_shift()
109 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
112 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
115 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
118 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
121 pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
124 pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port, in ecx_parse_sgpio()
134 gpio_set_value(pdata->sgpio_gpio[SCLOCK], 1); in ecx_led_cycle_clock()
136 gpio_set_value(pdata->sgpio_gpio[SCLOCK], 0); in ecx_led_cycle_clock()
[all …]
Dahci_imx.c28 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
31 #include <linux/hwmon-sysfs.h>
35 #define DRV_NAME "ahci-imx"
38 /* Timer 1-ms Register */
124 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
148 } while (--timeout); in imx_phy_crbit_assert()
150 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
238 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
239 void __iomem *mmio = hpriv->mmio; in imx_sata_phy_reset()
244 if (imxpriv->type == AHCI_IMX6QP) { in imx_sata_phy_reset()
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/kernel/linux/linux-4.19/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphy_n.c108 #define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5)
124 #define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9
126 #define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \
129 #define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \
131 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f)))
151 #define NPHY_SROM_MINTEMPOFFSET -16
210 u16 atten[2]; member
223 #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1)
228 {0, 0, 0, 0, 0, -1},
229 {0, 0, 0, 3, 0, -1},
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/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphy_n.c1 // SPDX-License-Identifier: ISC
97 #define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5)
113 #define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9
115 #define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \
118 #define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \
120 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f)))
140 #define NPHY_SROM_MINTEMPOFFSET -16
199 u16 atten[2]; member
212 #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1)
217 {0, 0, 0, 0, 0, -1},
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/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath11k/
Ddp_rx.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
25 return desc->hdr_status; in ath11k_dp_rx_h_80211_hdr()
30 if (!(__le32_to_cpu(desc->mpdu_start.info1) & in ath11k_dp_rx_h_mpdu_start_enctype()
35 __le32_to_cpu(desc->mpdu_start.info2)); in ath11k_dp_rx_h_mpdu_start_enctype()
41 __le32_to_cpu(desc->msdu_start.info2)); in ath11k_dp_rx_h_msdu_start_decap_type()
47 __le32_to_cpu(desc->msdu_start.info2)); in ath11k_dp_rx_h_msdu_start_mesh_ctl_present()
53 __le32_to_cpu(desc->mpdu_start.info1)); in ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid()
59 __le32_to_cpu(desc->mpdu_start.info1)); in ath11k_dp_rx_h_mpdu_start_fc_valid()
66 hdr = (struct ieee80211_hdr *)(skb->data + HAL_RX_DESC_SIZE); in ath11k_dp_rx_h_mpdu_start_more_frags()
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