| /kernel/linux/linux-4.19/arch/powerpc/lib/ |
| D | mem_64.S | 41 mr r6,r3
46 stb r4,0(r6)
47 addi r6,r6,1
49 sth r4,0(r6)
50 addi r6,r6,2
52 stw r4,0(r6)
53 addi r6,r6,4
59 4: std r4,0(r6)
60 std r4,8(r6)
61 std r4,16(r6)
[all …]
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| D | checksum_64.S | 30 srdi. r6,r4,3 /* less than 8 bytes? */
39 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 >> 1) & 0x3 */
43 sub r6,r7,r6
44 mtctr r6
47 lhz r6,0(r3) /* align to doubleword */
50 adde r0,r0,r6
59 srdi. r6,r4,7
62 srdi r6,r4,6
63 subi r6,r6,1
64 mtctr r6
[all …]
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| D | copy_32.S | 23 stw r7,4(r6); \
24 stw r8,8(r6); \
25 stw r9,12(r6); \
26 stwu r10,16(r6)
38 stw r7,4(r6); \
40 stw r8,8(r6); \
42 stw r9,12(r6); \
44 stwu r10,16(r6)
73 addi r6, r3, -4
77 1: stwu r4, 4(r6)
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/lib/ |
| D | mem_64.S | 40 mr r6,r3
45 stb r4,0(r6)
46 addi r6,r6,1
48 sth r4,0(r6)
49 addi r6,r6,2
51 stw r4,0(r6)
52 addi r6,r6,4
58 4: std r4,0(r6)
59 std r4,8(r6)
60 std r4,16(r6)
[all …]
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| D | checksum_64.S | 26 srdi. r6,r4,3 /* less than 8 bytes? */
35 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 >> 1) & 0x3 */
39 sub r6,r7,r6
40 mtctr r6
43 lhz r6,0(r3) /* align to doubleword */
46 adde r0,r0,r6
55 srdi. r6,r4,7
58 srdi r6,r4,6
59 subi r6,r6,1
60 mtctr r6
[all …]
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| D | copy_32.S | 20 stw r7,4(r6); \
21 stw r8,8(r6); \
22 stw r9,12(r6); \
23 stwu r10,16(r6)
35 stw r7,4(r6); \
37 stw r8,8(r6); \
39 stw r9,12(r6); \
41 stwu r10,16(r6)
71 addi r6, r3, -4
75 1: stwu r4, 4(r6)
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | fsl_booke_entry_mapping.S | 5 invstr: mflr r6 /* Make it accessible */
12 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
26 tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
34 tlbsx 0,r6 /* Fall through, we had to match */
48 li r6,0 /* Set Entry counter to 0 */
50 rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
55 cmpw r3,r6
60 skpinv: addi r6,r6,1 /* Increment */
61 cmpw r6,r9 /* Are we done? */
65 li r6,0x04
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/kernel/ |
| D | fsl_booke_entry_mapping.S | 5 invstr: mflr r6 /* Make it accessible */
12 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
26 tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
34 tlbsx 0,r6 /* Fall through, we had to match */
48 li r6,0 /* Set Entry counter to 0 */
50 rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
55 cmpw r3,r6
60 skpinv: addi r6,r6,1 /* Increment */
61 cmpw r6,r9 /* Are we done? */
65 li r6,0x04
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | abort-lv4t.S | 67 and r6, r8, r7
69 add r6, r6, r9, lsr #1
71 add r6, r6, r9, lsr #2
73 add r6, r6, r9, lsr #3
74 add r6, r6, r6, lsr #8
75 add r6, r6, r6, lsr #4
76 and r6, r6, #15 @ r6 = no. of registers to transfer.
80 subne r7, r7, r6, lsl #2 @ Undo increment
81 addeq r7, r7, r6, lsl #2 @ Undo decrement
93 andne r6, r8, #0xf00 @ { immediate high nibble
[all …]
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| /kernel/linux/linux-4.19/arch/arm/mm/ |
| D | abort-lv4t.S | 67 and r6, r8, r7
69 add r6, r6, r9, lsr #1
71 add r6, r6, r9, lsr #2
73 add r6, r6, r9, lsr #3
74 add r6, r6, r6, lsr #8
75 add r6, r6, r6, lsr #4
76 and r6, r6, #15 @ r6 = no. of registers to transfer.
80 subne r7, r7, r6, lsl #2 @ Undo increment
81 addeq r7, r7, r6, lsl #2 @ Undo decrement
93 andne r6, r8, #0xf00 @ { immediate high nibble
[all …]
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | head-nommu.S | 272 ldr r6, =(_end) @ Cover whole kernel
273 sub r6, r6, r5 @ Minimum size of region to map
274 clz r6, r6 @ Region size must be 2^N...
275 rsb r6, r6, #31 @ ...so round up region size
276 lsl r6, r6, #PMSAv7_RSR_SZ @ Put size in right field
277 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit
294 setup_region r0, r5, r6, PMSAv7_DATA_SIDE, r12 @ PHYS_OFFSET, shared, enabled
296 setup_region r0, r5, r6, PMSAv7_INSTR_SIDE, r12 @ PHYS_OFFSET, shared, enabled
305 mov r6, #PMSAv7_RSR_ALL_MEM @ 4GB region, enabled
307 setup_region r0, r5, r6, PMSAv7_DATA_SIDE, r12 @ 0x0, BG region, enabled
[all …]
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| /kernel/linux/linux-4.19/arch/arm/kernel/ |
| D | head-nommu.S | 276 ldr r6, =(_end) @ Cover whole kernel
277 sub r6, r6, r5 @ Minimum size of region to map
278 clz r6, r6 @ Region size must be 2^N...
279 rsb r6, r6, #31 @ ...so round up region size
280 lsl r6, r6, #PMSAv7_RSR_SZ @ Put size in right field
281 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit
298 setup_region r0, r5, r6, PMSAv7_DATA_SIDE, r12 @ PHYS_OFFSET, shared, enabled
300 setup_region r0, r5, r6, PMSAv7_INSTR_SIDE, r12 @ PHYS_OFFSET, shared, enabled
309 mov r6, #PMSAv7_RSR_ALL_MEM @ 4GB region, enabled
311 setup_region r0, r5, r6, PMSAv7_DATA_SIDE, r12 @ 0x0, BG region, enabled
[all …]
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| /kernel/linux/linux-4.19/arch/arm/mach-imx/ |
| D | suspend-imx6.S | 84 mov r6, #0x0
85 str r6, [r11, #L2X0_CACHE_SYNC]
87 ldr r6, [r11, #L2X0_CACHE_SYNC]
88 ands r6, r6, #0x1
102 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET]
109 subs r6, r6, #0x1
121 ldr r6, [r11, r7]
122 orr r6, r6, #(1 << 31)
123 str r6, [r11, r7]
125 ldr r6, [r11, r7]
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-imx/ |
| D | suspend-imx6.S | 79 mov r6, #0x0
80 str r6, [r11, #L2X0_CACHE_SYNC]
82 ldr r6, [r11, #L2X0_CACHE_SYNC]
83 ands r6, r6, #0x1
97 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET]
104 subs r6, r6, #0x1
116 ldr r6, [r11, r7]
117 orr r6, r6, #(1 << 31)
118 str r6, [r11, r7]
120 ldr r6, [r11, r7]
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/crypto/ |
| D | aes-spe-keys.S | 35 xor r6,r6,r6; \
82 LOAD_KEY(r6,r4,4)
86 stw r6,4(r3)
98 xor r6,r6,r5
99 xor r7,r7,r6
102 stw r6,4(r3)
124 LOAD_KEY(r6,r4,4)
130 stw r6,4(r3)
144 xor r6,r6,r5
145 xor r7,r7,r6
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/crypto/ |
| D | aes-spe-keys.S | 30 xor r6,r6,r6; \
77 LOAD_KEY(r6,r4,4)
81 stw r6,4(r3)
93 xor r6,r6,r5
94 xor r7,r7,r6
97 stw r6,4(r3)
119 LOAD_KEY(r6,r4,4)
125 stw r6,4(r3)
139 xor r6,r6,r5
140 xor r7,r7,r6
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/mm/ |
| D | hash_low_32.S | 59 11: lwz r6,0(r8)
60 cmpwi 0,r6,0
62 10: lwarx r6,0,r8
63 cmpwi 0,r6,0
119 lwarx r6,0,r8 /* get linux-style pte, flag word */
120 andc. r5,r3,r6 /* check access & ~permission */
126 or r5,r0,r6 /* set accessed/dirty bits */
129 subf r10,r6,r8 /* create false data dependency */
131 lwzx r10,r6,r10 /* Get upper PTE word */
213 addis r6,r7,mmu_hash_lock@ha
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/mm/book3s32/ |
| D | hash_low.S | 55 11: lwz r6,0(r8)
56 cmpwi 0,r6,0
58 10: lwarx r6,0,r8
59 cmpwi 0,r6,0
114 lwarx r6,0,r8 /* get linux-style pte, flag word */
115 andc. r5,r3,r6 /* check access & ~permission */
121 or r5,r0,r6 /* set accessed/dirty bits */
124 subf r10,r6,r8 /* create false data dependency */
126 lwzx r10,r6,r10 /* Get upper PTE word */
209 lis r6, (mmu_hash_lock - PAGE_OFFSET)@ha
[all …]
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| /kernel/linux/linux-4.19/arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 67 lwz r6, 4(r4)
70 stw r6, SS_MEMSAVE+4(r3)
73 mfspr r6, SPRN_HID1
77 stw r6, SS_HID+4(r3)
82 mfspr r6, SPRN_IBCR
89 stw r6, SS_IBCR(r3)
96 mfspr r6, SPRN_SPRG2
102 stw r6, SS_SPRG+8(r3)
108 mfspr r6, SPRN_SPRG6
113 stw r6, SS_SPRG+24(r3)
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/83xx/ |
| D | suspend-asm.S | 64 lwz r6, 4(r4)
67 stw r6, SS_MEMSAVE+4(r3)
70 mfspr r6, SPRN_HID1
74 stw r6, SS_HID+4(r3)
79 mfspr r6, SPRN_IBCR
86 stw r6, SS_IBCR(r3)
93 mfspr r6, SPRN_SPRG2
99 stw r6, SS_SPRG+8(r3)
105 mfspr r6, SPRN_SPRG6
110 stw r6, SS_SPRG+24(r3)
[all …]
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| /kernel/linux/linux-5.10/arch/arm/lib/ |
| D | io-readsb.S | 29 .Linsb_aligned: stmfd sp!, {r4 - r6, lr}
38 ldrb r6, [r0]
43 orr r3, r3, r6, put_byte_3
44 ldrb r6, [r0]
49 orr r4, r4, r6, put_byte_2
50 ldrb r6, [r0]
55 orr r5, r5, r6, put_byte_1
56 ldrb r6, [r0]
61 mov r6, r6, put_byte_0
62 orr r6, r6, ip, put_byte_1
[all …]
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| /kernel/linux/linux-4.19/arch/arm/lib/ |
| D | io-readsb.S | 32 .Linsb_aligned: stmfd sp!, {r4 - r6, lr}
41 ldrb r6, [r0]
46 orr r3, r3, r6, put_byte_3
47 ldrb r6, [r0]
52 orr r4, r4, r6, put_byte_2
53 ldrb r6, [r0]
58 orr r5, r5, r6, put_byte_1
59 ldrb r6, [r0]
64 mov r6, r6, put_byte_0
65 orr r6, r6, ip, put_byte_1
[all …]
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| /kernel/linux/linux-4.19/arch/hexagon/lib/ |
| D | memset.S | 40 r6 = #8 define
48 r9 = sub(r6, r7) /* bytes until double alignment */
70 r6 = #1 define
83 r6 = #2 define
96 r6 = #4 define
116 r6 = #8 define
136 r6 = #4 define
171 r6 = r0 define
196 r6 = add(r0, #1) define
203 p0 = tstbit(r6,#1)
[all …]
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| /kernel/linux/linux-5.10/arch/hexagon/lib/ |
| D | memset.S | 27 r6 = #8 define
35 r9 = sub(r6, r7) /* bytes until double alignment */
57 r6 = #1 define
70 r6 = #2 define
83 r6 = #4 define
103 r6 = #8 define
123 r6 = #4 define
158 r6 = r0 define
183 r6 = add(r0, #1) define
190 p0 = tstbit(r6,#1)
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/mm/nohash/ |
| D | tlb_low.S | 45 mfspr r6,SPRN_PID
49 mtspr SPRN_PID,r6
92 tlbsx. r6,0,r3
102 tlbwe r6,r6,PPC44x_TLB_PAGEID
108 oris r7,r6,0x8000 /* specify way explicitly */
155 li r6,0 /* Default entry value 0 */
163 tlbre r6,r5,0 /* Read entry */
165 andi. r0,r6,PPC47x_TLB0_VALID /* Valid entry ? */
168 rlwinm r6,r6,0,21,19 /* Clear V */
169 tlbwe r6,r7,0 /* Write it */
[all …]
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